QUAD Serial Peripheral Interface. More...

#include <stm32f469xx.h>

Public Attributes
__IO uint32_t	ABR

__IO uint32_t	AR

__IO uint32_t	CCR

__IO uint32_t	CR

__IO uint32_t	DCR

__IO uint32_t	DLR

__IO uint32_t	DR

__IO uint32_t	FCR

__IO uint32_t	LPTR

__IO uint32_t	PIR

__IO uint32_t	PSMAR

__IO uint32_t	PSMKR

__IO uint32_t	SR

Detailed Description

QUAD Serial Peripheral Interface.

Definition at line 909 of file stm32f469xx.h.

Member Data Documentation

◆ ABR

__IO uint32_t QUADSPI_TypeDef::ABR

QUADSPI Alternate Bytes register, Address offset: 0x1C

Definition at line 918 of file stm32f469xx.h.

◆ AR

__IO uint32_t QUADSPI_TypeDef::AR

QUADSPI Address register, Address offset: 0x18

Definition at line 917 of file stm32f469xx.h.

◆ CCR

__IO uint32_t QUADSPI_TypeDef::CCR

QUADSPI Communication Configuration register, Address offset: 0x14

Definition at line 916 of file stm32f469xx.h.

◆ CR

__IO uint32_t QUADSPI_TypeDef::CR

QUADSPI Control register, Address offset: 0x00

Definition at line 911 of file stm32f469xx.h.

◆ DCR

__IO uint32_t QUADSPI_TypeDef::DCR

QUADSPI Device Configuration register, Address offset: 0x04

Definition at line 912 of file stm32f469xx.h.

◆ DLR

__IO uint32_t QUADSPI_TypeDef::DLR

QUADSPI Data Length register, Address offset: 0x10

Definition at line 915 of file stm32f469xx.h.

◆ DR

__IO uint32_t QUADSPI_TypeDef::DR

QUADSPI Data register, Address offset: 0x20

Definition at line 919 of file stm32f469xx.h.

◆ FCR

__IO uint32_t QUADSPI_TypeDef::FCR

QUADSPI Flag Clear register, Address offset: 0x0C

Definition at line 914 of file stm32f469xx.h.

◆ LPTR

__IO uint32_t QUADSPI_TypeDef::LPTR

QUADSPI Low Power Timeout register, Address offset: 0x30

Definition at line 923 of file stm32f469xx.h.

◆ PIR

__IO uint32_t QUADSPI_TypeDef::PIR

QUADSPI Polling Interval register, Address offset: 0x2C

Definition at line 922 of file stm32f469xx.h.

◆ PSMAR

__IO uint32_t QUADSPI_TypeDef::PSMAR

QUADSPI Polling Status Match register, Address offset: 0x28

Definition at line 921 of file stm32f469xx.h.

◆ PSMKR

__IO uint32_t QUADSPI_TypeDef::PSMKR

QUADSPI Polling Status Mask register, Address offset: 0x24

Definition at line 920 of file stm32f469xx.h.

◆ SR

__IO uint32_t QUADSPI_TypeDef::SR

QUADSPI Status register, Address offset: 0x08

Definition at line 913 of file stm32f469xx.h.

The documentation for this struct was generated from the following files:

Public Attributes