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FMC_NORSRAM_TimingTypeDef Struct Reference

FMC NORSRAM Timing parameters structure definition
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#include <stm32f7xx_ll_fmc.h>

Public Attributes

uint32_t AccessMode
 
uint32_t AddressHoldTime
 
uint32_t AddressSetupTime
 
uint32_t BusTurnAroundDuration
 
uint32_t CLKDivision
 
uint32_t DataLatency
 
uint32_t DataSetupTime
 

Detailed Description

FMC NORSRAM Timing parameters structure definition

Definition at line 460 of file stm32f7xx_ll_fmc.h.

Member Data Documentation

◆ AccessMode

uint32_t FMC_NORSRAM_TimingTypeDef::AccessMode

Specifies the asynchronous access mode. This parameter can be a value of FMC Access Mode

Definition at line 496 of file stm32f7xx_ll_fmc.h.

◆ AddressHoldTime

uint32_t FMC_NORSRAM_TimingTypeDef::AddressHoldTime

Defines the number of HCLK cycles to configure the duration of the address hold time. This parameter can be a value between Min_Data = 1 and Max_Data = 15.

Note
This parameter is not used with synchronous NOR Flash memories.

Definition at line 467 of file stm32f7xx_ll_fmc.h.

◆ AddressSetupTime

uint32_t FMC_NORSRAM_TimingTypeDef::AddressSetupTime

Defines the number of HCLK cycles to configure the duration of the address setup time. This parameter can be a value between Min_Data = 0 and Max_Data = 15.

Note
This parameter is not used with synchronous NOR Flash memories.

Definition at line 462 of file stm32f7xx_ll_fmc.h.

◆ BusTurnAroundDuration

uint32_t FMC_NORSRAM_TimingTypeDef::BusTurnAroundDuration

Defines the number of HCLK cycles to configure the duration of the bus turnaround. This parameter can be a value between Min_Data = 0 and Max_Data = 15.

Note
This parameter is only used for multiplexed NOR Flash memories.

Definition at line 478 of file stm32f7xx_ll_fmc.h.

◆ CLKDivision

uint32_t FMC_NORSRAM_TimingTypeDef::CLKDivision

Defines the period of CLK clock output signal, expressed in number of HCLK cycles. This parameter can be a value between Min_Data = 2 and Max_Data = 16.

Note
This parameter is not used for asynchronous NOR Flash, SRAM or ROM accesses.

Definition at line 483 of file stm32f7xx_ll_fmc.h.

◆ DataLatency

uint32_t FMC_NORSRAM_TimingTypeDef::DataLatency

Defines the number of memory clock cycles to issue to the memory before getting the first data. The parameter value depends on the memory type as shown below:

  • It must be set to 0 in case of a CRAM
  • It is don't care in asynchronous NOR, SRAM or ROM accesses
  • It may assume a value between Min_Data = 2 and Max_Data = 17 in NOR Flash memories with synchronous burst mode enable

Definition at line 488 of file stm32f7xx_ll_fmc.h.

◆ DataSetupTime

uint32_t FMC_NORSRAM_TimingTypeDef::DataSetupTime

Defines the number of HCLK cycles to configure the duration of the data setup time. This parameter can be a value between Min_Data = 1 and Max_Data = 255.

Note
This parameter is used for SRAMs, ROMs and asynchronous multiplexed NOR Flash memories.

Definition at line 472 of file stm32f7xx_ll_fmc.h.


The documentation for this struct was generated from the following file:


picovoice_driver
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autogenerated on Fri Apr 1 2022 02:15:19