Collaboration diagram for TIM Output Compare and PWM Modes:

Macros
#define	TIM_OCMODE_ACTIVE TIM_CCMR1_OC1M_0

#define	TIM_OCMODE_ACTIVE TIM_CCMR1_OC1M_0

#define	TIM_OCMODE_ACTIVE TIM_CCMR1_OC1M_0

#define	TIM_OCMODE_ACTIVE TIM_CCMR1_OC1M_0

#define	TIM_OCMODE_ACTIVE TIM_CCMR1_OC1M_0

#define	TIM_OCMODE_ASSYMETRIC_PWM1 (TIM_CCMR1_OC1M_3 \| TIM_CCMR1_OC1M_1 \| TIM_CCMR1_OC1M_2)

#define	TIM_OCMODE_ASSYMETRIC_PWM1 (TIM_CCMR1_OC1M_3 \| TIM_CCMR1_OC1M_1 \| TIM_CCMR1_OC1M_2)

#define	TIM_OCMODE_ASSYMETRIC_PWM1 (TIM_CCMR1_OC1M_3 \| TIM_CCMR1_OC1M_1 \| TIM_CCMR1_OC1M_2)

#define	TIM_OCMODE_ASSYMETRIC_PWM2 TIM_CCMR1_OC1M

#define	TIM_OCMODE_ASSYMETRIC_PWM2 TIM_CCMR1_OC1M

#define	TIM_OCMODE_ASSYMETRIC_PWM2 TIM_CCMR1_OC1M

#define	TIM_OCMODE_COMBINED_PWM1 (TIM_CCMR1_OC1M_3 \| TIM_CCMR1_OC1M_2)

#define	TIM_OCMODE_COMBINED_PWM1 (TIM_CCMR1_OC1M_3 \| TIM_CCMR1_OC1M_2)

#define	TIM_OCMODE_COMBINED_PWM1 (TIM_CCMR1_OC1M_3 \| TIM_CCMR1_OC1M_2)

#define	TIM_OCMODE_COMBINED_PWM2 (TIM_CCMR1_OC1M_3 \| TIM_CCMR1_OC1M_0 \| TIM_CCMR1_OC1M_2)

#define	TIM_OCMODE_COMBINED_PWM2 (TIM_CCMR1_OC1M_3 \| TIM_CCMR1_OC1M_0 \| TIM_CCMR1_OC1M_2)

#define	TIM_OCMODE_COMBINED_PWM2 (TIM_CCMR1_OC1M_3 \| TIM_CCMR1_OC1M_0 \| TIM_CCMR1_OC1M_2)

#define	TIM_OCMODE_FORCED_ACTIVE (TIM_CCMR1_OC1M_2 \| TIM_CCMR1_OC1M_0)

#define	TIM_OCMODE_FORCED_ACTIVE (TIM_CCMR1_OC1M_2 \| TIM_CCMR1_OC1M_0)

#define	TIM_OCMODE_FORCED_ACTIVE (TIM_CCMR1_OC1M_2 \| TIM_CCMR1_OC1M_0)

#define	TIM_OCMODE_FORCED_ACTIVE (TIM_CCMR1_OC1M_2 \| TIM_CCMR1_OC1M_0)

#define	TIM_OCMODE_FORCED_ACTIVE (TIM_CCMR1_OC1M_2 \| TIM_CCMR1_OC1M_0)

#define	TIM_OCMODE_FORCED_INACTIVE TIM_CCMR1_OC1M_2

#define	TIM_OCMODE_FORCED_INACTIVE TIM_CCMR1_OC1M_2

#define	TIM_OCMODE_FORCED_INACTIVE TIM_CCMR1_OC1M_2

#define	TIM_OCMODE_FORCED_INACTIVE TIM_CCMR1_OC1M_2

#define	TIM_OCMODE_FORCED_INACTIVE TIM_CCMR1_OC1M_2

#define	TIM_OCMODE_INACTIVE TIM_CCMR1_OC1M_1

#define	TIM_OCMODE_INACTIVE TIM_CCMR1_OC1M_1

#define	TIM_OCMODE_INACTIVE TIM_CCMR1_OC1M_1

#define	TIM_OCMODE_INACTIVE TIM_CCMR1_OC1M_1

#define	TIM_OCMODE_INACTIVE TIM_CCMR1_OC1M_1

#define	TIM_OCMODE_PWM1 (TIM_CCMR1_OC1M_2 \| TIM_CCMR1_OC1M_1)

#define	TIM_OCMODE_PWM1 (TIM_CCMR1_OC1M_2 \| TIM_CCMR1_OC1M_1)

#define	TIM_OCMODE_PWM1 (TIM_CCMR1_OC1M_2 \| TIM_CCMR1_OC1M_1)

#define	TIM_OCMODE_PWM1 (TIM_CCMR1_OC1M_2 \| TIM_CCMR1_OC1M_1)

#define	TIM_OCMODE_PWM1 (TIM_CCMR1_OC1M_2 \| TIM_CCMR1_OC1M_1)

#define	TIM_OCMODE_PWM2 (TIM_CCMR1_OC1M_2 \| TIM_CCMR1_OC1M_1 \| TIM_CCMR1_OC1M_0)

#define	TIM_OCMODE_PWM2 (TIM_CCMR1_OC1M_2 \| TIM_CCMR1_OC1M_1 \| TIM_CCMR1_OC1M_0)

#define	TIM_OCMODE_PWM2 (TIM_CCMR1_OC1M_2 \| TIM_CCMR1_OC1M_1 \| TIM_CCMR1_OC1M_0)

#define	TIM_OCMODE_PWM2 (TIM_CCMR1_OC1M_2 \| TIM_CCMR1_OC1M_1 \| TIM_CCMR1_OC1M_0)

#define	TIM_OCMODE_PWM2 (TIM_CCMR1_OC1M_2 \| TIM_CCMR1_OC1M_1 \| TIM_CCMR1_OC1M_0)

#define	TIM_OCMODE_RETRIGERRABLE_OPM1 TIM_CCMR1_OC1M_3

#define	TIM_OCMODE_RETRIGERRABLE_OPM1 TIM_CCMR1_OC1M_3

#define	TIM_OCMODE_RETRIGERRABLE_OPM1 TIM_CCMR1_OC1M_3

#define	TIM_OCMODE_RETRIGERRABLE_OPM2 (TIM_CCMR1_OC1M_3 \| TIM_CCMR1_OC1M_0)

#define	TIM_OCMODE_RETRIGERRABLE_OPM2 (TIM_CCMR1_OC1M_3 \| TIM_CCMR1_OC1M_0)

#define	TIM_OCMODE_RETRIGERRABLE_OPM2 (TIM_CCMR1_OC1M_3 \| TIM_CCMR1_OC1M_0)

#define	TIM_OCMODE_TIMING 0x00000000U

#define	TIM_OCMODE_TIMING 0x00000000U

#define	TIM_OCMODE_TIMING 0x00000000U

#define	TIM_OCMODE_TIMING 0x00000000U

#define	TIM_OCMODE_TIMING 0x00000000U

#define	TIM_OCMODE_TOGGLE (TIM_CCMR1_OC1M_1 \| TIM_CCMR1_OC1M_0)

#define	TIM_OCMODE_TOGGLE (TIM_CCMR1_OC1M_1 \| TIM_CCMR1_OC1M_0)

#define	TIM_OCMODE_TOGGLE (TIM_CCMR1_OC1M_1 \| TIM_CCMR1_OC1M_0)

#define	TIM_OCMODE_TOGGLE (TIM_CCMR1_OC1M_1 \| TIM_CCMR1_OC1M_0)

#define	TIM_OCMODE_TOGGLE (TIM_CCMR1_OC1M_1 \| TIM_CCMR1_OC1M_0)