Macros
AHB1 Peripheral Clock Enable Disable Status

Get the enable or disable status of the AHB1 peripheral clock. More...

Collaboration diagram for AHB1 Peripheral Clock Enable Disable Status:

Macros

#define __HAL_RCC_CRC_IS_CLK_DISABLED()   ((RCC->AHB1ENR & (RCC_AHB1ENR_CRCEN)) == RESET)
 
#define __HAL_RCC_CRC_IS_CLK_ENABLED()   ((RCC->AHB1ENR & (RCC_AHB1ENR_CRCEN)) != RESET)
 
#define __HAL_RCC_DMA1_IS_CLK_DISABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_DMA1EN)) == RESET)
 
#define __HAL_RCC_DMA1_IS_CLK_DISABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_DMA1EN)) == RESET)
 
#define __HAL_RCC_DMA1_IS_CLK_DISABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_DMA1EN)) == RESET)
 
#define __HAL_RCC_DMA1_IS_CLK_DISABLED()   ((RCC->AHB1ENR & (RCC_AHB1ENR_DMA1EN)) == RESET)
 
#define __HAL_RCC_DMA1_IS_CLK_ENABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_DMA1EN)) != RESET)
 
#define __HAL_RCC_DMA1_IS_CLK_ENABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_DMA1EN)) != RESET)
 
#define __HAL_RCC_DMA1_IS_CLK_ENABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_DMA1EN)) != RESET)
 
#define __HAL_RCC_DMA1_IS_CLK_ENABLED()   ((RCC->AHB1ENR & (RCC_AHB1ENR_DMA1EN)) != RESET)
 
#define __HAL_RCC_DMA2_IS_CLK_DISABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_DMA2EN)) == RESET)
 
#define __HAL_RCC_DMA2_IS_CLK_DISABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_DMA2EN)) == RESET)
 
#define __HAL_RCC_DMA2_IS_CLK_DISABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_DMA2EN)) == RESET)
 
#define __HAL_RCC_DMA2_IS_CLK_ENABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_DMA2EN)) != RESET)
 
#define __HAL_RCC_DMA2_IS_CLK_ENABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_DMA2EN)) != RESET)
 
#define __HAL_RCC_DMA2_IS_CLK_ENABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_DMA2EN)) != RESET)
 
#define __HAL_RCC_GPIOA_IS_CLK_DISABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOAEN)) == RESET)
 
#define __HAL_RCC_GPIOA_IS_CLK_DISABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOAEN)) == RESET)
 
#define __HAL_RCC_GPIOA_IS_CLK_DISABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOAEN)) == RESET)
 
#define __HAL_RCC_GPIOA_IS_CLK_ENABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOAEN)) != RESET)
 
#define __HAL_RCC_GPIOA_IS_CLK_ENABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOAEN)) != RESET)
 
#define __HAL_RCC_GPIOA_IS_CLK_ENABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOAEN)) != RESET)
 
#define __HAL_RCC_GPIOB_IS_CLK_DISABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOBEN)) == RESET)
 
#define __HAL_RCC_GPIOB_IS_CLK_DISABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOBEN)) == RESET)
 
#define __HAL_RCC_GPIOB_IS_CLK_DISABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOBEN)) == RESET)
 
#define __HAL_RCC_GPIOB_IS_CLK_ENABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOBEN)) != RESET)
 
#define __HAL_RCC_GPIOB_IS_CLK_ENABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOBEN)) != RESET)
 
#define __HAL_RCC_GPIOB_IS_CLK_ENABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOBEN)) != RESET)
 
#define __HAL_RCC_GPIOC_IS_CLK_DISABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOCEN)) == RESET)
 
#define __HAL_RCC_GPIOC_IS_CLK_DISABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOCEN)) == RESET)
 
#define __HAL_RCC_GPIOC_IS_CLK_DISABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOCEN)) == RESET)
 
#define __HAL_RCC_GPIOC_IS_CLK_ENABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOCEN)) != RESET)
 
#define __HAL_RCC_GPIOC_IS_CLK_ENABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOCEN)) != RESET)
 
#define __HAL_RCC_GPIOC_IS_CLK_ENABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOCEN)) != RESET)
 
#define __HAL_RCC_GPIOH_IS_CLK_DISABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOHEN)) == RESET)
 
#define __HAL_RCC_GPIOH_IS_CLK_DISABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOHEN)) == RESET)
 
#define __HAL_RCC_GPIOH_IS_CLK_DISABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOHEN)) == RESET)
 
#define __HAL_RCC_GPIOH_IS_CLK_ENABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOHEN)) != RESET)
 
#define __HAL_RCC_GPIOH_IS_CLK_ENABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOHEN)) != RESET)
 
#define __HAL_RCC_GPIOH_IS_CLK_ENABLED()   ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOHEN)) != RESET)
 

Detailed Description

Get the enable or disable status of the AHB1 peripheral clock.

Note
After reset, the peripheral clock (used for registers read/write access) is disabled and the application software has to enable this clock before using it.

Macro Definition Documentation

◆ __HAL_RCC_CRC_IS_CLK_DISABLED

#define __HAL_RCC_CRC_IS_CLK_DISABLED ( )    ((RCC->AHB1ENR & (RCC_AHB1ENR_CRCEN)) == RESET)

Definition at line 492 of file stm32f7xx_hal_rcc.h.

◆ __HAL_RCC_CRC_IS_CLK_ENABLED

#define __HAL_RCC_CRC_IS_CLK_ENABLED ( )    ((RCC->AHB1ENR & (RCC_AHB1ENR_CRCEN)) != RESET)

Definition at line 489 of file stm32f7xx_hal_rcc.h.

◆ __HAL_RCC_DMA1_IS_CLK_DISABLED [1/4]

#define __HAL_RCC_DMA1_IS_CLK_DISABLED ( )    ((RCC->AHB1ENR &(RCC_AHB1ENR_DMA1EN)) == RESET)

◆ __HAL_RCC_DMA1_IS_CLK_DISABLED [2/4]

#define __HAL_RCC_DMA1_IS_CLK_DISABLED ( )    ((RCC->AHB1ENR &(RCC_AHB1ENR_DMA1EN)) == RESET)

◆ __HAL_RCC_DMA1_IS_CLK_DISABLED [3/4]

#define __HAL_RCC_DMA1_IS_CLK_DISABLED ( )    ((RCC->AHB1ENR &(RCC_AHB1ENR_DMA1EN)) == RESET)

◆ __HAL_RCC_DMA1_IS_CLK_DISABLED [4/4]

#define __HAL_RCC_DMA1_IS_CLK_DISABLED ( )    ((RCC->AHB1ENR & (RCC_AHB1ENR_DMA1EN)) == RESET)

Definition at line 493 of file stm32f7xx_hal_rcc.h.

◆ __HAL_RCC_DMA1_IS_CLK_ENABLED [1/4]

#define __HAL_RCC_DMA1_IS_CLK_ENABLED ( )    ((RCC->AHB1ENR &(RCC_AHB1ENR_DMA1EN)) != RESET)

◆ __HAL_RCC_DMA1_IS_CLK_ENABLED [2/4]

#define __HAL_RCC_DMA1_IS_CLK_ENABLED ( )    ((RCC->AHB1ENR &(RCC_AHB1ENR_DMA1EN)) != RESET)

◆ __HAL_RCC_DMA1_IS_CLK_ENABLED [3/4]

#define __HAL_RCC_DMA1_IS_CLK_ENABLED ( )    ((RCC->AHB1ENR &(RCC_AHB1ENR_DMA1EN)) != RESET)

◆ __HAL_RCC_DMA1_IS_CLK_ENABLED [4/4]

#define __HAL_RCC_DMA1_IS_CLK_ENABLED ( )    ((RCC->AHB1ENR & (RCC_AHB1ENR_DMA1EN)) != RESET)

Definition at line 490 of file stm32f7xx_hal_rcc.h.

◆ __HAL_RCC_DMA2_IS_CLK_DISABLED [1/3]

#define __HAL_RCC_DMA2_IS_CLK_DISABLED ( )    ((RCC->AHB1ENR &(RCC_AHB1ENR_DMA2EN)) == RESET)

◆ __HAL_RCC_DMA2_IS_CLK_DISABLED [2/3]

#define __HAL_RCC_DMA2_IS_CLK_DISABLED ( )    ((RCC->AHB1ENR &(RCC_AHB1ENR_DMA2EN)) == RESET)

◆ __HAL_RCC_DMA2_IS_CLK_DISABLED [3/3]

#define __HAL_RCC_DMA2_IS_CLK_DISABLED ( )    ((RCC->AHB1ENR &(RCC_AHB1ENR_DMA2EN)) == RESET)

◆ __HAL_RCC_DMA2_IS_CLK_ENABLED [1/3]

#define __HAL_RCC_DMA2_IS_CLK_ENABLED ( )    ((RCC->AHB1ENR &(RCC_AHB1ENR_DMA2EN)) != RESET)

◆ __HAL_RCC_DMA2_IS_CLK_ENABLED [2/3]

#define __HAL_RCC_DMA2_IS_CLK_ENABLED ( )    ((RCC->AHB1ENR &(RCC_AHB1ENR_DMA2EN)) != RESET)

◆ __HAL_RCC_DMA2_IS_CLK_ENABLED [3/3]

#define __HAL_RCC_DMA2_IS_CLK_ENABLED ( )    ((RCC->AHB1ENR &(RCC_AHB1ENR_DMA2EN)) != RESET)

◆ __HAL_RCC_GPIOA_IS_CLK_DISABLED [1/3]

#define __HAL_RCC_GPIOA_IS_CLK_DISABLED ( )    ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOAEN)) == RESET)

◆ __HAL_RCC_GPIOA_IS_CLK_DISABLED [2/3]

#define __HAL_RCC_GPIOA_IS_CLK_DISABLED ( )    ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOAEN)) == RESET)

◆ __HAL_RCC_GPIOA_IS_CLK_DISABLED [3/3]

#define __HAL_RCC_GPIOA_IS_CLK_DISABLED ( )    ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOAEN)) == RESET)

◆ __HAL_RCC_GPIOA_IS_CLK_ENABLED [1/3]

#define __HAL_RCC_GPIOA_IS_CLK_ENABLED ( )    ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOAEN)) != RESET)

◆ __HAL_RCC_GPIOA_IS_CLK_ENABLED [2/3]

#define __HAL_RCC_GPIOA_IS_CLK_ENABLED ( )    ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOAEN)) != RESET)

◆ __HAL_RCC_GPIOA_IS_CLK_ENABLED [3/3]

#define __HAL_RCC_GPIOA_IS_CLK_ENABLED ( )    ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOAEN)) != RESET)

◆ __HAL_RCC_GPIOB_IS_CLK_DISABLED [1/3]

#define __HAL_RCC_GPIOB_IS_CLK_DISABLED ( )    ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOBEN)) == RESET)

◆ __HAL_RCC_GPIOB_IS_CLK_DISABLED [2/3]

#define __HAL_RCC_GPIOB_IS_CLK_DISABLED ( )    ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOBEN)) == RESET)

◆ __HAL_RCC_GPIOB_IS_CLK_DISABLED [3/3]

#define __HAL_RCC_GPIOB_IS_CLK_DISABLED ( )    ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOBEN)) == RESET)

◆ __HAL_RCC_GPIOB_IS_CLK_ENABLED [1/3]

#define __HAL_RCC_GPIOB_IS_CLK_ENABLED ( )    ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOBEN)) != RESET)

◆ __HAL_RCC_GPIOB_IS_CLK_ENABLED [2/3]

#define __HAL_RCC_GPIOB_IS_CLK_ENABLED ( )    ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOBEN)) != RESET)

◆ __HAL_RCC_GPIOB_IS_CLK_ENABLED [3/3]

#define __HAL_RCC_GPIOB_IS_CLK_ENABLED ( )    ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOBEN)) != RESET)

◆ __HAL_RCC_GPIOC_IS_CLK_DISABLED [1/3]

#define __HAL_RCC_GPIOC_IS_CLK_DISABLED ( )    ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOCEN)) == RESET)

◆ __HAL_RCC_GPIOC_IS_CLK_DISABLED [2/3]

#define __HAL_RCC_GPIOC_IS_CLK_DISABLED ( )    ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOCEN)) == RESET)

◆ __HAL_RCC_GPIOC_IS_CLK_DISABLED [3/3]

#define __HAL_RCC_GPIOC_IS_CLK_DISABLED ( )    ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOCEN)) == RESET)

◆ __HAL_RCC_GPIOC_IS_CLK_ENABLED [1/3]

#define __HAL_RCC_GPIOC_IS_CLK_ENABLED ( )    ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOCEN)) != RESET)

◆ __HAL_RCC_GPIOC_IS_CLK_ENABLED [2/3]

#define __HAL_RCC_GPIOC_IS_CLK_ENABLED ( )    ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOCEN)) != RESET)

◆ __HAL_RCC_GPIOC_IS_CLK_ENABLED [3/3]

#define __HAL_RCC_GPIOC_IS_CLK_ENABLED ( )    ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOCEN)) != RESET)

◆ __HAL_RCC_GPIOH_IS_CLK_DISABLED [1/3]

#define __HAL_RCC_GPIOH_IS_CLK_DISABLED ( )    ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOHEN)) == RESET)

◆ __HAL_RCC_GPIOH_IS_CLK_DISABLED [2/3]

#define __HAL_RCC_GPIOH_IS_CLK_DISABLED ( )    ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOHEN)) == RESET)

◆ __HAL_RCC_GPIOH_IS_CLK_DISABLED [3/3]

#define __HAL_RCC_GPIOH_IS_CLK_DISABLED ( )    ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOHEN)) == RESET)

◆ __HAL_RCC_GPIOH_IS_CLK_ENABLED [1/3]

#define __HAL_RCC_GPIOH_IS_CLK_ENABLED ( )    ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOHEN)) != RESET)

◆ __HAL_RCC_GPIOH_IS_CLK_ENABLED [2/3]

#define __HAL_RCC_GPIOH_IS_CLK_ENABLED ( )    ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOHEN)) != RESET)

◆ __HAL_RCC_GPIOH_IS_CLK_ENABLED [3/3]

#define __HAL_RCC_GPIOH_IS_CLK_ENABLED ( )    ((RCC->AHB1ENR &(RCC_AHB1ENR_GPIOHEN)) != RESET)


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autogenerated on Fri Apr 1 2022 02:15:06