Macros
Collaboration diagram for RCCEx USART2/3/4/5/7/8 Clock Source:

Macros

#define RCC_USART234578CLKSOURCE_CDPCLK1   (0x00000000U)
 
#define RCC_USART234578CLKSOURCE_CDPCLK1   (0x00000000U)
 
#define RCC_USART234578CLKSOURCE_CSI   RCC_CDCCIP2R_USART234578SEL_2
 
#define RCC_USART234578CLKSOURCE_CSI   RCC_CDCCIP2R_USART234578SEL_2
 
#define RCC_USART234578CLKSOURCE_D2PCLK1   RCC_USART234578CLKSOURCE_CDPCLK1
 
#define RCC_USART234578CLKSOURCE_D2PCLK1   RCC_USART234578CLKSOURCE_CDPCLK1
 
#define RCC_USART234578CLKSOURCE_HSI   (RCC_CDCCIP2R_USART234578SEL_0 | RCC_CDCCIP2R_USART234578SEL_1)
 
#define RCC_USART234578CLKSOURCE_HSI   (RCC_CDCCIP2R_USART234578SEL_0 | RCC_CDCCIP2R_USART234578SEL_1)
 
#define RCC_USART234578CLKSOURCE_LSE   (RCC_CDCCIP2R_USART234578SEL_0 | RCC_CDCCIP2R_USART234578SEL_2)
 
#define RCC_USART234578CLKSOURCE_LSE   (RCC_CDCCIP2R_USART234578SEL_0 | RCC_CDCCIP2R_USART234578SEL_2)
 
#define RCC_USART234578CLKSOURCE_PCLK1   RCC_USART234578CLKSOURCE_CDPCLK1
 
#define RCC_USART234578CLKSOURCE_PCLK1   RCC_USART234578CLKSOURCE_CDPCLK1
 
#define RCC_USART234578CLKSOURCE_PLL2   RCC_CDCCIP2R_USART234578SEL_0
 
#define RCC_USART234578CLKSOURCE_PLL2   RCC_CDCCIP2R_USART234578SEL_0
 
#define RCC_USART234578CLKSOURCE_PLL3   RCC_CDCCIP2R_USART234578SEL_1
 
#define RCC_USART234578CLKSOURCE_PLL3   RCC_CDCCIP2R_USART234578SEL_1
 

Detailed Description

Macro Definition Documentation

◆ RCC_USART234578CLKSOURCE_CDPCLK1 [1/2]

#define RCC_USART234578CLKSOURCE_CDPCLK1   (0x00000000U)

◆ RCC_USART234578CLKSOURCE_CDPCLK1 [2/2]

#define RCC_USART234578CLKSOURCE_CDPCLK1   (0x00000000U)

◆ RCC_USART234578CLKSOURCE_CSI [1/2]

#define RCC_USART234578CLKSOURCE_CSI   RCC_CDCCIP2R_USART234578SEL_2

◆ RCC_USART234578CLKSOURCE_CSI [2/2]

#define RCC_USART234578CLKSOURCE_CSI   RCC_CDCCIP2R_USART234578SEL_2

◆ RCC_USART234578CLKSOURCE_D2PCLK1 [1/2]

#define RCC_USART234578CLKSOURCE_D2PCLK1   RCC_USART234578CLKSOURCE_CDPCLK1

◆ RCC_USART234578CLKSOURCE_D2PCLK1 [2/2]

#define RCC_USART234578CLKSOURCE_D2PCLK1   RCC_USART234578CLKSOURCE_CDPCLK1

◆ RCC_USART234578CLKSOURCE_HSI [1/2]

#define RCC_USART234578CLKSOURCE_HSI   (RCC_CDCCIP2R_USART234578SEL_0 | RCC_CDCCIP2R_USART234578SEL_1)

◆ RCC_USART234578CLKSOURCE_HSI [2/2]

#define RCC_USART234578CLKSOURCE_HSI   (RCC_CDCCIP2R_USART234578SEL_0 | RCC_CDCCIP2R_USART234578SEL_1)

◆ RCC_USART234578CLKSOURCE_LSE [1/2]

#define RCC_USART234578CLKSOURCE_LSE   (RCC_CDCCIP2R_USART234578SEL_0 | RCC_CDCCIP2R_USART234578SEL_2)

◆ RCC_USART234578CLKSOURCE_LSE [2/2]

#define RCC_USART234578CLKSOURCE_LSE   (RCC_CDCCIP2R_USART234578SEL_0 | RCC_CDCCIP2R_USART234578SEL_2)

◆ RCC_USART234578CLKSOURCE_PCLK1 [1/2]

#define RCC_USART234578CLKSOURCE_PCLK1   RCC_USART234578CLKSOURCE_CDPCLK1

◆ RCC_USART234578CLKSOURCE_PCLK1 [2/2]

#define RCC_USART234578CLKSOURCE_PCLK1   RCC_USART234578CLKSOURCE_CDPCLK1

◆ RCC_USART234578CLKSOURCE_PLL2 [1/2]

#define RCC_USART234578CLKSOURCE_PLL2   RCC_CDCCIP2R_USART234578SEL_0

◆ RCC_USART234578CLKSOURCE_PLL2 [2/2]

#define RCC_USART234578CLKSOURCE_PLL2   RCC_CDCCIP2R_USART234578SEL_0

◆ RCC_USART234578CLKSOURCE_PLL3 [1/2]

#define RCC_USART234578CLKSOURCE_PLL3   RCC_CDCCIP2R_USART234578SEL_1

◆ RCC_USART234578CLKSOURCE_PLL3 [2/2]

#define RCC_USART234578CLKSOURCE_PLL3   RCC_CDCCIP2R_USART234578SEL_1


picovoice_driver
Author(s):
autogenerated on Fri Apr 1 2022 02:15:08