Macros

Get the enable or disable status of the AHB/APB peripheral clock. More...

Collaboration diagram for Peripheral Clock Enable Disable Status:

Macros

#define __HAL_RCC_ADC1_IS_CLK_DISABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_ADC1EN)) == RESET)
 
#define __HAL_RCC_ADC1_IS_CLK_ENABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_ADC1EN)) != RESET)
 
#define __HAL_RCC_ADC2_IS_CLK_DISABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_ADC2EN)) == RESET)
 
#define __HAL_RCC_ADC2_IS_CLK_ENABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_ADC2EN)) != RESET)
 
#define __HAL_RCC_ADC3_IS_CLK_DISABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_ADC3EN)) == RESET)
 
#define __HAL_RCC_ADC3_IS_CLK_ENABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_ADC3EN)) != RESET)
 
#define __HAL_RCC_BKPSRAM_IS_CLK_DISABLED()   ((RCC->AHB1ENR & (RCC_AHB1ENR_BKPSRAMEN)) == RESET)
 
#define __HAL_RCC_BKPSRAM_IS_CLK_ENABLED()   ((RCC->AHB1ENR & (RCC_AHB1ENR_BKPSRAMEN)) != RESET)
 Get the enable or disable status of the AHB1 peripheral clock. More...
 
#define __HAL_RCC_CAN1_IS_CLK_DISABLED()   ((RCC->APB1ENR & (RCC_APB1ENR_CAN1EN)) == RESET)
 
#define __HAL_RCC_CAN1_IS_CLK_ENABLED()   ((RCC->APB1ENR & (RCC_APB1ENR_CAN1EN)) != RESET)
 
#define __HAL_RCC_DAC_IS_CLK_DISABLED()   ((RCC->APB1ENR & (RCC_APB1ENR_DACEN)) == RESET)
 
#define __HAL_RCC_DAC_IS_CLK_ENABLED()   ((RCC->APB1ENR & (RCC_APB1ENR_DACEN)) != RESET)
 
#define __HAL_RCC_DMA2_IS_CLK_DISABLED()   ((RCC->AHB1ENR & (RCC_AHB1ENR_DMA2EN)) == RESET)
 
#define __HAL_RCC_DMA2_IS_CLK_ENABLED()   ((RCC->AHB1ENR & (RCC_AHB1ENR_DMA2EN)) != RESET)
 
#define __HAL_RCC_DTCMRAMEN_IS_CLK_DISABLED()   ((RCC->AHB1ENR & (RCC_AHB1ENR_DTCMRAMEN)) == RESET)
 
#define __HAL_RCC_DTCMRAMEN_IS_CLK_ENABLED()   ((RCC->AHB1ENR & (RCC_AHB1ENR_DTCMRAMEN)) != RESET)
 
#define __HAL_RCC_FMC_IS_CLK_DISABLED()   ((RCC->AHB3ENR & (RCC_AHB3ENR_FMCEN)) == RESET)
 
#define __HAL_RCC_FMC_IS_CLK_ENABLED()   ((RCC->AHB3ENR & (RCC_AHB3ENR_FMCEN)) != RESET)
 Get the enable or disable status of the AHB3 peripheral clock. More...
 
#define __HAL_RCC_GPIOA_IS_CLK_DISABLED()   ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOAEN)) == RESET)
 
#define __HAL_RCC_GPIOA_IS_CLK_ENABLED()   ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOAEN)) != RESET)
 
#define __HAL_RCC_GPIOB_IS_CLK_DISABLED()   ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOBEN)) == RESET)
 
#define __HAL_RCC_GPIOB_IS_CLK_ENABLED()   ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOBEN)) != RESET)
 
#define __HAL_RCC_GPIOC_IS_CLK_DISABLED()   ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOCEN)) == RESET)
 
#define __HAL_RCC_GPIOC_IS_CLK_ENABLED()   ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOCEN)) != RESET)
 
#define __HAL_RCC_GPIOD_IS_CLK_DISABLED()   ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIODEN)) == RESET)
 
#define __HAL_RCC_GPIOD_IS_CLK_ENABLED()   ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIODEN)) != RESET)
 
#define __HAL_RCC_GPIOE_IS_CLK_DISABLED()   ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOEEN)) == RESET)
 
#define __HAL_RCC_GPIOE_IS_CLK_ENABLED()   ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOEEN)) != RESET)
 
#define __HAL_RCC_GPIOF_IS_CLK_DISABLED()   ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOFEN)) == RESET)
 
#define __HAL_RCC_GPIOF_IS_CLK_ENABLED()   ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOFEN)) != RESET)
 
#define __HAL_RCC_GPIOG_IS_CLK_DISABLED()   ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOGEN)) == RESET)
 
#define __HAL_RCC_GPIOG_IS_CLK_ENABLED()   ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOGEN)) != RESET)
 
#define __HAL_RCC_GPIOH_IS_CLK_DISABLED()   ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOHEN)) == RESET)
 
#define __HAL_RCC_GPIOH_IS_CLK_ENABLED()   ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOHEN)) != RESET)
 
#define __HAL_RCC_GPIOI_IS_CLK_DISABLED()   ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOIEN)) == RESET)
 
#define __HAL_RCC_GPIOI_IS_CLK_ENABLED()   ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOIEN)) != RESET)
 
#define __HAL_RCC_I2C1_IS_CLK_DISABLED()   ((RCC->APB1ENR & (RCC_APB1ENR_I2C1EN)) == RESET)
 
#define __HAL_RCC_I2C1_IS_CLK_ENABLED()   ((RCC->APB1ENR & (RCC_APB1ENR_I2C1EN)) != RESET)
 
#define __HAL_RCC_I2C2_IS_CLK_DISABLED()   ((RCC->APB1ENR & (RCC_APB1ENR_I2C2EN)) == RESET)
 
#define __HAL_RCC_I2C2_IS_CLK_ENABLED()   ((RCC->APB1ENR & (RCC_APB1ENR_I2C2EN)) != RESET)
 
#define __HAL_RCC_I2C3_IS_CLK_DISABLED()   ((RCC->APB1ENR & (RCC_APB1ENR_I2C3EN)) == RESET)
 
#define __HAL_RCC_I2C3_IS_CLK_ENABLED()   ((RCC->APB1ENR & (RCC_APB1ENR_I2C3EN)) != RESET)
 
#define __HAL_RCC_LPTIM1_IS_CLK_DISABLED()   ((RCC->APB1ENR & (RCC_APB1ENR_LPTIM1EN)) == RESET)
 
#define __HAL_RCC_LPTIM1_IS_CLK_ENABLED()   ((RCC->APB1ENR & (RCC_APB1ENR_LPTIM1EN)) != RESET)
 
#define __HAL_RCC_QSPI_IS_CLK_DISABLED()   ((RCC->AHB3ENR & (RCC_AHB3ENR_QSPIEN)) == RESET)
 
#define __HAL_RCC_QSPI_IS_CLK_ENABLED()   ((RCC->AHB3ENR & (RCC_AHB3ENR_QSPIEN)) != RESET)
 
#define __HAL_RCC_RNG_IS_CLK_DISABLED()   ((RCC->AHB2ENR & (RCC_AHB2ENR_RNGEN)) == RESET)
 
#define __HAL_RCC_RNG_IS_CLK_ENABLED()   ((RCC->AHB2ENR & (RCC_AHB2ENR_RNGEN)) != RESET)
 Get the enable or disable status of the AHB2 peripheral clock. More...
 
#define __HAL_RCC_SAI1_IS_CLK_DISABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_SAI1EN)) == RESET)
 
#define __HAL_RCC_SAI1_IS_CLK_ENABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_SAI1EN)) != RESET)
 
#define __HAL_RCC_SAI2_IS_CLK_DISABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_SAI2EN)) == RESET)
 
#define __HAL_RCC_SAI2_IS_CLK_ENABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_SAI2EN)) != RESET)
 
#define __HAL_RCC_SDMMC1_IS_CLK_DISABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_SDMMC1EN)) == RESET)
 
#define __HAL_RCC_SDMMC1_IS_CLK_ENABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_SDMMC1EN)) != RESET)
 
#define __HAL_RCC_SPI1_IS_CLK_DISABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_SPI1EN)) == RESET)
 
#define __HAL_RCC_SPI1_IS_CLK_ENABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_SPI1EN)) != RESET)
 
#define __HAL_RCC_SPI2_IS_CLK_DISABLED()   ((RCC->APB1ENR & (RCC_APB1ENR_SPI2EN)) == RESET)
 
#define __HAL_RCC_SPI2_IS_CLK_ENABLED()   ((RCC->APB1ENR & (RCC_APB1ENR_SPI2EN)) != RESET)
 
#define __HAL_RCC_SPI3_IS_CLK_DISABLED()   ((RCC->APB1ENR & (RCC_APB1ENR_SPI3EN)) == RESET)
 
#define __HAL_RCC_SPI3_IS_CLK_ENABLED()   ((RCC->APB1ENR & (RCC_APB1ENR_SPI3EN)) != RESET)
 
#define __HAL_RCC_SPI4_IS_CLK_DISABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_SPI4EN)) == RESET)
 
#define __HAL_RCC_SPI4_IS_CLK_ENABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_SPI4EN)) != RESET)
 
#define __HAL_RCC_SPI5_IS_CLK_DISABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_SPI5EN)) == RESET)
 
#define __HAL_RCC_SPI5_IS_CLK_ENABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_SPI5EN)) != RESET)
 
#define __HAL_RCC_SPI6_IS_CLK_DISABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_SPI6EN)) == RESET)
 
#define __HAL_RCC_SPI6_IS_CLK_ENABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_SPI6EN)) != RESET)
 
#define __HAL_RCC_TIM10_IS_CLK_DISABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_TIM10EN)) == RESET)
 
#define __HAL_RCC_TIM10_IS_CLK_ENABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_TIM10EN)) != RESET)
 
#define __HAL_RCC_TIM11_IS_CLK_DISABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_TIM11EN)) == RESET)
 
#define __HAL_RCC_TIM11_IS_CLK_ENABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_TIM11EN)) != RESET)
 
#define __HAL_RCC_TIM12_IS_CLK_DISABLED()   ((RCC->APB1ENR & (RCC_APB1ENR_TIM12EN)) == RESET)
 
#define __HAL_RCC_TIM12_IS_CLK_ENABLED()   ((RCC->APB1ENR & (RCC_APB1ENR_TIM12EN)) != RESET)
 
#define __HAL_RCC_TIM13_IS_CLK_DISABLED()   ((RCC->APB1ENR & (RCC_APB1ENR_TIM13EN)) == RESET)
 
#define __HAL_RCC_TIM13_IS_CLK_ENABLED()   ((RCC->APB1ENR & (RCC_APB1ENR_TIM13EN)) != RESET)
 
#define __HAL_RCC_TIM14_IS_CLK_DISABLED()   ((RCC->APB1ENR & (RCC_APB1ENR_TIM14EN)) == RESET)
 
#define __HAL_RCC_TIM14_IS_CLK_ENABLED()   ((RCC->APB1ENR & (RCC_APB1ENR_TIM14EN)) != RESET)
 
#define __HAL_RCC_TIM1_IS_CLK_DISABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_TIM1EN)) == RESET)
 
#define __HAL_RCC_TIM1_IS_CLK_ENABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_TIM1EN)) != RESET)
 Get the enable or disable status of the APB2 peripheral clock. More...
 
#define __HAL_RCC_TIM2_IS_CLK_DISABLED()   ((RCC->APB1ENR & (RCC_APB1ENR_TIM2EN)) == RESET)
 
#define __HAL_RCC_TIM2_IS_CLK_ENABLED()   ((RCC->APB1ENR & (RCC_APB1ENR_TIM2EN)) != RESET)
 Get the enable or disable status of the APB1 peripheral clock. More...
 
#define __HAL_RCC_TIM3_IS_CLK_DISABLED()   ((RCC->APB1ENR & (RCC_APB1ENR_TIM3EN)) == RESET)
 
#define __HAL_RCC_TIM3_IS_CLK_ENABLED()   ((RCC->APB1ENR & (RCC_APB1ENR_TIM3EN)) != RESET)
 
#define __HAL_RCC_TIM4_IS_CLK_DISABLED()   ((RCC->APB1ENR & (RCC_APB1ENR_TIM4EN)) == RESET)
 
#define __HAL_RCC_TIM4_IS_CLK_ENABLED()   ((RCC->APB1ENR & (RCC_APB1ENR_TIM4EN)) != RESET)
 
#define __HAL_RCC_TIM5_IS_CLK_DISABLED()   ((RCC->APB1ENR & (RCC_APB1ENR_TIM5EN)) == RESET)
 
#define __HAL_RCC_TIM5_IS_CLK_ENABLED()   ((RCC->APB1ENR & (RCC_APB1ENR_TIM5EN)) != RESET)
 
#define __HAL_RCC_TIM6_IS_CLK_DISABLED()   ((RCC->APB1ENR & (RCC_APB1ENR_TIM6EN)) == RESET)
 
#define __HAL_RCC_TIM6_IS_CLK_ENABLED()   ((RCC->APB1ENR & (RCC_APB1ENR_TIM6EN)) != RESET)
 
#define __HAL_RCC_TIM7_IS_CLK_DISABLED()   ((RCC->APB1ENR & (RCC_APB1ENR_TIM7EN)) == RESET)
 
#define __HAL_RCC_TIM7_IS_CLK_ENABLED()   ((RCC->APB1ENR & (RCC_APB1ENR_TIM7EN)) != RESET)
 
#define __HAL_RCC_TIM8_IS_CLK_DISABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_TIM8EN)) == RESET)
 
#define __HAL_RCC_TIM8_IS_CLK_ENABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_TIM8EN)) != RESET)
 
#define __HAL_RCC_TIM9_IS_CLK_DISABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_TIM9EN)) == RESET)
 
#define __HAL_RCC_TIM9_IS_CLK_ENABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_TIM9EN)) != RESET)
 
#define __HAL_RCC_UART4_IS_CLK_DISABLED()   ((RCC->APB1ENR & (RCC_APB1ENR_UART4EN)) == RESET)
 
#define __HAL_RCC_UART4_IS_CLK_ENABLED()   ((RCC->APB1ENR & (RCC_APB1ENR_UART4EN)) != RESET)
 
#define __HAL_RCC_UART5_IS_CLK_DISABLED()   ((RCC->APB1ENR & (RCC_APB1ENR_UART5EN)) == RESET)
 
#define __HAL_RCC_UART5_IS_CLK_ENABLED()   ((RCC->APB1ENR & (RCC_APB1ENR_UART5EN)) != RESET)
 
#define __HAL_RCC_UART7_IS_CLK_DISABLED()   ((RCC->APB1ENR & (RCC_APB1ENR_UART7EN)) == RESET)
 
#define __HAL_RCC_UART7_IS_CLK_ENABLED()   ((RCC->APB1ENR & (RCC_APB1ENR_UART7EN)) != RESET)
 
#define __HAL_RCC_UART8_IS_CLK_DISABLED()   ((RCC->APB1ENR & (RCC_APB1ENR_UART8EN)) == RESET)
 
#define __HAL_RCC_UART8_IS_CLK_ENABLED()   ((RCC->APB1ENR & (RCC_APB1ENR_UART8EN)) != RESET)
 
#define __HAL_RCC_USART1_IS_CLK_DISABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_USART1EN)) == RESET)
 
#define __HAL_RCC_USART1_IS_CLK_ENABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_USART1EN)) != RESET)
 
#define __HAL_RCC_USART2_IS_CLK_DISABLED()   ((RCC->APB1ENR & (RCC_APB1ENR_USART2EN)) == RESET)
 
#define __HAL_RCC_USART2_IS_CLK_ENABLED()   ((RCC->APB1ENR & (RCC_APB1ENR_USART2EN)) != RESET)
 
#define __HAL_RCC_USART3_IS_CLK_DISABLED()   ((RCC->APB1ENR & (RCC_APB1ENR_USART3EN)) == RESET)
 
#define __HAL_RCC_USART3_IS_CLK_ENABLED()   ((RCC->APB1ENR & (RCC_APB1ENR_USART3EN)) != RESET)
 
#define __HAL_RCC_USART6_IS_CLK_DISABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_USART6EN)) == RESET)
 
#define __HAL_RCC_USART6_IS_CLK_ENABLED()   ((RCC->APB2ENR & (RCC_APB2ENR_USART6EN)) != RESET)
 
#define __HAL_RCC_USB_IS_OTG_FS_CLK_DISABLED()   ((RCC->AHB2ENR & (RCC_AHB2ENR_OTGFSEN)) == RESET)
 
#define __HAL_RCC_USB_OTG_FS_IS_CLK_ENABLED()   ((RCC->AHB2ENR & (RCC_AHB2ENR_OTGFSEN)) != RESET)
 
#define __HAL_RCC_USB_OTG_HS_IS_CLK_DISABLED()   ((RCC->AHB1ENR & (RCC_AHB1ENR_OTGHSEN)) == RESET)
 
#define __HAL_RCC_USB_OTG_HS_IS_CLK_ENABLED()   ((RCC->AHB1ENR & (RCC_AHB1ENR_OTGHSEN)) != RESET)
 
#define __HAL_RCC_USB_OTG_HS_ULPI_IS_CLK_DISABLED()   ((RCC->AHB1ENR & (RCC_AHB1ENR_OTGHSULPIEN)) == RESET)
 
#define __HAL_RCC_USB_OTG_HS_ULPI_IS_CLK_ENABLED()   ((RCC->AHB1ENR & (RCC_AHB1ENR_OTGHSULPIEN)) != RESET)
 

Detailed Description

Get the enable or disable status of the AHB/APB peripheral clock.

Note
After reset, the peripheral clock (used for registers read/write access) is disabled and the application software has to enable this clock before using it.

Macro Definition Documentation

◆ __HAL_RCC_ADC1_IS_CLK_DISABLED

#define __HAL_RCC_ADC1_IS_CLK_DISABLED ( )    ((RCC->APB2ENR & (RCC_APB2ENR_ADC1EN)) == RESET)

Definition at line 1694 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_ADC1_IS_CLK_ENABLED

#define __HAL_RCC_ADC1_IS_CLK_ENABLED ( )    ((RCC->APB2ENR & (RCC_APB2ENR_ADC1EN)) != RESET)

Definition at line 1659 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_ADC2_IS_CLK_DISABLED

#define __HAL_RCC_ADC2_IS_CLK_DISABLED ( )    ((RCC->APB2ENR & (RCC_APB2ENR_ADC2EN)) == RESET)

Definition at line 1695 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_ADC2_IS_CLK_ENABLED

#define __HAL_RCC_ADC2_IS_CLK_ENABLED ( )    ((RCC->APB2ENR & (RCC_APB2ENR_ADC2EN)) != RESET)

Definition at line 1660 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_ADC3_IS_CLK_DISABLED

#define __HAL_RCC_ADC3_IS_CLK_DISABLED ( )    ((RCC->APB2ENR & (RCC_APB2ENR_ADC3EN)) == RESET)

Definition at line 1696 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_ADC3_IS_CLK_ENABLED

#define __HAL_RCC_ADC3_IS_CLK_ENABLED ( )    ((RCC->APB2ENR & (RCC_APB2ENR_ADC3EN)) != RESET)

Definition at line 1661 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_BKPSRAM_IS_CLK_DISABLED

#define __HAL_RCC_BKPSRAM_IS_CLK_DISABLED ( )    ((RCC->AHB1ENR & (RCC_AHB1ENR_BKPSRAMEN)) == RESET)

Definition at line 1476 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_BKPSRAM_IS_CLK_ENABLED

#define __HAL_RCC_BKPSRAM_IS_CLK_ENABLED ( )    ((RCC->AHB1ENR & (RCC_AHB1ENR_BKPSRAMEN)) != RESET)

Get the enable or disable status of the AHB1 peripheral clock.

Note
After reset, the peripheral clock (used for registers read/write access) is disabled and the application software has to enable this clock before using it.

Definition at line 1454 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_CAN1_IS_CLK_DISABLED

#define __HAL_RCC_CAN1_IS_CLK_DISABLED ( )    ((RCC->APB1ENR & (RCC_APB1ENR_CAN1EN)) == RESET)

Definition at line 1624 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_CAN1_IS_CLK_ENABLED

#define __HAL_RCC_CAN1_IS_CLK_ENABLED ( )    ((RCC->APB1ENR & (RCC_APB1ENR_CAN1EN)) != RESET)

Definition at line 1597 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_DAC_IS_CLK_DISABLED

#define __HAL_RCC_DAC_IS_CLK_DISABLED ( )    ((RCC->APB1ENR & (RCC_APB1ENR_DACEN)) == RESET)

Definition at line 1625 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_DAC_IS_CLK_ENABLED

#define __HAL_RCC_DAC_IS_CLK_ENABLED ( )    ((RCC->APB1ENR & (RCC_APB1ENR_DACEN)) != RESET)

Definition at line 1598 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_DMA2_IS_CLK_DISABLED

#define __HAL_RCC_DMA2_IS_CLK_DISABLED ( )    ((RCC->AHB1ENR & (RCC_AHB1ENR_DMA2EN)) == RESET)

Definition at line 1478 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_DMA2_IS_CLK_ENABLED

#define __HAL_RCC_DMA2_IS_CLK_ENABLED ( )    ((RCC->AHB1ENR & (RCC_AHB1ENR_DMA2EN)) != RESET)

Definition at line 1456 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_DTCMRAMEN_IS_CLK_DISABLED

#define __HAL_RCC_DTCMRAMEN_IS_CLK_DISABLED ( )    ((RCC->AHB1ENR & (RCC_AHB1ENR_DTCMRAMEN)) == RESET)

Definition at line 1477 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_DTCMRAMEN_IS_CLK_ENABLED

#define __HAL_RCC_DTCMRAMEN_IS_CLK_ENABLED ( )    ((RCC->AHB1ENR & (RCC_AHB1ENR_DTCMRAMEN)) != RESET)

Definition at line 1455 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_FMC_IS_CLK_DISABLED

#define __HAL_RCC_FMC_IS_CLK_DISABLED ( )    ((RCC->AHB3ENR & (RCC_AHB3ENR_FMCEN)) == RESET)

Definition at line 1567 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_FMC_IS_CLK_ENABLED

#define __HAL_RCC_FMC_IS_CLK_ENABLED ( )    ((RCC->AHB3ENR & (RCC_AHB3ENR_FMCEN)) != RESET)

Get the enable or disable status of the AHB3 peripheral clock.

Note
After reset, the peripheral clock (used for registers read/write access) is disabled and the application software has to enable this clock before using it.

Definition at line 1564 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_GPIOA_IS_CLK_DISABLED

#define __HAL_RCC_GPIOA_IS_CLK_DISABLED ( )    ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOAEN)) == RESET)

Definition at line 1481 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_GPIOA_IS_CLK_ENABLED

#define __HAL_RCC_GPIOA_IS_CLK_ENABLED ( )    ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOAEN)) != RESET)

Definition at line 1459 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_GPIOB_IS_CLK_DISABLED

#define __HAL_RCC_GPIOB_IS_CLK_DISABLED ( )    ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOBEN)) == RESET)

Definition at line 1482 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_GPIOB_IS_CLK_ENABLED

#define __HAL_RCC_GPIOB_IS_CLK_ENABLED ( )    ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOBEN)) != RESET)

Definition at line 1460 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_GPIOC_IS_CLK_DISABLED

#define __HAL_RCC_GPIOC_IS_CLK_DISABLED ( )    ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOCEN)) == RESET)

Definition at line 1483 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_GPIOC_IS_CLK_ENABLED

#define __HAL_RCC_GPIOC_IS_CLK_ENABLED ( )    ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOCEN)) != RESET)

Definition at line 1461 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_GPIOD_IS_CLK_DISABLED

#define __HAL_RCC_GPIOD_IS_CLK_DISABLED ( )    ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIODEN)) == RESET)

Definition at line 1484 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_GPIOD_IS_CLK_ENABLED

#define __HAL_RCC_GPIOD_IS_CLK_ENABLED ( )    ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIODEN)) != RESET)

Definition at line 1462 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_GPIOE_IS_CLK_DISABLED

#define __HAL_RCC_GPIOE_IS_CLK_DISABLED ( )    ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOEEN)) == RESET)

Definition at line 1485 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_GPIOE_IS_CLK_ENABLED

#define __HAL_RCC_GPIOE_IS_CLK_ENABLED ( )    ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOEEN)) != RESET)

Definition at line 1463 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_GPIOF_IS_CLK_DISABLED

#define __HAL_RCC_GPIOF_IS_CLK_DISABLED ( )    ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOFEN)) == RESET)

Definition at line 1486 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_GPIOF_IS_CLK_ENABLED

#define __HAL_RCC_GPIOF_IS_CLK_ENABLED ( )    ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOFEN)) != RESET)

Definition at line 1464 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_GPIOG_IS_CLK_DISABLED

#define __HAL_RCC_GPIOG_IS_CLK_DISABLED ( )    ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOGEN)) == RESET)

Definition at line 1487 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_GPIOG_IS_CLK_ENABLED

#define __HAL_RCC_GPIOG_IS_CLK_ENABLED ( )    ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOGEN)) != RESET)

Definition at line 1465 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_GPIOH_IS_CLK_DISABLED

#define __HAL_RCC_GPIOH_IS_CLK_DISABLED ( )    ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOHEN)) == RESET)

Definition at line 1488 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_GPIOH_IS_CLK_ENABLED

#define __HAL_RCC_GPIOH_IS_CLK_ENABLED ( )    ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOHEN)) != RESET)

Definition at line 1466 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_GPIOI_IS_CLK_DISABLED

#define __HAL_RCC_GPIOI_IS_CLK_DISABLED ( )    ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOIEN)) == RESET)

Definition at line 1489 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_GPIOI_IS_CLK_ENABLED

#define __HAL_RCC_GPIOI_IS_CLK_ENABLED ( )    ((RCC->AHB1ENR & (RCC_AHB1ENR_GPIOIEN)) != RESET)

Definition at line 1467 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_I2C1_IS_CLK_DISABLED

#define __HAL_RCC_I2C1_IS_CLK_DISABLED ( )    ((RCC->APB1ENR & (RCC_APB1ENR_I2C1EN)) == RESET)

Definition at line 1621 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_I2C1_IS_CLK_ENABLED

#define __HAL_RCC_I2C1_IS_CLK_ENABLED ( )    ((RCC->APB1ENR & (RCC_APB1ENR_I2C1EN)) != RESET)

Definition at line 1594 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_I2C2_IS_CLK_DISABLED

#define __HAL_RCC_I2C2_IS_CLK_DISABLED ( )    ((RCC->APB1ENR & (RCC_APB1ENR_I2C2EN)) == RESET)

Definition at line 1622 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_I2C2_IS_CLK_ENABLED

#define __HAL_RCC_I2C2_IS_CLK_ENABLED ( )    ((RCC->APB1ENR & (RCC_APB1ENR_I2C2EN)) != RESET)

Definition at line 1595 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_I2C3_IS_CLK_DISABLED

#define __HAL_RCC_I2C3_IS_CLK_DISABLED ( )    ((RCC->APB1ENR & (RCC_APB1ENR_I2C3EN)) == RESET)

Definition at line 1623 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_I2C3_IS_CLK_ENABLED

#define __HAL_RCC_I2C3_IS_CLK_ENABLED ( )    ((RCC->APB1ENR & (RCC_APB1ENR_I2C3EN)) != RESET)

Definition at line 1596 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_LPTIM1_IS_CLK_DISABLED

#define __HAL_RCC_LPTIM1_IS_CLK_DISABLED ( )    ((RCC->APB1ENR & (RCC_APB1ENR_LPTIM1EN)) == RESET)

Definition at line 1611 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_LPTIM1_IS_CLK_ENABLED

#define __HAL_RCC_LPTIM1_IS_CLK_ENABLED ( )    ((RCC->APB1ENR & (RCC_APB1ENR_LPTIM1EN)) != RESET)

Definition at line 1584 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_QSPI_IS_CLK_DISABLED

#define __HAL_RCC_QSPI_IS_CLK_DISABLED ( )    ((RCC->AHB3ENR & (RCC_AHB3ENR_QSPIEN)) == RESET)

Definition at line 1568 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_QSPI_IS_CLK_ENABLED

#define __HAL_RCC_QSPI_IS_CLK_ENABLED ( )    ((RCC->AHB3ENR & (RCC_AHB3ENR_QSPIEN)) != RESET)

Definition at line 1565 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_RNG_IS_CLK_DISABLED

#define __HAL_RCC_RNG_IS_CLK_DISABLED ( )    ((RCC->AHB2ENR & (RCC_AHB2ENR_RNGEN)) == RESET)

Definition at line 1532 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_RNG_IS_CLK_ENABLED

#define __HAL_RCC_RNG_IS_CLK_ENABLED ( )    ((RCC->AHB2ENR & (RCC_AHB2ENR_RNGEN)) != RESET)

Get the enable or disable status of the AHB2 peripheral clock.

Note
After reset, the peripheral clock (used for registers read/write access) is disabled and the application software has to enable this clock before using it.

Definition at line 1529 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_SAI1_IS_CLK_DISABLED

#define __HAL_RCC_SAI1_IS_CLK_DISABLED ( )    ((RCC->APB2ENR & (RCC_APB2ENR_SAI1EN)) == RESET)

Definition at line 1705 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_SAI1_IS_CLK_ENABLED

#define __HAL_RCC_SAI1_IS_CLK_ENABLED ( )    ((RCC->APB2ENR & (RCC_APB2ENR_SAI1EN)) != RESET)

Definition at line 1670 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_SAI2_IS_CLK_DISABLED

#define __HAL_RCC_SAI2_IS_CLK_DISABLED ( )    ((RCC->APB2ENR & (RCC_APB2ENR_SAI2EN)) == RESET)

Definition at line 1706 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_SAI2_IS_CLK_ENABLED

#define __HAL_RCC_SAI2_IS_CLK_ENABLED ( )    ((RCC->APB2ENR & (RCC_APB2ENR_SAI2EN)) != RESET)

Definition at line 1671 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_SDMMC1_IS_CLK_DISABLED

#define __HAL_RCC_SDMMC1_IS_CLK_DISABLED ( )    ((RCC->APB2ENR & (RCC_APB2ENR_SDMMC1EN)) == RESET)

Definition at line 1697 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_SDMMC1_IS_CLK_ENABLED

#define __HAL_RCC_SDMMC1_IS_CLK_ENABLED ( )    ((RCC->APB2ENR & (RCC_APB2ENR_SDMMC1EN)) != RESET)

Definition at line 1662 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_SPI1_IS_CLK_DISABLED

#define __HAL_RCC_SPI1_IS_CLK_DISABLED ( )    ((RCC->APB2ENR & (RCC_APB2ENR_SPI1EN)) == RESET)

Definition at line 1698 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_SPI1_IS_CLK_ENABLED

#define __HAL_RCC_SPI1_IS_CLK_ENABLED ( )    ((RCC->APB2ENR & (RCC_APB2ENR_SPI1EN)) != RESET)

Definition at line 1663 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_SPI2_IS_CLK_DISABLED

#define __HAL_RCC_SPI2_IS_CLK_DISABLED ( )    ((RCC->APB1ENR & (RCC_APB1ENR_SPI2EN)) == RESET)

Definition at line 1615 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_SPI2_IS_CLK_ENABLED

#define __HAL_RCC_SPI2_IS_CLK_ENABLED ( )    ((RCC->APB1ENR & (RCC_APB1ENR_SPI2EN)) != RESET)

Definition at line 1588 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_SPI3_IS_CLK_DISABLED

#define __HAL_RCC_SPI3_IS_CLK_DISABLED ( )    ((RCC->APB1ENR & (RCC_APB1ENR_SPI3EN)) == RESET)

Definition at line 1616 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_SPI3_IS_CLK_ENABLED

#define __HAL_RCC_SPI3_IS_CLK_ENABLED ( )    ((RCC->APB1ENR & (RCC_APB1ENR_SPI3EN)) != RESET)

Definition at line 1589 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_SPI4_IS_CLK_DISABLED

#define __HAL_RCC_SPI4_IS_CLK_DISABLED ( )    ((RCC->APB2ENR & (RCC_APB2ENR_SPI4EN)) == RESET)

Definition at line 1699 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_SPI4_IS_CLK_ENABLED

#define __HAL_RCC_SPI4_IS_CLK_ENABLED ( )    ((RCC->APB2ENR & (RCC_APB2ENR_SPI4EN)) != RESET)

Definition at line 1664 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_SPI5_IS_CLK_DISABLED

#define __HAL_RCC_SPI5_IS_CLK_DISABLED ( )    ((RCC->APB2ENR & (RCC_APB2ENR_SPI5EN)) == RESET)

Definition at line 1703 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_SPI5_IS_CLK_ENABLED

#define __HAL_RCC_SPI5_IS_CLK_ENABLED ( )    ((RCC->APB2ENR & (RCC_APB2ENR_SPI5EN)) != RESET)

Definition at line 1668 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_SPI6_IS_CLK_DISABLED

#define __HAL_RCC_SPI6_IS_CLK_DISABLED ( )    ((RCC->APB2ENR & (RCC_APB2ENR_SPI6EN)) == RESET)

Definition at line 1704 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_SPI6_IS_CLK_ENABLED

#define __HAL_RCC_SPI6_IS_CLK_ENABLED ( )    ((RCC->APB2ENR & (RCC_APB2ENR_SPI6EN)) != RESET)

Definition at line 1669 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_TIM10_IS_CLK_DISABLED

#define __HAL_RCC_TIM10_IS_CLK_DISABLED ( )    ((RCC->APB2ENR & (RCC_APB2ENR_TIM10EN)) == RESET)

Definition at line 1701 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_TIM10_IS_CLK_ENABLED

#define __HAL_RCC_TIM10_IS_CLK_ENABLED ( )    ((RCC->APB2ENR & (RCC_APB2ENR_TIM10EN)) != RESET)

Definition at line 1666 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_TIM11_IS_CLK_DISABLED

#define __HAL_RCC_TIM11_IS_CLK_DISABLED ( )    ((RCC->APB2ENR & (RCC_APB2ENR_TIM11EN)) == RESET)

Definition at line 1702 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_TIM11_IS_CLK_ENABLED

#define __HAL_RCC_TIM11_IS_CLK_ENABLED ( )    ((RCC->APB2ENR & (RCC_APB2ENR_TIM11EN)) != RESET)

Definition at line 1667 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_TIM12_IS_CLK_DISABLED

#define __HAL_RCC_TIM12_IS_CLK_DISABLED ( )    ((RCC->APB1ENR & (RCC_APB1ENR_TIM12EN)) == RESET)

Definition at line 1608 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_TIM12_IS_CLK_ENABLED

#define __HAL_RCC_TIM12_IS_CLK_ENABLED ( )    ((RCC->APB1ENR & (RCC_APB1ENR_TIM12EN)) != RESET)

Definition at line 1581 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_TIM13_IS_CLK_DISABLED

#define __HAL_RCC_TIM13_IS_CLK_DISABLED ( )    ((RCC->APB1ENR & (RCC_APB1ENR_TIM13EN)) == RESET)

Definition at line 1609 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_TIM13_IS_CLK_ENABLED

#define __HAL_RCC_TIM13_IS_CLK_ENABLED ( )    ((RCC->APB1ENR & (RCC_APB1ENR_TIM13EN)) != RESET)

Definition at line 1582 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_TIM14_IS_CLK_DISABLED

#define __HAL_RCC_TIM14_IS_CLK_DISABLED ( )    ((RCC->APB1ENR & (RCC_APB1ENR_TIM14EN)) == RESET)

Definition at line 1610 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_TIM14_IS_CLK_ENABLED

#define __HAL_RCC_TIM14_IS_CLK_ENABLED ( )    ((RCC->APB1ENR & (RCC_APB1ENR_TIM14EN)) != RESET)

Definition at line 1583 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_TIM1_IS_CLK_DISABLED

#define __HAL_RCC_TIM1_IS_CLK_DISABLED ( )    ((RCC->APB2ENR & (RCC_APB2ENR_TIM1EN)) == RESET)

Definition at line 1690 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_TIM1_IS_CLK_ENABLED

#define __HAL_RCC_TIM1_IS_CLK_ENABLED ( )    ((RCC->APB2ENR & (RCC_APB2ENR_TIM1EN)) != RESET)

Get the enable or disable status of the APB2 peripheral clock.

Note
After reset, the peripheral clock (used for registers read/write access) is disabled and the application software has to enable this clock before using it.

Definition at line 1655 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_TIM2_IS_CLK_DISABLED

#define __HAL_RCC_TIM2_IS_CLK_DISABLED ( )    ((RCC->APB1ENR & (RCC_APB1ENR_TIM2EN)) == RESET)

Definition at line 1602 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_TIM2_IS_CLK_ENABLED

#define __HAL_RCC_TIM2_IS_CLK_ENABLED ( )    ((RCC->APB1ENR & (RCC_APB1ENR_TIM2EN)) != RESET)

Get the enable or disable status of the APB1 peripheral clock.

Note
After reset, the peripheral clock (used for registers read/write access) is disabled and the application software has to enable this clock before using it.

Definition at line 1575 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_TIM3_IS_CLK_DISABLED

#define __HAL_RCC_TIM3_IS_CLK_DISABLED ( )    ((RCC->APB1ENR & (RCC_APB1ENR_TIM3EN)) == RESET)

Definition at line 1603 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_TIM3_IS_CLK_ENABLED

#define __HAL_RCC_TIM3_IS_CLK_ENABLED ( )    ((RCC->APB1ENR & (RCC_APB1ENR_TIM3EN)) != RESET)

Definition at line 1576 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_TIM4_IS_CLK_DISABLED

#define __HAL_RCC_TIM4_IS_CLK_DISABLED ( )    ((RCC->APB1ENR & (RCC_APB1ENR_TIM4EN)) == RESET)

Definition at line 1604 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_TIM4_IS_CLK_ENABLED

#define __HAL_RCC_TIM4_IS_CLK_ENABLED ( )    ((RCC->APB1ENR & (RCC_APB1ENR_TIM4EN)) != RESET)

Definition at line 1577 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_TIM5_IS_CLK_DISABLED

#define __HAL_RCC_TIM5_IS_CLK_DISABLED ( )    ((RCC->APB1ENR & (RCC_APB1ENR_TIM5EN)) == RESET)

Definition at line 1605 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_TIM5_IS_CLK_ENABLED

#define __HAL_RCC_TIM5_IS_CLK_ENABLED ( )    ((RCC->APB1ENR & (RCC_APB1ENR_TIM5EN)) != RESET)

Definition at line 1578 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_TIM6_IS_CLK_DISABLED

#define __HAL_RCC_TIM6_IS_CLK_DISABLED ( )    ((RCC->APB1ENR & (RCC_APB1ENR_TIM6EN)) == RESET)

Definition at line 1606 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_TIM6_IS_CLK_ENABLED

#define __HAL_RCC_TIM6_IS_CLK_ENABLED ( )    ((RCC->APB1ENR & (RCC_APB1ENR_TIM6EN)) != RESET)

Definition at line 1579 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_TIM7_IS_CLK_DISABLED

#define __HAL_RCC_TIM7_IS_CLK_DISABLED ( )    ((RCC->APB1ENR & (RCC_APB1ENR_TIM7EN)) == RESET)

Definition at line 1607 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_TIM7_IS_CLK_ENABLED

#define __HAL_RCC_TIM7_IS_CLK_ENABLED ( )    ((RCC->APB1ENR & (RCC_APB1ENR_TIM7EN)) != RESET)

Definition at line 1580 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_TIM8_IS_CLK_DISABLED

#define __HAL_RCC_TIM8_IS_CLK_DISABLED ( )    ((RCC->APB2ENR & (RCC_APB2ENR_TIM8EN)) == RESET)

Definition at line 1691 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_TIM8_IS_CLK_ENABLED

#define __HAL_RCC_TIM8_IS_CLK_ENABLED ( )    ((RCC->APB2ENR & (RCC_APB2ENR_TIM8EN)) != RESET)

Definition at line 1656 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_TIM9_IS_CLK_DISABLED

#define __HAL_RCC_TIM9_IS_CLK_DISABLED ( )    ((RCC->APB2ENR & (RCC_APB2ENR_TIM9EN)) == RESET)

Definition at line 1700 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_TIM9_IS_CLK_ENABLED

#define __HAL_RCC_TIM9_IS_CLK_ENABLED ( )    ((RCC->APB2ENR & (RCC_APB2ENR_TIM9EN)) != RESET)

Definition at line 1665 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_UART4_IS_CLK_DISABLED

#define __HAL_RCC_UART4_IS_CLK_DISABLED ( )    ((RCC->APB1ENR & (RCC_APB1ENR_UART4EN)) == RESET)

Definition at line 1619 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_UART4_IS_CLK_ENABLED

#define __HAL_RCC_UART4_IS_CLK_ENABLED ( )    ((RCC->APB1ENR & (RCC_APB1ENR_UART4EN)) != RESET)

Definition at line 1592 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_UART5_IS_CLK_DISABLED

#define __HAL_RCC_UART5_IS_CLK_DISABLED ( )    ((RCC->APB1ENR & (RCC_APB1ENR_UART5EN)) == RESET)

Definition at line 1620 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_UART5_IS_CLK_ENABLED

#define __HAL_RCC_UART5_IS_CLK_ENABLED ( )    ((RCC->APB1ENR & (RCC_APB1ENR_UART5EN)) != RESET)

Definition at line 1593 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_UART7_IS_CLK_DISABLED

#define __HAL_RCC_UART7_IS_CLK_DISABLED ( )    ((RCC->APB1ENR & (RCC_APB1ENR_UART7EN)) == RESET)

Definition at line 1626 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_UART7_IS_CLK_ENABLED

#define __HAL_RCC_UART7_IS_CLK_ENABLED ( )    ((RCC->APB1ENR & (RCC_APB1ENR_UART7EN)) != RESET)

Definition at line 1599 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_UART8_IS_CLK_DISABLED

#define __HAL_RCC_UART8_IS_CLK_DISABLED ( )    ((RCC->APB1ENR & (RCC_APB1ENR_UART8EN)) == RESET)

Definition at line 1627 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_UART8_IS_CLK_ENABLED

#define __HAL_RCC_UART8_IS_CLK_ENABLED ( )    ((RCC->APB1ENR & (RCC_APB1ENR_UART8EN)) != RESET)

Definition at line 1600 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_USART1_IS_CLK_DISABLED

#define __HAL_RCC_USART1_IS_CLK_DISABLED ( )    ((RCC->APB2ENR & (RCC_APB2ENR_USART1EN)) == RESET)

Definition at line 1692 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_USART1_IS_CLK_ENABLED

#define __HAL_RCC_USART1_IS_CLK_ENABLED ( )    ((RCC->APB2ENR & (RCC_APB2ENR_USART1EN)) != RESET)

Definition at line 1657 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_USART2_IS_CLK_DISABLED

#define __HAL_RCC_USART2_IS_CLK_DISABLED ( )    ((RCC->APB1ENR & (RCC_APB1ENR_USART2EN)) == RESET)

Definition at line 1617 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_USART2_IS_CLK_ENABLED

#define __HAL_RCC_USART2_IS_CLK_ENABLED ( )    ((RCC->APB1ENR & (RCC_APB1ENR_USART2EN)) != RESET)

Definition at line 1590 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_USART3_IS_CLK_DISABLED

#define __HAL_RCC_USART3_IS_CLK_DISABLED ( )    ((RCC->APB1ENR & (RCC_APB1ENR_USART3EN)) == RESET)

Definition at line 1618 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_USART3_IS_CLK_ENABLED

#define __HAL_RCC_USART3_IS_CLK_ENABLED ( )    ((RCC->APB1ENR & (RCC_APB1ENR_USART3EN)) != RESET)

Definition at line 1591 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_USART6_IS_CLK_DISABLED

#define __HAL_RCC_USART6_IS_CLK_DISABLED ( )    ((RCC->APB2ENR & (RCC_APB2ENR_USART6EN)) == RESET)

Definition at line 1693 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_USART6_IS_CLK_ENABLED

#define __HAL_RCC_USART6_IS_CLK_ENABLED ( )    ((RCC->APB2ENR & (RCC_APB2ENR_USART6EN)) != RESET)

Definition at line 1658 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_USB_IS_OTG_FS_CLK_DISABLED

#define __HAL_RCC_USB_IS_OTG_FS_CLK_DISABLED ( )    ((RCC->AHB2ENR & (RCC_AHB2ENR_OTGFSEN)) == RESET)

Definition at line 1533 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_USB_OTG_FS_IS_CLK_ENABLED

#define __HAL_RCC_USB_OTG_FS_IS_CLK_ENABLED ( )    ((RCC->AHB2ENR & (RCC_AHB2ENR_OTGFSEN)) != RESET)

Definition at line 1530 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_USB_OTG_HS_IS_CLK_DISABLED

#define __HAL_RCC_USB_OTG_HS_IS_CLK_DISABLED ( )    ((RCC->AHB1ENR & (RCC_AHB1ENR_OTGHSEN)) == RESET)

Definition at line 1479 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_USB_OTG_HS_IS_CLK_ENABLED

#define __HAL_RCC_USB_OTG_HS_IS_CLK_ENABLED ( )    ((RCC->AHB1ENR & (RCC_AHB1ENR_OTGHSEN)) != RESET)

Definition at line 1457 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_USB_OTG_HS_ULPI_IS_CLK_DISABLED

#define __HAL_RCC_USB_OTG_HS_ULPI_IS_CLK_DISABLED ( )    ((RCC->AHB1ENR & (RCC_AHB1ENR_OTGHSULPIEN)) == RESET)

Definition at line 1480 of file stm32f7xx_hal_rcc_ex.h.

◆ __HAL_RCC_USB_OTG_HS_ULPI_IS_CLK_ENABLED

#define __HAL_RCC_USB_OTG_HS_ULPI_IS_CLK_ENABLED ( )    ((RCC->AHB1ENR & (RCC_AHB1ENR_OTGHSULPIEN)) != RESET)

Definition at line 1458 of file stm32f7xx_hal_rcc_ex.h.



picovoice_driver
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autogenerated on Fri Apr 1 2022 02:15:08