Macros | |
| #define | IOMUXC_SELECT_INPUT_COUNT (154U) |
| #define | IOMUXC_SW_MUX_CTL_PAD_COUNT (124U) |
| #define | IOMUXC_SW_PAD_CTL_PAD_COUNT (124U) |
SW_MUX_CTL_PAD - SW_MUX_CTL_PAD_GPIO_EMC_00 SW MUX Control Register..SW_MUX_CTL_PAD_GPIO_SD_B1_11 SW MUX Control Register | |
| #define | IOMUXC_SW_MUX_CTL_PAD_MUX_MODE_MASK (0x7U) |
| #define | IOMUXC_SW_MUX_CTL_PAD_MUX_MODE_SHIFT (0U) |
| #define | IOMUXC_SW_MUX_CTL_PAD_MUX_MODE(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SW_MUX_CTL_PAD_MUX_MODE_SHIFT)) & IOMUXC_SW_MUX_CTL_PAD_MUX_MODE_MASK) |
| #define | IOMUXC_SW_MUX_CTL_PAD_SION_MASK (0x10U) |
| #define | IOMUXC_SW_MUX_CTL_PAD_SION_SHIFT (4U) |
| #define | IOMUXC_SW_MUX_CTL_PAD_SION(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SW_MUX_CTL_PAD_SION_SHIFT)) & IOMUXC_SW_MUX_CTL_PAD_SION_MASK) |
SELECT_INPUT - ANATOP_USB_OTG1_ID_SELECT_INPUT DAISY Register..XBAR1_IN23_SELECT_INPUT DAISY Register | |
| #define | IOMUXC_SELECT_INPUT_DAISY_MASK (0x7U) /* Merged from fields with different position or width, of widths (1, 2, 3), largest definition used */ |
| #define | IOMUXC_SELECT_INPUT_DAISY_SHIFT (0U) |
| #define | IOMUXC_SELECT_INPUT_DAISY(x) (((uint32_t)(((uint32_t)(x)) << IOMUXC_SELECT_INPUT_DAISY_SHIFT)) & IOMUXC_SELECT_INPUT_DAISY_MASK) /* Merged from fields with different position or width, of widths (1, 2, 3), largest definition used */ |
Detailed Description
Macro Definition Documentation
◆ IOMUXC_SELECT_INPUT_COUNT
| #define IOMUXC_SELECT_INPUT_COUNT (154U) |
Definition at line 20824 of file MIMXRT1052.h.
◆ IOMUXC_SELECT_INPUT_DAISY
| #define IOMUXC_SELECT_INPUT_DAISY | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << IOMUXC_SELECT_INPUT_DAISY_SHIFT)) & IOMUXC_SELECT_INPUT_DAISY_MASK) /* Merged from fields with different position or width, of widths (1, 2, 3), largest definition used */ |
DAISY - Selecting Pads Involved in Daisy Chain. 0b0..Selecting Pad: GPIO_AD_B0_01 for Mode: ALT3 0b1..Selecting Pad: GPIO_AD_B1_02 for Mode: ALT0
Definition at line 20820 of file MIMXRT1052.h.
◆ IOMUXC_SELECT_INPUT_DAISY_MASK
| #define IOMUXC_SELECT_INPUT_DAISY_MASK (0x7U) /* Merged from fields with different position or width, of widths (1, 2, 3), largest definition used */ |
Definition at line 20814 of file MIMXRT1052.h.
◆ IOMUXC_SELECT_INPUT_DAISY_SHIFT
| #define IOMUXC_SELECT_INPUT_DAISY_SHIFT (0U) |
Definition at line 20815 of file MIMXRT1052.h.
◆ IOMUXC_SW_MUX_CTL_PAD_COUNT
| #define IOMUXC_SW_MUX_CTL_PAD_COUNT (124U) |
Definition at line 20737 of file MIMXRT1052.h.
◆ IOMUXC_SW_MUX_CTL_PAD_MUX_MODE
| #define IOMUXC_SW_MUX_CTL_PAD_MUX_MODE | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << IOMUXC_SW_MUX_CTL_PAD_MUX_MODE_SHIFT)) & IOMUXC_SW_MUX_CTL_PAD_MUX_MODE_MASK) |
MUX_MODE - MUX Mode Select Field. 0b000..Select mux mode: ALT0 mux port: SEMC_DATA00 of instance: semc 0b001..Select mux mode: ALT1 mux port: FLEXPWM4_PWMA00 of instance: flexpwm4 0b010..Select mux mode: ALT2 mux port: LPSPI2_SCK of instance: lpspi2 0b011..Select mux mode: ALT3 mux port: XBAR1_XBAR_IN02 of instance: xbar1 0b100..Select mux mode: ALT4 mux port: FLEXIO1_FLEXIO00 of instance: flexio1 0b101..Select mux mode: ALT5 mux port: GPIO4_IO00 of instance: gpio4
Definition at line 20726 of file MIMXRT1052.h.
◆ IOMUXC_SW_MUX_CTL_PAD_MUX_MODE_MASK
| #define IOMUXC_SW_MUX_CTL_PAD_MUX_MODE_MASK (0x7U) |
Definition at line 20716 of file MIMXRT1052.h.
◆ IOMUXC_SW_MUX_CTL_PAD_MUX_MODE_SHIFT
| #define IOMUXC_SW_MUX_CTL_PAD_MUX_MODE_SHIFT (0U) |
Definition at line 20717 of file MIMXRT1052.h.
◆ IOMUXC_SW_MUX_CTL_PAD_SION
| #define IOMUXC_SW_MUX_CTL_PAD_SION | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << IOMUXC_SW_MUX_CTL_PAD_SION_SHIFT)) & IOMUXC_SW_MUX_CTL_PAD_SION_MASK) |
SION - Software Input On Field. 0b1..Force input path of pad GPIO_EMC_00 0b0..Input Path is determined by functionality
Definition at line 20733 of file MIMXRT1052.h.
◆ IOMUXC_SW_MUX_CTL_PAD_SION_MASK
| #define IOMUXC_SW_MUX_CTL_PAD_SION_MASK (0x10U) |
Definition at line 20727 of file MIMXRT1052.h.
◆ IOMUXC_SW_MUX_CTL_PAD_SION_SHIFT
| #define IOMUXC_SW_MUX_CTL_PAD_SION_SHIFT (4U) |
Definition at line 20728 of file MIMXRT1052.h.
◆ IOMUXC_SW_PAD_CTL_PAD_COUNT
| #define IOMUXC_SW_PAD_CTL_PAD_COUNT (124U) |
Definition at line 20810 of file MIMXRT1052.h.
◆ IOMUXC_SW_PAD_CTL_PAD_DSE
| #define IOMUXC_SW_PAD_CTL_PAD_DSE | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << IOMUXC_SW_PAD_CTL_PAD_DSE_SHIFT)) & IOMUXC_SW_PAD_CTL_PAD_DSE_MASK) |
DSE - Drive Strength Field 0b000..output driver disabled; 0b001..R0(150 Ohm @ 3.3V, 260 Ohm@1.8V) 0b010..R0/2 0b011..R0/3 0b100..R0/4 0b101..R0/5 0b110..R0/6 0b111..R0/7
Definition at line 20760 of file MIMXRT1052.h.
◆ IOMUXC_SW_PAD_CTL_PAD_DSE_MASK
| #define IOMUXC_SW_PAD_CTL_PAD_DSE_MASK (0x38U) |
Definition at line 20748 of file MIMXRT1052.h.
◆ IOMUXC_SW_PAD_CTL_PAD_DSE_SHIFT
| #define IOMUXC_SW_PAD_CTL_PAD_DSE_SHIFT (3U) |
Definition at line 20749 of file MIMXRT1052.h.
◆ IOMUXC_SW_PAD_CTL_PAD_HYS
| #define IOMUXC_SW_PAD_CTL_PAD_HYS | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << IOMUXC_SW_PAD_CTL_PAD_HYS_SHIFT)) & IOMUXC_SW_PAD_CTL_PAD_HYS_MASK) |
HYS - Hyst. Enable Field 0b0..Hysteresis Disabled 0b1..Hysteresis Enabled
Definition at line 20806 of file MIMXRT1052.h.
◆ IOMUXC_SW_PAD_CTL_PAD_HYS_MASK
| #define IOMUXC_SW_PAD_CTL_PAD_HYS_MASK (0x10000U) |
Definition at line 20800 of file MIMXRT1052.h.
◆ IOMUXC_SW_PAD_CTL_PAD_HYS_SHIFT
| #define IOMUXC_SW_PAD_CTL_PAD_HYS_SHIFT (16U) |
Definition at line 20801 of file MIMXRT1052.h.
◆ IOMUXC_SW_PAD_CTL_PAD_ODE
| #define IOMUXC_SW_PAD_CTL_PAD_ODE | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << IOMUXC_SW_PAD_CTL_PAD_ODE_SHIFT)) & IOMUXC_SW_PAD_CTL_PAD_ODE_MASK) |
ODE - Open Drain Enable Field 0b0..Open Drain Disabled 0b1..Open Drain Enabled
Definition at line 20776 of file MIMXRT1052.h.
◆ IOMUXC_SW_PAD_CTL_PAD_ODE_MASK
| #define IOMUXC_SW_PAD_CTL_PAD_ODE_MASK (0x800U) |
Definition at line 20770 of file MIMXRT1052.h.
◆ IOMUXC_SW_PAD_CTL_PAD_ODE_SHIFT
| #define IOMUXC_SW_PAD_CTL_PAD_ODE_SHIFT (11U) |
Definition at line 20771 of file MIMXRT1052.h.
◆ IOMUXC_SW_PAD_CTL_PAD_PKE
| #define IOMUXC_SW_PAD_CTL_PAD_PKE | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << IOMUXC_SW_PAD_CTL_PAD_PKE_SHIFT)) & IOMUXC_SW_PAD_CTL_PAD_PKE_MASK) |
PKE - Pull / Keep Enable Field 0b0..Pull/Keeper Disabled 0b1..Pull/Keeper Enabled
Definition at line 20783 of file MIMXRT1052.h.
◆ IOMUXC_SW_PAD_CTL_PAD_PKE_MASK
| #define IOMUXC_SW_PAD_CTL_PAD_PKE_MASK (0x1000U) |
Definition at line 20777 of file MIMXRT1052.h.
◆ IOMUXC_SW_PAD_CTL_PAD_PKE_SHIFT
| #define IOMUXC_SW_PAD_CTL_PAD_PKE_SHIFT (12U) |
Definition at line 20778 of file MIMXRT1052.h.
◆ IOMUXC_SW_PAD_CTL_PAD_PUE
| #define IOMUXC_SW_PAD_CTL_PAD_PUE | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << IOMUXC_SW_PAD_CTL_PAD_PUE_SHIFT)) & IOMUXC_SW_PAD_CTL_PAD_PUE_MASK) |
PUE - Pull / Keep Select Field 0b0..Keeper 0b1..Pull
Definition at line 20790 of file MIMXRT1052.h.
◆ IOMUXC_SW_PAD_CTL_PAD_PUE_MASK
| #define IOMUXC_SW_PAD_CTL_PAD_PUE_MASK (0x2000U) |
Definition at line 20784 of file MIMXRT1052.h.
◆ IOMUXC_SW_PAD_CTL_PAD_PUE_SHIFT
| #define IOMUXC_SW_PAD_CTL_PAD_PUE_SHIFT (13U) |
Definition at line 20785 of file MIMXRT1052.h.
◆ IOMUXC_SW_PAD_CTL_PAD_PUS
| #define IOMUXC_SW_PAD_CTL_PAD_PUS | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << IOMUXC_SW_PAD_CTL_PAD_PUS_SHIFT)) & IOMUXC_SW_PAD_CTL_PAD_PUS_MASK) |
PUS - Pull Up / Down Config. Field 0b00..100K Ohm Pull Down 0b01..47K Ohm Pull Up 0b10..100K Ohm Pull Up 0b11..22K Ohm Pull Up
Definition at line 20799 of file MIMXRT1052.h.
◆ IOMUXC_SW_PAD_CTL_PAD_PUS_MASK
| #define IOMUXC_SW_PAD_CTL_PAD_PUS_MASK (0xC000U) |
Definition at line 20791 of file MIMXRT1052.h.
◆ IOMUXC_SW_PAD_CTL_PAD_PUS_SHIFT
| #define IOMUXC_SW_PAD_CTL_PAD_PUS_SHIFT (14U) |
Definition at line 20792 of file MIMXRT1052.h.
◆ IOMUXC_SW_PAD_CTL_PAD_SPEED
| #define IOMUXC_SW_PAD_CTL_PAD_SPEED | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << IOMUXC_SW_PAD_CTL_PAD_SPEED_SHIFT)) & IOMUXC_SW_PAD_CTL_PAD_SPEED_MASK) |
SPEED - Speed Field 0b00..low(50MHz) 0b01..medium(100MHz) 0b10..medium(100MHz) 0b11..max(200MHz)
Definition at line 20769 of file MIMXRT1052.h.
◆ IOMUXC_SW_PAD_CTL_PAD_SPEED_MASK
| #define IOMUXC_SW_PAD_CTL_PAD_SPEED_MASK (0xC0U) |
Definition at line 20761 of file MIMXRT1052.h.
◆ IOMUXC_SW_PAD_CTL_PAD_SPEED_SHIFT
| #define IOMUXC_SW_PAD_CTL_PAD_SPEED_SHIFT (6U) |
Definition at line 20762 of file MIMXRT1052.h.
◆ IOMUXC_SW_PAD_CTL_PAD_SRE
| #define IOMUXC_SW_PAD_CTL_PAD_SRE | ( | x | ) | (((uint32_t)(((uint32_t)(x)) << IOMUXC_SW_PAD_CTL_PAD_SRE_SHIFT)) & IOMUXC_SW_PAD_CTL_PAD_SRE_MASK) |
SRE - Slew Rate Field 0b0..Slow Slew Rate 0b1..Fast Slew Rate
Definition at line 20747 of file MIMXRT1052.h.
◆ IOMUXC_SW_PAD_CTL_PAD_SRE_MASK
| #define IOMUXC_SW_PAD_CTL_PAD_SRE_MASK (0x1U) |
Definition at line 20741 of file MIMXRT1052.h.
◆ IOMUXC_SW_PAD_CTL_PAD_SRE_SHIFT
| #define IOMUXC_SW_PAD_CTL_PAD_SRE_SHIFT (0U) |
Definition at line 20742 of file MIMXRT1052.h.