HAL ETH Aliased Defines maintained for legacy purpose

Macros
#define	DMAOMR_CLEAR_MASK   ETH_DMAOMR_CLEAR_MASK
#define	DMAOMR_CLEAR_MASK   ETH_DMAOMR_CLEAR_MASK
#define	DMAOMR_CLEAR_MASK   ETH_DMAOMR_CLEAR_MASK
#define	DMAOMR_CLEAR_MASK   ETH_DMAOMR_CLEAR_MASK
#define	DMAOMR_CLEAR_MASK   ETH_DMAOMR_CLEAR_MASK
#define	DMAOMR_CLEAR_MASK   ETH_DMAOMR_CLEAR_MASK
#define	ETH_MAC_MII_RECEIVE_PROTOCOL_ACTIVE   0x00000001U /* MAC MII receive protocol engine active */
#define	ETH_MAC_MII_RECEIVE_PROTOCOL_ACTIVE   0x00000001U /* MAC MII receive protocol engine active */
#define	ETH_MAC_MII_RECEIVE_PROTOCOL_ACTIVE   0x00000001U /* MAC MII receive protocol engine active */
#define	ETH_MAC_MII_RECEIVE_PROTOCOL_ACTIVE   0x00000001U /* MAC MII receive protocol engine active */
#define	ETH_MAC_MII_RECEIVE_PROTOCOL_ACTIVE   0x00000001U /* MAC MII receive protocol engine active */
#define	ETH_MAC_MII_RECEIVE_PROTOCOL_ACTIVE   0x00000001U /* MAC MII receive protocol engine active */
#define	ETH_MAC_MII_TRANSMIT_ACTIVE   0x00010000U /* MAC MII transmit engine active */
#define	ETH_MAC_MII_TRANSMIT_ACTIVE   0x00010000U /* MAC MII transmit engine active */
#define	ETH_MAC_MII_TRANSMIT_ACTIVE   0x00010000U /* MAC MII transmit engine active */
#define	ETH_MAC_MII_TRANSMIT_ACTIVE   0x00010000U /* MAC MII transmit engine active */
#define	ETH_MAC_MII_TRANSMIT_ACTIVE   0x00010000U /* MAC MII transmit engine active */
#define	ETH_MAC_MII_TRANSMIT_ACTIVE   0x00010000U /* MAC MII transmit engine active */
#define	ETH_MAC_READCONTROLLER_FLUSHING   0x00000060U /* Rx FIFO read controller Flushing the frame data and status */
#define	ETH_MAC_READCONTROLLER_FLUSHING   0x00000060U /* Rx FIFO read controller Flushing the frame data and status */
#define	ETH_MAC_READCONTROLLER_FLUSHING   0x00000060U /* Rx FIFO read controller Flushing the frame data and status */
#define	ETH_MAC_READCONTROLLER_FLUSHING   0x00000060U /* Rx FIFO read controller Flushing the frame data and status */
#define	ETH_MAC_READCONTROLLER_FLUSHING   0x00000060U /* Rx FIFO read controller Flushing the frame data and status */
#define	ETH_MAC_READCONTROLLER_FLUSHING   0x00000060U /* Rx FIFO read controller Flushing the frame data and status */
#define	ETH_MAC_READCONTROLLER_IDLE   0x00000000U /* Rx FIFO read controller IDLE state */
#define	ETH_MAC_READCONTROLLER_IDLE   0x00000000U /* Rx FIFO read controller IDLE state */
#define	ETH_MAC_READCONTROLLER_IDLE   0x00000000U /* Rx FIFO read controller IDLE state */
#define	ETH_MAC_READCONTROLLER_IDLE   0x00000000U /* Rx FIFO read controller IDLE state */
#define	ETH_MAC_READCONTROLLER_IDLE   0x00000000U /* Rx FIFO read controller IDLE state */
#define	ETH_MAC_READCONTROLLER_IDLE   0x00000000U /* Rx FIFO read controller IDLE state */
#define	ETH_MAC_READCONTROLLER_READING_DATA   0x00000020U /* Rx FIFO read controller Reading frame data */
#define	ETH_MAC_READCONTROLLER_READING_DATA   0x00000020U /* Rx FIFO read controller Reading frame data */
#define	ETH_MAC_READCONTROLLER_READING_DATA   0x00000020U /* Rx FIFO read controller Reading frame data */
#define	ETH_MAC_READCONTROLLER_READING_DATA   0x00000020U /* Rx FIFO read controller Reading frame data */
#define	ETH_MAC_READCONTROLLER_READING_DATA   0x00000020U /* Rx FIFO read controller Reading frame data */
#define	ETH_MAC_READCONTROLLER_READING_DATA   0x00000020U /* Rx FIFO read controller Reading frame data */
#define	ETH_MAC_READCONTROLLER_READING_STATUS   0x00000040U /* Rx FIFO read controller Reading frame status (or time-stamp) */
#define	ETH_MAC_READCONTROLLER_READING_STATUS   0x00000040U /* Rx FIFO read controller Reading frame status (or time-stamp) */
#define	ETH_MAC_READCONTROLLER_READING_STATUS   0x00000040U /* Rx FIFO read controller Reading frame status (or time-stamp) */
#define	ETH_MAC_READCONTROLLER_READING_STATUS   0x00000040U /* Rx FIFO read controller Reading frame status (or time-stamp) */
#define	ETH_MAC_READCONTROLLER_READING_STATUS   0x00000040U /* Rx FIFO read controller Reading frame status (or time-stamp) */
#define	ETH_MAC_READCONTROLLER_READING_STATUS   0x00000040U /* Rx FIFO read controller Reading frame status (or time-stamp) */
#define	ETH_MAC_RXFIFO_ABOVE_THRESHOLD   0x00000200U /* Rx FIFO fill level: fill-level above flow-control activate threshold */
#define	ETH_MAC_RXFIFO_ABOVE_THRESHOLD   0x00000200U /* Rx FIFO fill level: fill-level above flow-control activate threshold */
#define	ETH_MAC_RXFIFO_ABOVE_THRESHOLD   0x00000200U /* Rx FIFO fill level: fill-level above flow-control activate threshold */
#define	ETH_MAC_RXFIFO_ABOVE_THRESHOLD   0x00000200U /* Rx FIFO fill level: fill-level above flow-control activate threshold */
#define	ETH_MAC_RXFIFO_ABOVE_THRESHOLD   0x00000200U /* Rx FIFO fill level: fill-level above flow-control activate threshold */
#define	ETH_MAC_RXFIFO_ABOVE_THRESHOLD   0x00000200U /* Rx FIFO fill level: fill-level above flow-control activate threshold */
#define	ETH_MAC_RXFIFO_BELOW_THRESHOLD   0x00000100U /* Rx FIFO fill level: fill-level below flow-control de-activate threshold */
#define	ETH_MAC_RXFIFO_BELOW_THRESHOLD   0x00000100U /* Rx FIFO fill level: fill-level below flow-control de-activate threshold */
#define	ETH_MAC_RXFIFO_BELOW_THRESHOLD   0x00000100U /* Rx FIFO fill level: fill-level below flow-control de-activate threshold */
#define	ETH_MAC_RXFIFO_BELOW_THRESHOLD   0x00000100U /* Rx FIFO fill level: fill-level below flow-control de-activate threshold */
#define	ETH_MAC_RXFIFO_BELOW_THRESHOLD   0x00000100U /* Rx FIFO fill level: fill-level below flow-control de-activate threshold */
#define	ETH_MAC_RXFIFO_BELOW_THRESHOLD   0x00000100U /* Rx FIFO fill level: fill-level below flow-control de-activate threshold */
#define	ETH_MAC_RXFIFO_EMPTY   0x00000000U /* Rx FIFO fill level: empty */
#define	ETH_MAC_RXFIFO_EMPTY   0x00000000U /* Rx FIFO fill level: empty */
#define	ETH_MAC_RXFIFO_EMPTY   0x00000000U /* Rx FIFO fill level: empty */
#define	ETH_MAC_RXFIFO_EMPTY   0x00000000U /* Rx FIFO fill level: empty */
#define	ETH_MAC_RXFIFO_EMPTY   0x00000000U /* Rx FIFO fill level: empty */
#define	ETH_MAC_RXFIFO_EMPTY   0x00000000U /* Rx FIFO fill level: empty */
#define	ETH_MAC_RXFIFO_FULL   0x00000300U /* Rx FIFO fill level: full */
#define	ETH_MAC_RXFIFO_FULL   0x00000300U /* Rx FIFO fill level: full */
#define	ETH_MAC_RXFIFO_FULL   0x00000300U /* Rx FIFO fill level: full */
#define	ETH_MAC_RXFIFO_FULL   0x00000300U /* Rx FIFO fill level: full */
#define	ETH_MAC_RXFIFO_FULL   0x00000300U /* Rx FIFO fill level: full */
#define	ETH_MAC_RXFIFO_FULL   0x00000300U /* Rx FIFO fill level: full */
#define	ETH_MAC_RXFIFO_WRITE_ACTIVE   0x00000010U /* Rx FIFO write controller active */
#define	ETH_MAC_RXFIFO_WRITE_ACTIVE   0x00000010U /* Rx FIFO write controller active */
#define	ETH_MAC_RXFIFO_WRITE_ACTIVE   0x00000010U /* Rx FIFO write controller active */
#define	ETH_MAC_RXFIFO_WRITE_ACTIVE   0x00000010U /* Rx FIFO write controller active */
#define	ETH_MAC_RXFIFO_WRITE_ACTIVE   0x00000010U /* Rx FIFO write controller active */
#define	ETH_MAC_RXFIFO_WRITE_ACTIVE   0x00000010U /* Rx FIFO write controller active */
#define	ETH_MAC_SMALL_FIFO_NOTACTIVE   0x00000000U /* MAC small FIFO read / write controllers not active */
#define	ETH_MAC_SMALL_FIFO_NOTACTIVE   0x00000000U /* MAC small FIFO read / write controllers not active */
#define	ETH_MAC_SMALL_FIFO_NOTACTIVE   0x00000000U /* MAC small FIFO read / write controllers not active */
#define	ETH_MAC_SMALL_FIFO_NOTACTIVE   0x00000000U /* MAC small FIFO read / write controllers not active */
#define	ETH_MAC_SMALL_FIFO_NOTACTIVE   0x00000000U /* MAC small FIFO read / write controllers not active */
#define	ETH_MAC_SMALL_FIFO_NOTACTIVE   0x00000000U /* MAC small FIFO read / write controllers not active */
#define	ETH_MAC_SMALL_FIFO_READ_ACTIVE   0x00000002U /* MAC small FIFO read controller active */
#define	ETH_MAC_SMALL_FIFO_READ_ACTIVE   0x00000002U /* MAC small FIFO read controller active */
#define	ETH_MAC_SMALL_FIFO_READ_ACTIVE   0x00000002U /* MAC small FIFO read controller active */
#define	ETH_MAC_SMALL_FIFO_READ_ACTIVE   0x00000002U /* MAC small FIFO read controller active */
#define	ETH_MAC_SMALL_FIFO_READ_ACTIVE   0x00000002U /* MAC small FIFO read controller active */
#define	ETH_MAC_SMALL_FIFO_READ_ACTIVE   0x00000002U /* MAC small FIFO read controller active */
#define	ETH_MAC_SMALL_FIFO_RW_ACTIVE   0x00000006U /* MAC small FIFO read / write controllers active */
#define	ETH_MAC_SMALL_FIFO_RW_ACTIVE   0x00000006U /* MAC small FIFO read / write controllers active */
#define	ETH_MAC_SMALL_FIFO_RW_ACTIVE   0x00000006U /* MAC small FIFO read / write controllers active */
#define	ETH_MAC_SMALL_FIFO_RW_ACTIVE   0x00000006U /* MAC small FIFO read / write controllers active */
#define	ETH_MAC_SMALL_FIFO_RW_ACTIVE   0x00000006U /* MAC small FIFO read / write controllers active */
#define	ETH_MAC_SMALL_FIFO_RW_ACTIVE   0x00000006U /* MAC small FIFO read / write controllers active */
#define	ETH_MAC_SMALL_FIFO_WRITE_ACTIVE   0x00000004U /* MAC small FIFO write controller active */
#define	ETH_MAC_SMALL_FIFO_WRITE_ACTIVE   0x00000004U /* MAC small FIFO write controller active */
#define	ETH_MAC_SMALL_FIFO_WRITE_ACTIVE   0x00000004U /* MAC small FIFO write controller active */
#define	ETH_MAC_SMALL_FIFO_WRITE_ACTIVE   0x00000004U /* MAC small FIFO write controller active */
#define	ETH_MAC_SMALL_FIFO_WRITE_ACTIVE   0x00000004U /* MAC small FIFO write controller active */
#define	ETH_MAC_SMALL_FIFO_WRITE_ACTIVE   0x00000004U /* MAC small FIFO write controller active */
#define	ETH_MAC_TRANSMISSION_PAUSE   0x00080000U /* MAC transmitter in pause */
#define	ETH_MAC_TRANSMISSION_PAUSE   0x00080000U /* MAC transmitter in pause */
#define	ETH_MAC_TRANSMISSION_PAUSE   0x00080000U /* MAC transmitter in pause */
#define	ETH_MAC_TRANSMISSION_PAUSE   0x00080000U /* MAC transmitter in pause */
#define	ETH_MAC_TRANSMISSION_PAUSE   0x00080000U /* MAC transmitter in pause */
#define	ETH_MAC_TRANSMISSION_PAUSE   0x00080000U /* MAC transmitter in pause */
#define	ETH_MAC_TRANSMITFRAMECONTROLLER_GENRATING_PCF   0x00040000U /* MAC transmit frame controller: Generating and transmitting a Pause control frame (in full duplex mode) */
#define	ETH_MAC_TRANSMITFRAMECONTROLLER_GENRATING_PCF   0x00040000U /* MAC transmit frame controller: Generating and transmitting a Pause control frame (in full duplex mode) */
#define	ETH_MAC_TRANSMITFRAMECONTROLLER_GENRATING_PCF   0x00040000U /* MAC transmit frame controller: Generating and transmitting a Pause control frame (in full duplex mode) */
#define	ETH_MAC_TRANSMITFRAMECONTROLLER_GENRATING_PCF   0x00040000U /* MAC transmit frame controller: Generating and transmitting a Pause control frame (in full duplex mode) */
#define	ETH_MAC_TRANSMITFRAMECONTROLLER_GENRATING_PCF   0x00040000U /* MAC transmit frame controller: Generating and transmitting a Pause control frame (in full duplex mode) */
#define	ETH_MAC_TRANSMITFRAMECONTROLLER_GENRATING_PCF   0x00040000U /* MAC transmit frame controller: Generating and transmitting a Pause control frame (in full duplex mode) */
#define	ETH_MAC_TRANSMITFRAMECONTROLLER_IDLE   0x00000000U /* MAC transmit frame controller: Idle */
#define	ETH_MAC_TRANSMITFRAMECONTROLLER_IDLE   0x00000000U /* MAC transmit frame controller: Idle */
#define	ETH_MAC_TRANSMITFRAMECONTROLLER_IDLE   0x00000000U /* MAC transmit frame controller: Idle */
#define	ETH_MAC_TRANSMITFRAMECONTROLLER_IDLE   0x00000000U /* MAC transmit frame controller: Idle */
#define	ETH_MAC_TRANSMITFRAMECONTROLLER_IDLE   0x00000000U /* MAC transmit frame controller: Idle */
#define	ETH_MAC_TRANSMITFRAMECONTROLLER_IDLE   0x00000000U /* MAC transmit frame controller: Idle */
#define	ETH_MAC_TRANSMITFRAMECONTROLLER_TRANSFERRING   0x00060000U /* MAC transmit frame controller: Transferring input frame for transmission */
#define	ETH_MAC_TRANSMITFRAMECONTROLLER_TRANSFERRING   0x00060000U /* MAC transmit frame controller: Transferring input frame for transmission */
#define	ETH_MAC_TRANSMITFRAMECONTROLLER_TRANSFERRING   0x00060000U /* MAC transmit frame controller: Transferring input frame for transmission */
#define	ETH_MAC_TRANSMITFRAMECONTROLLER_TRANSFERRING   0x00060000U /* MAC transmit frame controller: Transferring input frame for transmission */
#define	ETH_MAC_TRANSMITFRAMECONTROLLER_TRANSFERRING   0x00060000U /* MAC transmit frame controller: Transferring input frame for transmission */
#define	ETH_MAC_TRANSMITFRAMECONTROLLER_TRANSFERRING   0x00060000U /* MAC transmit frame controller: Transferring input frame for transmission */
#define	ETH_MAC_TRANSMITFRAMECONTROLLER_WAITING   0x00020000U /* MAC transmit frame controller: Waiting for Status of previous frame or IFG/backoff period to be over */
#define	ETH_MAC_TRANSMITFRAMECONTROLLER_WAITING   0x00020000U /* MAC transmit frame controller: Waiting for Status of previous frame or IFG/backoff period to be over */
#define	ETH_MAC_TRANSMITFRAMECONTROLLER_WAITING   0x00020000U /* MAC transmit frame controller: Waiting for Status of previous frame or IFG/backoff period to be over */
#define	ETH_MAC_TRANSMITFRAMECONTROLLER_WAITING   0x00020000U /* MAC transmit frame controller: Waiting for Status of previous frame or IFG/backoff period to be over */
#define	ETH_MAC_TRANSMITFRAMECONTROLLER_WAITING   0x00020000U /* MAC transmit frame controller: Waiting for Status of previous frame or IFG/backoff period to be over */
#define	ETH_MAC_TRANSMITFRAMECONTROLLER_WAITING   0x00020000U /* MAC transmit frame controller: Waiting for Status of previous frame or IFG/backoff period to be over */
#define	ETH_MAC_TXFIFO_FULL   0x02000000U /* Tx FIFO full */
#define	ETH_MAC_TXFIFO_FULL   0x02000000U /* Tx FIFO full */
#define	ETH_MAC_TXFIFO_FULL   0x02000000U /* Tx FIFO full */
#define	ETH_MAC_TXFIFO_FULL   0x02000000U /* Tx FIFO full */
#define	ETH_MAC_TXFIFO_FULL   0x02000000U /* Tx FIFO full */
#define	ETH_MAC_TXFIFO_FULL   0x02000000U /* Tx FIFO full */
#define	ETH_MAC_TXFIFO_IDLE   0x00000000U /* Tx FIFO read status: Idle */
#define	ETH_MAC_TXFIFO_IDLE   0x00000000U /* Tx FIFO read status: Idle */
#define	ETH_MAC_TXFIFO_IDLE   0x00000000U /* Tx FIFO read status: Idle */
#define	ETH_MAC_TXFIFO_IDLE   0x00000000U /* Tx FIFO read status: Idle */
#define	ETH_MAC_TXFIFO_IDLE   0x00000000U /* Tx FIFO read status: Idle */
#define	ETH_MAC_TXFIFO_IDLE   0x00000000U /* Tx FIFO read status: Idle */
#define	ETH_MAC_TXFIFO_READ   0x00100000U /* Tx FIFO read status: Read (transferring data to the MAC transmitter) */
#define	ETH_MAC_TXFIFO_READ   0x00100000U /* Tx FIFO read status: Read (transferring data to the MAC transmitter) */
#define	ETH_MAC_TXFIFO_READ   0x00100000U /* Tx FIFO read status: Read (transferring data to the MAC transmitter) */
#define	ETH_MAC_TXFIFO_READ   0x00100000U /* Tx FIFO read status: Read (transferring data to the MAC transmitter) */
#define	ETH_MAC_TXFIFO_READ   0x00100000U /* Tx FIFO read status: Read (transferring data to the MAC transmitter) */
#define	ETH_MAC_TXFIFO_READ   0x00100000U /* Tx FIFO read status: Read (transferring data to the MAC transmitter) */
#define	ETH_MAC_TXFIFO_WAITING   0x00200000U /* Tx FIFO read status: Waiting for TxStatus from MAC transmitter */
#define	ETH_MAC_TXFIFO_WAITING   0x00200000U /* Tx FIFO read status: Waiting for TxStatus from MAC transmitter */
#define	ETH_MAC_TXFIFO_WAITING   0x00200000U /* Tx FIFO read status: Waiting for TxStatus from MAC transmitter */
#define	ETH_MAC_TXFIFO_WAITING   0x00200000U /* Tx FIFO read status: Waiting for TxStatus from MAC transmitter */
#define	ETH_MAC_TXFIFO_WAITING   0x00200000U /* Tx FIFO read status: Waiting for TxStatus from MAC transmitter */
#define	ETH_MAC_TXFIFO_WAITING   0x00200000U /* Tx FIFO read status: Waiting for TxStatus from MAC transmitter */
#define	ETH_MAC_TXFIFO_WRITE_ACTIVE   0x00400000U /* Tx FIFO write active */
#define	ETH_MAC_TXFIFO_WRITE_ACTIVE   0x00400000U /* Tx FIFO write active */
#define	ETH_MAC_TXFIFO_WRITE_ACTIVE   0x00400000U /* Tx FIFO write active */
#define	ETH_MAC_TXFIFO_WRITE_ACTIVE   0x00400000U /* Tx FIFO write active */
#define	ETH_MAC_TXFIFO_WRITE_ACTIVE   0x00400000U /* Tx FIFO write active */
#define	ETH_MAC_TXFIFO_WRITE_ACTIVE   0x00400000U /* Tx FIFO write active */
#define	ETH_MAC_TXFIFO_WRITING   0x00300000U /* Tx FIFO read status: Writing the received TxStatus or flushing the TxFIFO */
#define	ETH_MAC_TXFIFO_WRITING   0x00300000U /* Tx FIFO read status: Writing the received TxStatus or flushing the TxFIFO */
#define	ETH_MAC_TXFIFO_WRITING   0x00300000U /* Tx FIFO read status: Writing the received TxStatus or flushing the TxFIFO */
#define	ETH_MAC_TXFIFO_WRITING   0x00300000U /* Tx FIFO read status: Writing the received TxStatus or flushing the TxFIFO */
#define	ETH_MAC_TXFIFO_WRITING   0x00300000U /* Tx FIFO read status: Writing the received TxStatus or flushing the TxFIFO */
#define	ETH_MAC_TXFIFO_WRITING   0x00300000U /* Tx FIFO read status: Writing the received TxStatus or flushing the TxFIFO */
#define	ETH_MAC_TXFIFONOT_EMPTY   0x01000000U /* Tx FIFO not empty */
#define	ETH_MAC_TXFIFONOT_EMPTY   0x01000000U /* Tx FIFO not empty */
#define	ETH_MAC_TXFIFONOT_EMPTY   0x01000000U /* Tx FIFO not empty */
#define	ETH_MAC_TXFIFONOT_EMPTY   0x01000000U /* Tx FIFO not empty */
#define	ETH_MAC_TXFIFONOT_EMPTY   0x01000000U /* Tx FIFO not empty */
#define	ETH_MAC_TXFIFONOT_EMPTY   0x01000000U /* Tx FIFO not empty */
#define	ETH_MMCCR   0x00000100U
#define	ETH_MMCCR   0x00000100U
#define	ETH_MMCCR   0x00000100U
#define	ETH_MMCCR   0x00000100U
#define	ETH_MMCCR   0x00000100U
#define	ETH_MMCCR   0x00000100U
#define	ETH_MMCRFAECR   0x00000198U
#define	ETH_MMCRFAECR   0x00000198U
#define	ETH_MMCRFAECR   0x00000198U
#define	ETH_MMCRFAECR   0x00000198U
#define	ETH_MMCRFAECR   0x00000198U
#define	ETH_MMCRFAECR   0x00000198U
#define	ETH_MMCRFCECR   0x00000194U
#define	ETH_MMCRFCECR   0x00000194U
#define	ETH_MMCRFCECR   0x00000194U
#define	ETH_MMCRFCECR   0x00000194U
#define	ETH_MMCRFCECR   0x00000194U
#define	ETH_MMCRFCECR   0x00000194U
#define	ETH_MMCRGUFCR   0x000001C4U
#define	ETH_MMCRGUFCR   0x000001C4U
#define	ETH_MMCRGUFCR   0x000001C4U
#define	ETH_MMCRGUFCR   0x000001C4U
#define	ETH_MMCRGUFCR   0x000001C4U
#define	ETH_MMCRGUFCR   0x000001C4U
#define	ETH_MMCRIMR   0x0000010CU
#define	ETH_MMCRIMR   0x0000010CU
#define	ETH_MMCRIMR   0x0000010CU
#define	ETH_MMCRIMR   0x0000010CU
#define	ETH_MMCRIMR   0x0000010CU
#define	ETH_MMCRIMR   0x0000010CU
#define	ETH_MMCRIR   0x00000104U
#define	ETH_MMCRIR   0x00000104U
#define	ETH_MMCRIR   0x00000104U
#define	ETH_MMCRIR   0x00000104U
#define	ETH_MMCRIR   0x00000104U
#define	ETH_MMCRIR   0x00000104U
#define	ETH_MMCTGFCR   0x00000168U
#define	ETH_MMCTGFCR   0x00000168U
#define	ETH_MMCTGFCR   0x00000168U
#define	ETH_MMCTGFCR   0x00000168U
#define	ETH_MMCTGFCR   0x00000168U
#define	ETH_MMCTGFCR   0x00000168U
#define	ETH_MMCTGFMSCCR   0x00000150U
#define	ETH_MMCTGFMSCCR   0x00000150U
#define	ETH_MMCTGFMSCCR   0x00000150U
#define	ETH_MMCTGFMSCCR   0x00000150U
#define	ETH_MMCTGFMSCCR   0x00000150U
#define	ETH_MMCTGFMSCCR   0x00000150U
#define	ETH_MMCTGFSCCR   0x0000014CU
#define	ETH_MMCTGFSCCR   0x0000014CU
#define	ETH_MMCTGFSCCR   0x0000014CU
#define	ETH_MMCTGFSCCR   0x0000014CU
#define	ETH_MMCTGFSCCR   0x0000014CU
#define	ETH_MMCTGFSCCR   0x0000014CU
#define	ETH_MMCTIMR   0x00000110U
#define	ETH_MMCTIMR   0x00000110U
#define	ETH_MMCTIMR   0x00000110U
#define	ETH_MMCTIMR   0x00000110U
#define	ETH_MMCTIMR   0x00000110U
#define	ETH_MMCTIMR   0x00000110U
#define	ETH_MMCTIR   0x00000108U
#define	ETH_MMCTIR   0x00000108U
#define	ETH_MMCTIR   0x00000108U
#define	ETH_MMCTIR   0x00000108U
#define	ETH_MMCTIR   0x00000108U
#define	ETH_MMCTIR   0x00000108U
#define	JUMBO_FRAME_PAYLOAD   ETH_JUMBO_FRAME_PAYLOAD
#define	JUMBO_FRAME_PAYLOAD   ETH_JUMBO_FRAME_PAYLOAD
#define	JUMBO_FRAME_PAYLOAD   ETH_JUMBO_FRAME_PAYLOAD
#define	JUMBO_FRAME_PAYLOAD   ETH_JUMBO_FRAME_PAYLOAD
#define	JUMBO_FRAME_PAYLOAD   ETH_JUMBO_FRAME_PAYLOAD
#define	JUMBO_FRAME_PAYLOAD   ETH_JUMBO_FRAME_PAYLOAD
#define	MACCR_CLEAR_MASK   ETH_MACCR_CLEAR_MASK
#define	MACCR_CLEAR_MASK   ETH_MACCR_CLEAR_MASK
#define	MACCR_CLEAR_MASK   ETH_MACCR_CLEAR_MASK
#define	MACCR_CLEAR_MASK   ETH_MACCR_CLEAR_MASK
#define	MACCR_CLEAR_MASK   ETH_MACCR_CLEAR_MASK
#define	MACCR_CLEAR_MASK   ETH_MACCR_CLEAR_MASK
#define	MACFCR_CLEAR_MASK   ETH_MACFCR_CLEAR_MASK
#define	MACFCR_CLEAR_MASK   ETH_MACFCR_CLEAR_MASK
#define	MACFCR_CLEAR_MASK   ETH_MACFCR_CLEAR_MASK
#define	MACFCR_CLEAR_MASK   ETH_MACFCR_CLEAR_MASK
#define	MACFCR_CLEAR_MASK   ETH_MACFCR_CLEAR_MASK
#define	MACFCR_CLEAR_MASK   ETH_MACFCR_CLEAR_MASK
#define	MACMIIAR_CR_MASK   ETH_MACMIIAR_CR_MASK
#define	MACMIIAR_CR_MASK   ETH_MACMIIAR_CR_MASK
#define	MACMIIAR_CR_MASK   ETH_MACMIIAR_CR_MASK
#define	MACMIIAR_CR_MASK   ETH_MACMIIAR_CR_MASK
#define	MACMIIAR_CR_MASK   ETH_MACMIIAR_CR_MASK
#define	MACMIIAR_CR_MASK   ETH_MACMIIAR_CR_MASK
#define	MAX_ETH_PAYLOAD   ETH_MAX_ETH_PAYLOAD
#define	MAX_ETH_PAYLOAD   ETH_MAX_ETH_PAYLOAD
#define	MAX_ETH_PAYLOAD   ETH_MAX_ETH_PAYLOAD
#define	MAX_ETH_PAYLOAD   ETH_MAX_ETH_PAYLOAD
#define	MAX_ETH_PAYLOAD   ETH_MAX_ETH_PAYLOAD
#define	MAX_ETH_PAYLOAD   ETH_MAX_ETH_PAYLOAD
#define	MIN_ETH_PAYLOAD   ETH_MIN_ETH_PAYLOAD
#define	MIN_ETH_PAYLOAD   ETH_MIN_ETH_PAYLOAD
#define	MIN_ETH_PAYLOAD   ETH_MIN_ETH_PAYLOAD
#define	MIN_ETH_PAYLOAD   ETH_MIN_ETH_PAYLOAD
#define	MIN_ETH_PAYLOAD   ETH_MIN_ETH_PAYLOAD
#define	MIN_ETH_PAYLOAD   ETH_MIN_ETH_PAYLOAD
#define	VLAN_TAG   ETH_VLAN_TAG
#define	VLAN_TAG   ETH_VLAN_TAG
#define	VLAN_TAG   ETH_VLAN_TAG
#define	VLAN_TAG   ETH_VLAN_TAG
#define	VLAN_TAG   ETH_VLAN_TAG
#define	VLAN_TAG   ETH_VLAN_TAG

Detailed Description

Macro Definition Documentation

DMAOMR_CLEAR_MASK [1/6]

#define DMAOMR_CLEAR_MASK   ETH_DMAOMR_CLEAR_MASK

Definition at line 1290 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

DMAOMR_CLEAR_MASK [2/6]

#define DMAOMR_CLEAR_MASK   ETH_DMAOMR_CLEAR_MASK

Definition at line 1319 of file stm32f769/stm32f769i-disco/Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

DMAOMR_CLEAR_MASK [3/6]

#define DMAOMR_CLEAR_MASK   ETH_DMAOMR_CLEAR_MASK

Definition at line 1319 of file stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

DMAOMR_CLEAR_MASK [4/6]

#define DMAOMR_CLEAR_MASK   ETH_DMAOMR_CLEAR_MASK

Definition at line 1319 of file stm32f411/stm32f411e-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

DMAOMR_CLEAR_MASK [5/6]

#define DMAOMR_CLEAR_MASK   ETH_DMAOMR_CLEAR_MASK

Definition at line 1319 of file stm32f469/stm32f469i-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

DMAOMR_CLEAR_MASK [6/6]

#define DMAOMR_CLEAR_MASK   ETH_DMAOMR_CLEAR_MASK

Definition at line 1328 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_MII_RECEIVE_PROTOCOL_ACTIVE [1/6]

#define ETH_MAC_MII_RECEIVE_PROTOCOL_ACTIVE   0x00000001U /* MAC MII receive protocol engine active */

Definition at line 1333 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_MII_RECEIVE_PROTOCOL_ACTIVE [2/6]

#define ETH_MAC_MII_RECEIVE_PROTOCOL_ACTIVE   0x00000001U /* MAC MII receive protocol engine active */

Definition at line 1362 of file stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_MII_RECEIVE_PROTOCOL_ACTIVE [3/6]

#define ETH_MAC_MII_RECEIVE_PROTOCOL_ACTIVE   0x00000001U /* MAC MII receive protocol engine active */

Definition at line 1362 of file stm32f469/stm32f469i-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_MII_RECEIVE_PROTOCOL_ACTIVE [4/6]

#define ETH_MAC_MII_RECEIVE_PROTOCOL_ACTIVE   0x00000001U /* MAC MII receive protocol engine active */

Definition at line 1362 of file stm32f411/stm32f411e-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_MII_RECEIVE_PROTOCOL_ACTIVE [5/6]

#define ETH_MAC_MII_RECEIVE_PROTOCOL_ACTIVE   0x00000001U /* MAC MII receive protocol engine active */

Definition at line 1362 of file stm32f769/stm32f769i-disco/Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_MII_RECEIVE_PROTOCOL_ACTIVE [6/6]

#define ETH_MAC_MII_RECEIVE_PROTOCOL_ACTIVE   0x00000001U /* MAC MII receive protocol engine active */

Definition at line 1371 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_MII_TRANSMIT_ACTIVE [1/6]

#define ETH_MAC_MII_TRANSMIT_ACTIVE   0x00010000U /* MAC MII transmit engine active */

Definition at line 1316 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_MII_TRANSMIT_ACTIVE [2/6]

#define ETH_MAC_MII_TRANSMIT_ACTIVE   0x00010000U /* MAC MII transmit engine active */

Definition at line 1345 of file stm32f411/stm32f411e-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_MII_TRANSMIT_ACTIVE [3/6]

#define ETH_MAC_MII_TRANSMIT_ACTIVE   0x00010000U /* MAC MII transmit engine active */

Definition at line 1345 of file stm32f769/stm32f769i-disco/Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_MII_TRANSMIT_ACTIVE [4/6]

#define ETH_MAC_MII_TRANSMIT_ACTIVE   0x00010000U /* MAC MII transmit engine active */

Definition at line 1345 of file stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_MII_TRANSMIT_ACTIVE [5/6]

#define ETH_MAC_MII_TRANSMIT_ACTIVE   0x00010000U /* MAC MII transmit engine active */

Definition at line 1345 of file stm32f469/stm32f469i-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_MII_TRANSMIT_ACTIVE [6/6]

#define ETH_MAC_MII_TRANSMIT_ACTIVE   0x00010000U /* MAC MII transmit engine active */

Definition at line 1354 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_READCONTROLLER_FLUSHING [1/6]

#define ETH_MAC_READCONTROLLER_FLUSHING   0x00000060U /* Rx FIFO read controller Flushing the frame data and status */

Definition at line 1327 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_READCONTROLLER_FLUSHING [2/6]

#define ETH_MAC_READCONTROLLER_FLUSHING   0x00000060U /* Rx FIFO read controller Flushing the frame data and status */

Definition at line 1356 of file stm32f469/stm32f469i-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_READCONTROLLER_FLUSHING [3/6]

#define ETH_MAC_READCONTROLLER_FLUSHING   0x00000060U /* Rx FIFO read controller Flushing the frame data and status */

Definition at line 1356 of file stm32f411/stm32f411e-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_READCONTROLLER_FLUSHING [4/6]

#define ETH_MAC_READCONTROLLER_FLUSHING   0x00000060U /* Rx FIFO read controller Flushing the frame data and status */

Definition at line 1356 of file stm32f769/stm32f769i-disco/Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_READCONTROLLER_FLUSHING [5/6]

#define ETH_MAC_READCONTROLLER_FLUSHING   0x00000060U /* Rx FIFO read controller Flushing the frame data and status */

Definition at line 1356 of file stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_READCONTROLLER_FLUSHING [6/6]

#define ETH_MAC_READCONTROLLER_FLUSHING   0x00000060U /* Rx FIFO read controller Flushing the frame data and status */

Definition at line 1365 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_READCONTROLLER_IDLE [1/6]

#define ETH_MAC_READCONTROLLER_IDLE   0x00000000U /* Rx FIFO read controller IDLE state */

Definition at line 1323 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_READCONTROLLER_IDLE [2/6]

#define ETH_MAC_READCONTROLLER_IDLE   0x00000000U /* Rx FIFO read controller IDLE state */

Definition at line 1352 of file stm32f469/stm32f469i-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_READCONTROLLER_IDLE [3/6]

#define ETH_MAC_READCONTROLLER_IDLE   0x00000000U /* Rx FIFO read controller IDLE state */

Definition at line 1352 of file stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_READCONTROLLER_IDLE [4/6]

#define ETH_MAC_READCONTROLLER_IDLE   0x00000000U /* Rx FIFO read controller IDLE state */

Definition at line 1352 of file stm32f411/stm32f411e-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_READCONTROLLER_IDLE [5/6]

#define ETH_MAC_READCONTROLLER_IDLE   0x00000000U /* Rx FIFO read controller IDLE state */

Definition at line 1352 of file stm32f769/stm32f769i-disco/Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_READCONTROLLER_IDLE [6/6]

#define ETH_MAC_READCONTROLLER_IDLE   0x00000000U /* Rx FIFO read controller IDLE state */

Definition at line 1361 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_READCONTROLLER_READING_DATA [1/6]

#define ETH_MAC_READCONTROLLER_READING_DATA   0x00000020U /* Rx FIFO read controller Reading frame data */

Definition at line 1324 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_READCONTROLLER_READING_DATA [2/6]

#define ETH_MAC_READCONTROLLER_READING_DATA   0x00000020U /* Rx FIFO read controller Reading frame data */

Definition at line 1353 of file stm32f469/stm32f469i-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_READCONTROLLER_READING_DATA [3/6]

#define ETH_MAC_READCONTROLLER_READING_DATA   0x00000020U /* Rx FIFO read controller Reading frame data */

Definition at line 1353 of file stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_READCONTROLLER_READING_DATA [4/6]

#define ETH_MAC_READCONTROLLER_READING_DATA   0x00000020U /* Rx FIFO read controller Reading frame data */

Definition at line 1353 of file stm32f411/stm32f411e-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_READCONTROLLER_READING_DATA [5/6]

#define ETH_MAC_READCONTROLLER_READING_DATA   0x00000020U /* Rx FIFO read controller Reading frame data */

Definition at line 1353 of file stm32f769/stm32f769i-disco/Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_READCONTROLLER_READING_DATA [6/6]

#define ETH_MAC_READCONTROLLER_READING_DATA   0x00000020U /* Rx FIFO read controller Reading frame data */

Definition at line 1362 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_READCONTROLLER_READING_STATUS [1/6]

#define ETH_MAC_READCONTROLLER_READING_STATUS   0x00000040U /* Rx FIFO read controller Reading frame status (or time-stamp) */

Definition at line 1325 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_READCONTROLLER_READING_STATUS [2/6]

#define ETH_MAC_READCONTROLLER_READING_STATUS   0x00000040U /* Rx FIFO read controller Reading frame status (or time-stamp) */

Definition at line 1354 of file stm32f469/stm32f469i-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_READCONTROLLER_READING_STATUS [3/6]

#define ETH_MAC_READCONTROLLER_READING_STATUS   0x00000040U /* Rx FIFO read controller Reading frame status (or time-stamp) */

Definition at line 1354 of file stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_READCONTROLLER_READING_STATUS [4/6]

#define ETH_MAC_READCONTROLLER_READING_STATUS   0x00000040U /* Rx FIFO read controller Reading frame status (or time-stamp) */

Definition at line 1354 of file stm32f411/stm32f411e-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_READCONTROLLER_READING_STATUS [5/6]

#define ETH_MAC_READCONTROLLER_READING_STATUS   0x00000040U /* Rx FIFO read controller Reading frame status (or time-stamp) */

Definition at line 1354 of file stm32f769/stm32f769i-disco/Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_READCONTROLLER_READING_STATUS [6/6]

#define ETH_MAC_READCONTROLLER_READING_STATUS   0x00000040U /* Rx FIFO read controller Reading frame status (or time-stamp) */

Definition at line 1363 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_RXFIFO_ABOVE_THRESHOLD [1/6]

#define ETH_MAC_RXFIFO_ABOVE_THRESHOLD   0x00000200U /* Rx FIFO fill level: fill-level above flow-control activate threshold */

Definition at line 1319 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_RXFIFO_ABOVE_THRESHOLD [2/6]

#define ETH_MAC_RXFIFO_ABOVE_THRESHOLD   0x00000200U /* Rx FIFO fill level: fill-level above flow-control activate threshold */

Definition at line 1348 of file stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_RXFIFO_ABOVE_THRESHOLD [3/6]

#define ETH_MAC_RXFIFO_ABOVE_THRESHOLD   0x00000200U /* Rx FIFO fill level: fill-level above flow-control activate threshold */

Definition at line 1348 of file stm32f411/stm32f411e-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_RXFIFO_ABOVE_THRESHOLD [4/6]

#define ETH_MAC_RXFIFO_ABOVE_THRESHOLD   0x00000200U /* Rx FIFO fill level: fill-level above flow-control activate threshold */

Definition at line 1348 of file stm32f769/stm32f769i-disco/Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_RXFIFO_ABOVE_THRESHOLD [5/6]

#define ETH_MAC_RXFIFO_ABOVE_THRESHOLD   0x00000200U /* Rx FIFO fill level: fill-level above flow-control activate threshold */

Definition at line 1348 of file stm32f469/stm32f469i-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_RXFIFO_ABOVE_THRESHOLD [6/6]

#define ETH_MAC_RXFIFO_ABOVE_THRESHOLD   0x00000200U /* Rx FIFO fill level: fill-level above flow-control activate threshold */

Definition at line 1357 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_RXFIFO_BELOW_THRESHOLD [1/6]

#define ETH_MAC_RXFIFO_BELOW_THRESHOLD   0x00000100U /* Rx FIFO fill level: fill-level below flow-control de-activate threshold */

Definition at line 1318 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_RXFIFO_BELOW_THRESHOLD [2/6]

#define ETH_MAC_RXFIFO_BELOW_THRESHOLD   0x00000100U /* Rx FIFO fill level: fill-level below flow-control de-activate threshold */

Definition at line 1347 of file stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_RXFIFO_BELOW_THRESHOLD [3/6]

#define ETH_MAC_RXFIFO_BELOW_THRESHOLD   0x00000100U /* Rx FIFO fill level: fill-level below flow-control de-activate threshold */

Definition at line 1347 of file stm32f411/stm32f411e-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_RXFIFO_BELOW_THRESHOLD [4/6]

#define ETH_MAC_RXFIFO_BELOW_THRESHOLD   0x00000100U /* Rx FIFO fill level: fill-level below flow-control de-activate threshold */

Definition at line 1347 of file stm32f769/stm32f769i-disco/Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_RXFIFO_BELOW_THRESHOLD [5/6]

#define ETH_MAC_RXFIFO_BELOW_THRESHOLD   0x00000100U /* Rx FIFO fill level: fill-level below flow-control de-activate threshold */

Definition at line 1347 of file stm32f469/stm32f469i-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_RXFIFO_BELOW_THRESHOLD [6/6]

#define ETH_MAC_RXFIFO_BELOW_THRESHOLD   0x00000100U /* Rx FIFO fill level: fill-level below flow-control de-activate threshold */

Definition at line 1356 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_RXFIFO_EMPTY [1/6]

#define ETH_MAC_RXFIFO_EMPTY   0x00000000U /* Rx FIFO fill level: empty */

Definition at line 1317 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_RXFIFO_EMPTY [2/6]

#define ETH_MAC_RXFIFO_EMPTY   0x00000000U /* Rx FIFO fill level: empty */

Definition at line 1346 of file stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_RXFIFO_EMPTY [3/6]

#define ETH_MAC_RXFIFO_EMPTY   0x00000000U /* Rx FIFO fill level: empty */

Definition at line 1346 of file stm32f411/stm32f411e-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_RXFIFO_EMPTY [4/6]

#define ETH_MAC_RXFIFO_EMPTY   0x00000000U /* Rx FIFO fill level: empty */

Definition at line 1346 of file stm32f769/stm32f769i-disco/Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_RXFIFO_EMPTY [5/6]

#define ETH_MAC_RXFIFO_EMPTY   0x00000000U /* Rx FIFO fill level: empty */

Definition at line 1346 of file stm32f469/stm32f469i-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_RXFIFO_EMPTY [6/6]

#define ETH_MAC_RXFIFO_EMPTY   0x00000000U /* Rx FIFO fill level: empty */

Definition at line 1355 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_RXFIFO_FULL [1/6]

#define ETH_MAC_RXFIFO_FULL   0x00000300U /* Rx FIFO fill level: full */

Definition at line 1320 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_RXFIFO_FULL [2/6]

#define ETH_MAC_RXFIFO_FULL   0x00000300U /* Rx FIFO fill level: full */

Definition at line 1349 of file stm32f469/stm32f469i-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_RXFIFO_FULL [3/6]

#define ETH_MAC_RXFIFO_FULL   0x00000300U /* Rx FIFO fill level: full */

Definition at line 1349 of file stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_RXFIFO_FULL [4/6]

#define ETH_MAC_RXFIFO_FULL   0x00000300U /* Rx FIFO fill level: full */

Definition at line 1349 of file stm32f411/stm32f411e-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_RXFIFO_FULL [5/6]

#define ETH_MAC_RXFIFO_FULL   0x00000300U /* Rx FIFO fill level: full */

Definition at line 1349 of file stm32f769/stm32f769i-disco/Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_RXFIFO_FULL [6/6]

#define ETH_MAC_RXFIFO_FULL   0x00000300U /* Rx FIFO fill level: full */

Definition at line 1358 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_RXFIFO_WRITE_ACTIVE [1/6]

#define ETH_MAC_RXFIFO_WRITE_ACTIVE   0x00000010U /* Rx FIFO write controller active */

Definition at line 1328 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_RXFIFO_WRITE_ACTIVE [2/6]

#define ETH_MAC_RXFIFO_WRITE_ACTIVE   0x00000010U /* Rx FIFO write controller active */

Definition at line 1357 of file stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_RXFIFO_WRITE_ACTIVE [3/6]

#define ETH_MAC_RXFIFO_WRITE_ACTIVE   0x00000010U /* Rx FIFO write controller active */

Definition at line 1357 of file stm32f411/stm32f411e-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_RXFIFO_WRITE_ACTIVE [4/6]

#define ETH_MAC_RXFIFO_WRITE_ACTIVE   0x00000010U /* Rx FIFO write controller active */

Definition at line 1357 of file stm32f769/stm32f769i-disco/Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_RXFIFO_WRITE_ACTIVE [5/6]

#define ETH_MAC_RXFIFO_WRITE_ACTIVE   0x00000010U /* Rx FIFO write controller active */

Definition at line 1357 of file stm32f469/stm32f469i-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_RXFIFO_WRITE_ACTIVE [6/6]

#define ETH_MAC_RXFIFO_WRITE_ACTIVE   0x00000010U /* Rx FIFO write controller active */

Definition at line 1366 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_SMALL_FIFO_NOTACTIVE [1/6]

#define ETH_MAC_SMALL_FIFO_NOTACTIVE   0x00000000U /* MAC small FIFO read / write controllers not active */

Definition at line 1329 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_SMALL_FIFO_NOTACTIVE [2/6]

#define ETH_MAC_SMALL_FIFO_NOTACTIVE   0x00000000U /* MAC small FIFO read / write controllers not active */

Definition at line 1358 of file stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_SMALL_FIFO_NOTACTIVE [3/6]

#define ETH_MAC_SMALL_FIFO_NOTACTIVE   0x00000000U /* MAC small FIFO read / write controllers not active */

Definition at line 1358 of file stm32f411/stm32f411e-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_SMALL_FIFO_NOTACTIVE [4/6]

#define ETH_MAC_SMALL_FIFO_NOTACTIVE   0x00000000U /* MAC small FIFO read / write controllers not active */

Definition at line 1358 of file stm32f769/stm32f769i-disco/Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_SMALL_FIFO_NOTACTIVE [5/6]

#define ETH_MAC_SMALL_FIFO_NOTACTIVE   0x00000000U /* MAC small FIFO read / write controllers not active */

Definition at line 1358 of file stm32f469/stm32f469i-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_SMALL_FIFO_NOTACTIVE [6/6]

#define ETH_MAC_SMALL_FIFO_NOTACTIVE   0x00000000U /* MAC small FIFO read / write controllers not active */

Definition at line 1367 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_SMALL_FIFO_READ_ACTIVE [1/6]

#define ETH_MAC_SMALL_FIFO_READ_ACTIVE   0x00000002U /* MAC small FIFO read controller active */

Definition at line 1330 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_SMALL_FIFO_READ_ACTIVE [2/6]

#define ETH_MAC_SMALL_FIFO_READ_ACTIVE   0x00000002U /* MAC small FIFO read controller active */

Definition at line 1359 of file stm32f469/stm32f469i-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_SMALL_FIFO_READ_ACTIVE [3/6]

#define ETH_MAC_SMALL_FIFO_READ_ACTIVE   0x00000002U /* MAC small FIFO read controller active */

Definition at line 1359 of file stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_SMALL_FIFO_READ_ACTIVE [4/6]

#define ETH_MAC_SMALL_FIFO_READ_ACTIVE   0x00000002U /* MAC small FIFO read controller active */

Definition at line 1359 of file stm32f411/stm32f411e-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_SMALL_FIFO_READ_ACTIVE [5/6]

#define ETH_MAC_SMALL_FIFO_READ_ACTIVE   0x00000002U /* MAC small FIFO read controller active */

Definition at line 1359 of file stm32f769/stm32f769i-disco/Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_SMALL_FIFO_READ_ACTIVE [6/6]

#define ETH_MAC_SMALL_FIFO_READ_ACTIVE   0x00000002U /* MAC small FIFO read controller active */

Definition at line 1368 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_SMALL_FIFO_RW_ACTIVE [1/6]

#define ETH_MAC_SMALL_FIFO_RW_ACTIVE   0x00000006U /* MAC small FIFO read / write controllers active */

Definition at line 1332 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_SMALL_FIFO_RW_ACTIVE [2/6]

#define ETH_MAC_SMALL_FIFO_RW_ACTIVE   0x00000006U /* MAC small FIFO read / write controllers active */

Definition at line 1361 of file stm32f469/stm32f469i-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_SMALL_FIFO_RW_ACTIVE [3/6]

#define ETH_MAC_SMALL_FIFO_RW_ACTIVE   0x00000006U /* MAC small FIFO read / write controllers active */

Definition at line 1361 of file stm32f411/stm32f411e-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_SMALL_FIFO_RW_ACTIVE [4/6]

#define ETH_MAC_SMALL_FIFO_RW_ACTIVE   0x00000006U /* MAC small FIFO read / write controllers active */

Definition at line 1361 of file stm32f769/stm32f769i-disco/Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_SMALL_FIFO_RW_ACTIVE [5/6]

#define ETH_MAC_SMALL_FIFO_RW_ACTIVE   0x00000006U /* MAC small FIFO read / write controllers active */

Definition at line 1361 of file stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_SMALL_FIFO_RW_ACTIVE [6/6]

#define ETH_MAC_SMALL_FIFO_RW_ACTIVE   0x00000006U /* MAC small FIFO read / write controllers active */

Definition at line 1370 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_SMALL_FIFO_WRITE_ACTIVE [1/6]

#define ETH_MAC_SMALL_FIFO_WRITE_ACTIVE   0x00000004U /* MAC small FIFO write controller active */

Definition at line 1331 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_SMALL_FIFO_WRITE_ACTIVE [2/6]

#define ETH_MAC_SMALL_FIFO_WRITE_ACTIVE   0x00000004U /* MAC small FIFO write controller active */

Definition at line 1360 of file stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_SMALL_FIFO_WRITE_ACTIVE [3/6]

#define ETH_MAC_SMALL_FIFO_WRITE_ACTIVE   0x00000004U /* MAC small FIFO write controller active */

Definition at line 1360 of file stm32f769/stm32f769i-disco/Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_SMALL_FIFO_WRITE_ACTIVE [4/6]

#define ETH_MAC_SMALL_FIFO_WRITE_ACTIVE   0x00000004U /* MAC small FIFO write controller active */

Definition at line 1360 of file stm32f411/stm32f411e-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_SMALL_FIFO_WRITE_ACTIVE [5/6]

#define ETH_MAC_SMALL_FIFO_WRITE_ACTIVE   0x00000004U /* MAC small FIFO write controller active */

Definition at line 1360 of file stm32f469/stm32f469i-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_SMALL_FIFO_WRITE_ACTIVE [6/6]

#define ETH_MAC_SMALL_FIFO_WRITE_ACTIVE   0x00000004U /* MAC small FIFO write controller active */

Definition at line 1369 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_TRANSMISSION_PAUSE [1/6]

#define ETH_MAC_TRANSMISSION_PAUSE   0x00080000U /* MAC transmitter in pause */

Definition at line 1311 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_TRANSMISSION_PAUSE [2/6]

#define ETH_MAC_TRANSMISSION_PAUSE   0x00080000U /* MAC transmitter in pause */

Definition at line 1340 of file stm32f411/stm32f411e-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_TRANSMISSION_PAUSE [3/6]

#define ETH_MAC_TRANSMISSION_PAUSE   0x00080000U /* MAC transmitter in pause */

Definition at line 1340 of file stm32f769/stm32f769i-disco/Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_TRANSMISSION_PAUSE [4/6]

#define ETH_MAC_TRANSMISSION_PAUSE   0x00080000U /* MAC transmitter in pause */

Definition at line 1340 of file stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_TRANSMISSION_PAUSE [5/6]

#define ETH_MAC_TRANSMISSION_PAUSE   0x00080000U /* MAC transmitter in pause */

Definition at line 1340 of file stm32f469/stm32f469i-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_TRANSMISSION_PAUSE [6/6]

#define ETH_MAC_TRANSMISSION_PAUSE   0x00080000U /* MAC transmitter in pause */

Definition at line 1349 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_TRANSMITFRAMECONTROLLER_GENRATING_PCF [1/6]

#define ETH_MAC_TRANSMITFRAMECONTROLLER_GENRATING_PCF   0x00040000U /* MAC transmit frame controller: Generating and transmitting a Pause control frame (in full duplex mode) */

Definition at line 1314 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_TRANSMITFRAMECONTROLLER_GENRATING_PCF [2/6]

#define ETH_MAC_TRANSMITFRAMECONTROLLER_GENRATING_PCF   0x00040000U /* MAC transmit frame controller: Generating and transmitting a Pause control frame (in full duplex mode) */

Definition at line 1343 of file stm32f411/stm32f411e-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_TRANSMITFRAMECONTROLLER_GENRATING_PCF [3/6]

#define ETH_MAC_TRANSMITFRAMECONTROLLER_GENRATING_PCF   0x00040000U /* MAC transmit frame controller: Generating and transmitting a Pause control frame (in full duplex mode) */

Definition at line 1343 of file stm32f769/stm32f769i-disco/Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_TRANSMITFRAMECONTROLLER_GENRATING_PCF [4/6]

#define ETH_MAC_TRANSMITFRAMECONTROLLER_GENRATING_PCF   0x00040000U /* MAC transmit frame controller: Generating and transmitting a Pause control frame (in full duplex mode) */

Definition at line 1343 of file stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_TRANSMITFRAMECONTROLLER_GENRATING_PCF [5/6]

#define ETH_MAC_TRANSMITFRAMECONTROLLER_GENRATING_PCF   0x00040000U /* MAC transmit frame controller: Generating and transmitting a Pause control frame (in full duplex mode) */

Definition at line 1343 of file stm32f469/stm32f469i-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_TRANSMITFRAMECONTROLLER_GENRATING_PCF [6/6]

#define ETH_MAC_TRANSMITFRAMECONTROLLER_GENRATING_PCF   0x00040000U /* MAC transmit frame controller: Generating and transmitting a Pause control frame (in full duplex mode) */

Definition at line 1352 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_TRANSMITFRAMECONTROLLER_IDLE [1/6]

#define ETH_MAC_TRANSMITFRAMECONTROLLER_IDLE   0x00000000U /* MAC transmit frame controller: Idle */

Definition at line 1312 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_TRANSMITFRAMECONTROLLER_IDLE [2/6]

#define ETH_MAC_TRANSMITFRAMECONTROLLER_IDLE   0x00000000U /* MAC transmit frame controller: Idle */

Definition at line 1341 of file stm32f411/stm32f411e-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_TRANSMITFRAMECONTROLLER_IDLE [3/6]

#define ETH_MAC_TRANSMITFRAMECONTROLLER_IDLE   0x00000000U /* MAC transmit frame controller: Idle */

Definition at line 1341 of file stm32f769/stm32f769i-disco/Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_TRANSMITFRAMECONTROLLER_IDLE [4/6]

#define ETH_MAC_TRANSMITFRAMECONTROLLER_IDLE   0x00000000U /* MAC transmit frame controller: Idle */

Definition at line 1341 of file stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_TRANSMITFRAMECONTROLLER_IDLE [5/6]

#define ETH_MAC_TRANSMITFRAMECONTROLLER_IDLE   0x00000000U /* MAC transmit frame controller: Idle */

Definition at line 1341 of file stm32f469/stm32f469i-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_TRANSMITFRAMECONTROLLER_IDLE [6/6]

#define ETH_MAC_TRANSMITFRAMECONTROLLER_IDLE   0x00000000U /* MAC transmit frame controller: Idle */

Definition at line 1350 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_TRANSMITFRAMECONTROLLER_TRANSFERRING [1/6]

#define ETH_MAC_TRANSMITFRAMECONTROLLER_TRANSFERRING   0x00060000U /* MAC transmit frame controller: Transferring input frame for transmission */

Definition at line 1315 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_TRANSMITFRAMECONTROLLER_TRANSFERRING [2/6]

#define ETH_MAC_TRANSMITFRAMECONTROLLER_TRANSFERRING   0x00060000U /* MAC transmit frame controller: Transferring input frame for transmission */

Definition at line 1344 of file stm32f411/stm32f411e-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_TRANSMITFRAMECONTROLLER_TRANSFERRING [3/6]

#define ETH_MAC_TRANSMITFRAMECONTROLLER_TRANSFERRING   0x00060000U /* MAC transmit frame controller: Transferring input frame for transmission */

Definition at line 1344 of file stm32f769/stm32f769i-disco/Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_TRANSMITFRAMECONTROLLER_TRANSFERRING [4/6]

#define ETH_MAC_TRANSMITFRAMECONTROLLER_TRANSFERRING   0x00060000U /* MAC transmit frame controller: Transferring input frame for transmission */

Definition at line 1344 of file stm32f469/stm32f469i-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_TRANSMITFRAMECONTROLLER_TRANSFERRING [5/6]

#define ETH_MAC_TRANSMITFRAMECONTROLLER_TRANSFERRING   0x00060000U /* MAC transmit frame controller: Transferring input frame for transmission */

Definition at line 1344 of file stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_TRANSMITFRAMECONTROLLER_TRANSFERRING [6/6]

#define ETH_MAC_TRANSMITFRAMECONTROLLER_TRANSFERRING   0x00060000U /* MAC transmit frame controller: Transferring input frame for transmission */

Definition at line 1353 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_TRANSMITFRAMECONTROLLER_WAITING [1/6]

#define ETH_MAC_TRANSMITFRAMECONTROLLER_WAITING   0x00020000U /* MAC transmit frame controller: Waiting for Status of previous frame or IFG/backoff period to be over */

Definition at line 1313 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_TRANSMITFRAMECONTROLLER_WAITING [2/6]

#define ETH_MAC_TRANSMITFRAMECONTROLLER_WAITING   0x00020000U /* MAC transmit frame controller: Waiting for Status of previous frame or IFG/backoff period to be over */

Definition at line 1342 of file stm32f411/stm32f411e-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_TRANSMITFRAMECONTROLLER_WAITING [3/6]

#define ETH_MAC_TRANSMITFRAMECONTROLLER_WAITING   0x00020000U /* MAC transmit frame controller: Waiting for Status of previous frame or IFG/backoff period to be over */

Definition at line 1342 of file stm32f769/stm32f769i-disco/Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_TRANSMITFRAMECONTROLLER_WAITING [4/6]

#define ETH_MAC_TRANSMITFRAMECONTROLLER_WAITING   0x00020000U /* MAC transmit frame controller: Waiting for Status of previous frame or IFG/backoff period to be over */

Definition at line 1342 of file stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_TRANSMITFRAMECONTROLLER_WAITING [5/6]

#define ETH_MAC_TRANSMITFRAMECONTROLLER_WAITING   0x00020000U /* MAC transmit frame controller: Waiting for Status of previous frame or IFG/backoff period to be over */

Definition at line 1342 of file stm32f469/stm32f469i-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_TRANSMITFRAMECONTROLLER_WAITING [6/6]

#define ETH_MAC_TRANSMITFRAMECONTROLLER_WAITING   0x00020000U /* MAC transmit frame controller: Waiting for Status of previous frame or IFG/backoff period to be over */

Definition at line 1351 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_TXFIFO_FULL [1/6]

#define ETH_MAC_TXFIFO_FULL   0x02000000U /* Tx FIFO full */

Definition at line 1304 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_TXFIFO_FULL [2/6]

#define ETH_MAC_TXFIFO_FULL   0x02000000U /* Tx FIFO full */

Definition at line 1333 of file stm32f411/stm32f411e-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_TXFIFO_FULL [3/6]

#define ETH_MAC_TXFIFO_FULL   0x02000000U /* Tx FIFO full */

Definition at line 1333 of file stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_TXFIFO_FULL [4/6]

#define ETH_MAC_TXFIFO_FULL   0x02000000U /* Tx FIFO full */

Definition at line 1333 of file stm32f769/stm32f769i-disco/Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_TXFIFO_FULL [5/6]

#define ETH_MAC_TXFIFO_FULL   0x02000000U /* Tx FIFO full */

Definition at line 1333 of file stm32f469/stm32f469i-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_TXFIFO_FULL [6/6]

#define ETH_MAC_TXFIFO_FULL   0x02000000U /* Tx FIFO full */

Definition at line 1342 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_TXFIFO_IDLE [1/6]

#define ETH_MAC_TXFIFO_IDLE   0x00000000U /* Tx FIFO read status: Idle */

Definition at line 1307 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_TXFIFO_IDLE [2/6]

#define ETH_MAC_TXFIFO_IDLE   0x00000000U /* Tx FIFO read status: Idle */

Definition at line 1336 of file stm32f769/stm32f769i-disco/Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_TXFIFO_IDLE [3/6]

#define ETH_MAC_TXFIFO_IDLE   0x00000000U /* Tx FIFO read status: Idle */

Definition at line 1336 of file stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_TXFIFO_IDLE [4/6]

#define ETH_MAC_TXFIFO_IDLE   0x00000000U /* Tx FIFO read status: Idle */

Definition at line 1336 of file stm32f411/stm32f411e-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_TXFIFO_IDLE [5/6]

#define ETH_MAC_TXFIFO_IDLE   0x00000000U /* Tx FIFO read status: Idle */

Definition at line 1336 of file stm32f469/stm32f469i-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_TXFIFO_IDLE [6/6]

#define ETH_MAC_TXFIFO_IDLE   0x00000000U /* Tx FIFO read status: Idle */

Definition at line 1345 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_TXFIFO_READ [1/6]

#define ETH_MAC_TXFIFO_READ   0x00100000U /* Tx FIFO read status: Read (transferring data to the MAC transmitter) */

Definition at line 1308 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_TXFIFO_READ [2/6]

#define ETH_MAC_TXFIFO_READ   0x00100000U /* Tx FIFO read status: Read (transferring data to the MAC transmitter) */

Definition at line 1337 of file stm32f411/stm32f411e-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_TXFIFO_READ [3/6]

#define ETH_MAC_TXFIFO_READ   0x00100000U /* Tx FIFO read status: Read (transferring data to the MAC transmitter) */

Definition at line 1337 of file stm32f769/stm32f769i-disco/Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_TXFIFO_READ [4/6]

#define ETH_MAC_TXFIFO_READ   0x00100000U /* Tx FIFO read status: Read (transferring data to the MAC transmitter) */

Definition at line 1337 of file stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_TXFIFO_READ [5/6]

#define ETH_MAC_TXFIFO_READ   0x00100000U /* Tx FIFO read status: Read (transferring data to the MAC transmitter) */

Definition at line 1337 of file stm32f469/stm32f469i-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_TXFIFO_READ [6/6]

#define ETH_MAC_TXFIFO_READ   0x00100000U /* Tx FIFO read status: Read (transferring data to the MAC transmitter) */

Definition at line 1346 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_TXFIFO_WAITING [1/6]

#define ETH_MAC_TXFIFO_WAITING   0x00200000U /* Tx FIFO read status: Waiting for TxStatus from MAC transmitter */

Definition at line 1309 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_TXFIFO_WAITING [2/6]

#define ETH_MAC_TXFIFO_WAITING   0x00200000U /* Tx FIFO read status: Waiting for TxStatus from MAC transmitter */

Definition at line 1338 of file stm32f411/stm32f411e-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_TXFIFO_WAITING [3/6]

#define ETH_MAC_TXFIFO_WAITING   0x00200000U /* Tx FIFO read status: Waiting for TxStatus from MAC transmitter */

Definition at line 1338 of file stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_TXFIFO_WAITING [4/6]

#define ETH_MAC_TXFIFO_WAITING   0x00200000U /* Tx FIFO read status: Waiting for TxStatus from MAC transmitter */

Definition at line 1338 of file stm32f469/stm32f469i-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_TXFIFO_WAITING [5/6]

#define ETH_MAC_TXFIFO_WAITING   0x00200000U /* Tx FIFO read status: Waiting for TxStatus from MAC transmitter */

Definition at line 1338 of file stm32f769/stm32f769i-disco/Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_TXFIFO_WAITING [6/6]

#define ETH_MAC_TXFIFO_WAITING   0x00200000U /* Tx FIFO read status: Waiting for TxStatus from MAC transmitter */

Definition at line 1347 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_TXFIFO_WRITE_ACTIVE [1/6]

#define ETH_MAC_TXFIFO_WRITE_ACTIVE   0x00400000U /* Tx FIFO write active */

Definition at line 1306 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_TXFIFO_WRITE_ACTIVE [2/6]

#define ETH_MAC_TXFIFO_WRITE_ACTIVE   0x00400000U /* Tx FIFO write active */

Definition at line 1335 of file stm32f411/stm32f411e-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_TXFIFO_WRITE_ACTIVE [3/6]

#define ETH_MAC_TXFIFO_WRITE_ACTIVE   0x00400000U /* Tx FIFO write active */

Definition at line 1335 of file stm32f769/stm32f769i-disco/Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_TXFIFO_WRITE_ACTIVE [4/6]

#define ETH_MAC_TXFIFO_WRITE_ACTIVE   0x00400000U /* Tx FIFO write active */

Definition at line 1335 of file stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_TXFIFO_WRITE_ACTIVE [5/6]

#define ETH_MAC_TXFIFO_WRITE_ACTIVE   0x00400000U /* Tx FIFO write active */

Definition at line 1335 of file stm32f469/stm32f469i-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_TXFIFO_WRITE_ACTIVE [6/6]

#define ETH_MAC_TXFIFO_WRITE_ACTIVE   0x00400000U /* Tx FIFO write active */

Definition at line 1344 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_TXFIFO_WRITING [1/6]

#define ETH_MAC_TXFIFO_WRITING   0x00300000U /* Tx FIFO read status: Writing the received TxStatus or flushing the TxFIFO */

Definition at line 1310 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_TXFIFO_WRITING [2/6]

#define ETH_MAC_TXFIFO_WRITING   0x00300000U /* Tx FIFO read status: Writing the received TxStatus or flushing the TxFIFO */

Definition at line 1339 of file stm32f411/stm32f411e-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_TXFIFO_WRITING [3/6]

#define ETH_MAC_TXFIFO_WRITING   0x00300000U /* Tx FIFO read status: Writing the received TxStatus or flushing the TxFIFO */

Definition at line 1339 of file stm32f769/stm32f769i-disco/Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_TXFIFO_WRITING [4/6]

#define ETH_MAC_TXFIFO_WRITING   0x00300000U /* Tx FIFO read status: Writing the received TxStatus or flushing the TxFIFO */

Definition at line 1339 of file stm32f469/stm32f469i-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_TXFIFO_WRITING [5/6]

#define ETH_MAC_TXFIFO_WRITING   0x00300000U /* Tx FIFO read status: Writing the received TxStatus or flushing the TxFIFO */

Definition at line 1339 of file stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_TXFIFO_WRITING [6/6]

#define ETH_MAC_TXFIFO_WRITING   0x00300000U /* Tx FIFO read status: Writing the received TxStatus or flushing the TxFIFO */

Definition at line 1348 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_TXFIFONOT_EMPTY [1/6]

#define ETH_MAC_TXFIFONOT_EMPTY   0x01000000U /* Tx FIFO not empty */

Definition at line 1305 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_TXFIFONOT_EMPTY [2/6]

#define ETH_MAC_TXFIFONOT_EMPTY   0x01000000U /* Tx FIFO not empty */

Definition at line 1334 of file stm32f411/stm32f411e-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_TXFIFONOT_EMPTY [3/6]

#define ETH_MAC_TXFIFONOT_EMPTY   0x01000000U /* Tx FIFO not empty */

Definition at line 1334 of file stm32f769/stm32f769i-disco/Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_TXFIFONOT_EMPTY [4/6]

#define ETH_MAC_TXFIFONOT_EMPTY   0x01000000U /* Tx FIFO not empty */

Definition at line 1334 of file stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_TXFIFONOT_EMPTY [5/6]

#define ETH_MAC_TXFIFONOT_EMPTY   0x01000000U /* Tx FIFO not empty */

Definition at line 1334 of file stm32f469/stm32f469i-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MAC_TXFIFONOT_EMPTY [6/6]

#define ETH_MAC_TXFIFONOT_EMPTY   0x01000000U /* Tx FIFO not empty */

Definition at line 1343 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MMCCR [1/6]

#define ETH_MMCCR   0x00000100U

Definition at line 1292 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MMCCR [2/6]

#define ETH_MMCCR   0x00000100U

Definition at line 1321 of file stm32f769/stm32f769i-disco/Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MMCCR [3/6]

#define ETH_MMCCR   0x00000100U

Definition at line 1321 of file stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MMCCR [4/6]

#define ETH_MMCCR   0x00000100U

Definition at line 1321 of file stm32f469/stm32f469i-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MMCCR [5/6]

#define ETH_MMCCR   0x00000100U

Definition at line 1321 of file stm32f411/stm32f411e-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MMCCR [6/6]

#define ETH_MMCCR   0x00000100U

Definition at line 1330 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MMCRFAECR [1/6]

#define ETH_MMCRFAECR   0x00000198U

Definition at line 1301 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MMCRFAECR [2/6]

#define ETH_MMCRFAECR   0x00000198U

Definition at line 1330 of file stm32f769/stm32f769i-disco/Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MMCRFAECR [3/6]

#define ETH_MMCRFAECR   0x00000198U

Definition at line 1330 of file stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MMCRFAECR [4/6]

#define ETH_MMCRFAECR   0x00000198U

Definition at line 1330 of file stm32f469/stm32f469i-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MMCRFAECR [5/6]

#define ETH_MMCRFAECR   0x00000198U

Definition at line 1330 of file stm32f411/stm32f411e-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MMCRFAECR [6/6]

#define ETH_MMCRFAECR   0x00000198U

Definition at line 1339 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MMCRFCECR [1/6]

#define ETH_MMCRFCECR   0x00000194U

Definition at line 1300 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MMCRFCECR [2/6]

#define ETH_MMCRFCECR   0x00000194U

Definition at line 1329 of file stm32f411/stm32f411e-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MMCRFCECR [3/6]

#define ETH_MMCRFCECR   0x00000194U

Definition at line 1329 of file stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MMCRFCECR [4/6]

#define ETH_MMCRFCECR   0x00000194U

Definition at line 1329 of file stm32f469/stm32f469i-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MMCRFCECR [5/6]

#define ETH_MMCRFCECR   0x00000194U

Definition at line 1329 of file stm32f769/stm32f769i-disco/Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MMCRFCECR [6/6]

#define ETH_MMCRFCECR   0x00000194U

Definition at line 1338 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MMCRGUFCR [1/6]

#define ETH_MMCRGUFCR   0x000001C4U

Definition at line 1302 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MMCRGUFCR [2/6]

#define ETH_MMCRGUFCR   0x000001C4U

Definition at line 1331 of file stm32f469/stm32f469i-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MMCRGUFCR [3/6]

#define ETH_MMCRGUFCR   0x000001C4U

Definition at line 1331 of file stm32f411/stm32f411e-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MMCRGUFCR [4/6]

#define ETH_MMCRGUFCR   0x000001C4U

Definition at line 1331 of file stm32f769/stm32f769i-disco/Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MMCRGUFCR [5/6]

#define ETH_MMCRGUFCR   0x000001C4U

Definition at line 1331 of file stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MMCRGUFCR [6/6]

#define ETH_MMCRGUFCR   0x000001C4U

Definition at line 1340 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MMCRIMR [1/6]

#define ETH_MMCRIMR   0x0000010CU

Definition at line 1295 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MMCRIMR [2/6]

#define ETH_MMCRIMR   0x0000010CU

Definition at line 1324 of file stm32f769/stm32f769i-disco/Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MMCRIMR [3/6]

#define ETH_MMCRIMR   0x0000010CU

Definition at line 1324 of file stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MMCRIMR [4/6]

#define ETH_MMCRIMR   0x0000010CU

Definition at line 1324 of file stm32f469/stm32f469i-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MMCRIMR [5/6]

#define ETH_MMCRIMR   0x0000010CU

Definition at line 1324 of file stm32f411/stm32f411e-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MMCRIMR [6/6]

#define ETH_MMCRIMR   0x0000010CU

Definition at line 1333 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MMCRIR [1/6]

#define ETH_MMCRIR   0x00000104U

Definition at line 1293 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MMCRIR [2/6]

#define ETH_MMCRIR   0x00000104U

Definition at line 1322 of file stm32f411/stm32f411e-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MMCRIR [3/6]

#define ETH_MMCRIR   0x00000104U

Definition at line 1322 of file stm32f769/stm32f769i-disco/Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MMCRIR [4/6]

#define ETH_MMCRIR   0x00000104U

Definition at line 1322 of file stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MMCRIR [5/6]

#define ETH_MMCRIR   0x00000104U

Definition at line 1322 of file stm32f469/stm32f469i-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MMCRIR [6/6]

#define ETH_MMCRIR   0x00000104U

Definition at line 1331 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MMCTGFCR [1/6]

#define ETH_MMCTGFCR   0x00000168U

Definition at line 1299 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MMCTGFCR [2/6]

#define ETH_MMCTGFCR   0x00000168U

Definition at line 1328 of file stm32f469/stm32f469i-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MMCTGFCR [3/6]

#define ETH_MMCTGFCR   0x00000168U

Definition at line 1328 of file stm32f769/stm32f769i-disco/Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MMCTGFCR [4/6]

#define ETH_MMCTGFCR   0x00000168U

Definition at line 1328 of file stm32f411/stm32f411e-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MMCTGFCR [5/6]

#define ETH_MMCTGFCR   0x00000168U

Definition at line 1328 of file stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MMCTGFCR [6/6]

#define ETH_MMCTGFCR   0x00000168U

Definition at line 1337 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MMCTGFMSCCR [1/6]

#define ETH_MMCTGFMSCCR   0x00000150U

Definition at line 1298 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MMCTGFMSCCR [2/6]

#define ETH_MMCTGFMSCCR   0x00000150U

Definition at line 1327 of file stm32f469/stm32f469i-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MMCTGFMSCCR [3/6]

#define ETH_MMCTGFMSCCR   0x00000150U

Definition at line 1327 of file stm32f769/stm32f769i-disco/Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MMCTGFMSCCR [4/6]

#define ETH_MMCTGFMSCCR   0x00000150U

Definition at line 1327 of file stm32f411/stm32f411e-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MMCTGFMSCCR [5/6]

#define ETH_MMCTGFMSCCR   0x00000150U

Definition at line 1327 of file stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MMCTGFMSCCR [6/6]

#define ETH_MMCTGFMSCCR   0x00000150U

Definition at line 1336 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MMCTGFSCCR [1/6]

#define ETH_MMCTGFSCCR   0x0000014CU

Definition at line 1297 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MMCTGFSCCR [2/6]

#define ETH_MMCTGFSCCR   0x0000014CU

Definition at line 1326 of file stm32f469/stm32f469i-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MMCTGFSCCR [3/6]

#define ETH_MMCTGFSCCR   0x0000014CU

Definition at line 1326 of file stm32f769/stm32f769i-disco/Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MMCTGFSCCR [4/6]

#define ETH_MMCTGFSCCR   0x0000014CU

Definition at line 1326 of file stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MMCTGFSCCR [5/6]

#define ETH_MMCTGFSCCR   0x0000014CU

Definition at line 1326 of file stm32f411/stm32f411e-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MMCTGFSCCR [6/6]

#define ETH_MMCTGFSCCR   0x0000014CU

Definition at line 1335 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MMCTIMR [1/6]

#define ETH_MMCTIMR   0x00000110U

Definition at line 1296 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MMCTIMR [2/6]

#define ETH_MMCTIMR   0x00000110U

Definition at line 1325 of file stm32f411/stm32f411e-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MMCTIMR [3/6]

#define ETH_MMCTIMR   0x00000110U

Definition at line 1325 of file stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MMCTIMR [4/6]

#define ETH_MMCTIMR   0x00000110U

Definition at line 1325 of file stm32f769/stm32f769i-disco/Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MMCTIMR [5/6]

#define ETH_MMCTIMR   0x00000110U

Definition at line 1325 of file stm32f469/stm32f469i-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MMCTIMR [6/6]

#define ETH_MMCTIMR   0x00000110U

Definition at line 1334 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MMCTIR [1/6]

#define ETH_MMCTIR   0x00000108U

Definition at line 1294 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MMCTIR [2/6]

#define ETH_MMCTIR   0x00000108U

Definition at line 1323 of file stm32f769/stm32f769i-disco/Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MMCTIR [3/6]

#define ETH_MMCTIR   0x00000108U

Definition at line 1323 of file stm32f411/stm32f411e-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MMCTIR [4/6]

#define ETH_MMCTIR   0x00000108U

Definition at line 1323 of file stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MMCTIR [5/6]

#define ETH_MMCTIR   0x00000108U

Definition at line 1323 of file stm32f469/stm32f469i-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

ETH_MMCTIR [6/6]

#define ETH_MMCTIR   0x00000108U

Definition at line 1332 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

JUMBO_FRAME_PAYLOAD [1/6]

#define JUMBO_FRAME_PAYLOAD   ETH_JUMBO_FRAME_PAYLOAD

Definition at line 1286 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

JUMBO_FRAME_PAYLOAD [2/6]

#define JUMBO_FRAME_PAYLOAD   ETH_JUMBO_FRAME_PAYLOAD

Definition at line 1315 of file stm32f769/stm32f769i-disco/Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

JUMBO_FRAME_PAYLOAD [3/6]

#define JUMBO_FRAME_PAYLOAD   ETH_JUMBO_FRAME_PAYLOAD

Definition at line 1315 of file stm32f411/stm32f411e-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

JUMBO_FRAME_PAYLOAD [4/6]

#define JUMBO_FRAME_PAYLOAD   ETH_JUMBO_FRAME_PAYLOAD

Definition at line 1315 of file stm32f469/stm32f469i-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

JUMBO_FRAME_PAYLOAD [5/6]

#define JUMBO_FRAME_PAYLOAD   ETH_JUMBO_FRAME_PAYLOAD

Definition at line 1315 of file stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

JUMBO_FRAME_PAYLOAD [6/6]

#define JUMBO_FRAME_PAYLOAD   ETH_JUMBO_FRAME_PAYLOAD

Definition at line 1324 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

MACCR_CLEAR_MASK [1/6]

#define MACCR_CLEAR_MASK   ETH_MACCR_CLEAR_MASK

Definition at line 1288 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

MACCR_CLEAR_MASK [2/6]

#define MACCR_CLEAR_MASK   ETH_MACCR_CLEAR_MASK

Definition at line 1317 of file stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

MACCR_CLEAR_MASK [3/6]

#define MACCR_CLEAR_MASK   ETH_MACCR_CLEAR_MASK

Definition at line 1317 of file stm32f469/stm32f469i-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

MACCR_CLEAR_MASK [4/6]

#define MACCR_CLEAR_MASK   ETH_MACCR_CLEAR_MASK

Definition at line 1317 of file stm32f769/stm32f769i-disco/Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

MACCR_CLEAR_MASK [5/6]

#define MACCR_CLEAR_MASK   ETH_MACCR_CLEAR_MASK

Definition at line 1317 of file stm32f411/stm32f411e-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

MACCR_CLEAR_MASK [6/6]

#define MACCR_CLEAR_MASK   ETH_MACCR_CLEAR_MASK

Definition at line 1326 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

MACFCR_CLEAR_MASK [1/6]

#define MACFCR_CLEAR_MASK   ETH_MACFCR_CLEAR_MASK

Definition at line 1289 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

MACFCR_CLEAR_MASK [2/6]

#define MACFCR_CLEAR_MASK   ETH_MACFCR_CLEAR_MASK

Definition at line 1318 of file stm32f769/stm32f769i-disco/Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

MACFCR_CLEAR_MASK [3/6]

#define MACFCR_CLEAR_MASK   ETH_MACFCR_CLEAR_MASK

Definition at line 1318 of file stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

MACFCR_CLEAR_MASK [4/6]

#define MACFCR_CLEAR_MASK   ETH_MACFCR_CLEAR_MASK

Definition at line 1318 of file stm32f469/stm32f469i-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

MACFCR_CLEAR_MASK [5/6]

#define MACFCR_CLEAR_MASK   ETH_MACFCR_CLEAR_MASK

Definition at line 1318 of file stm32f411/stm32f411e-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

MACFCR_CLEAR_MASK [6/6]

#define MACFCR_CLEAR_MASK   ETH_MACFCR_CLEAR_MASK

Definition at line 1327 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

MACMIIAR_CR_MASK [1/6]

#define MACMIIAR_CR_MASK   ETH_MACMIIAR_CR_MASK

Definition at line 1287 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

MACMIIAR_CR_MASK [2/6]

#define MACMIIAR_CR_MASK   ETH_MACMIIAR_CR_MASK

Definition at line 1316 of file stm32f769/stm32f769i-disco/Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

MACMIIAR_CR_MASK [3/6]

#define MACMIIAR_CR_MASK   ETH_MACMIIAR_CR_MASK

Definition at line 1316 of file stm32f411/stm32f411e-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

MACMIIAR_CR_MASK [4/6]

#define MACMIIAR_CR_MASK   ETH_MACMIIAR_CR_MASK

Definition at line 1316 of file stm32f469/stm32f469i-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

MACMIIAR_CR_MASK [5/6]

#define MACMIIAR_CR_MASK   ETH_MACMIIAR_CR_MASK

Definition at line 1316 of file stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

MACMIIAR_CR_MASK [6/6]

#define MACMIIAR_CR_MASK   ETH_MACMIIAR_CR_MASK

Definition at line 1325 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

MAX_ETH_PAYLOAD [1/6]

#define MAX_ETH_PAYLOAD   ETH_MAX_ETH_PAYLOAD

Definition at line 1285 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

MAX_ETH_PAYLOAD [2/6]

#define MAX_ETH_PAYLOAD   ETH_MAX_ETH_PAYLOAD

Definition at line 1314 of file stm32f769/stm32f769i-disco/Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

MAX_ETH_PAYLOAD [3/6]

#define MAX_ETH_PAYLOAD   ETH_MAX_ETH_PAYLOAD

Definition at line 1314 of file stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

MAX_ETH_PAYLOAD [4/6]

#define MAX_ETH_PAYLOAD   ETH_MAX_ETH_PAYLOAD

Definition at line 1314 of file stm32f411/stm32f411e-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

MAX_ETH_PAYLOAD [5/6]

#define MAX_ETH_PAYLOAD   ETH_MAX_ETH_PAYLOAD

Definition at line 1314 of file stm32f469/stm32f469i-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

MAX_ETH_PAYLOAD [6/6]

#define MAX_ETH_PAYLOAD   ETH_MAX_ETH_PAYLOAD

Definition at line 1323 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

MIN_ETH_PAYLOAD [1/6]

#define MIN_ETH_PAYLOAD   ETH_MIN_ETH_PAYLOAD

Definition at line 1284 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

MIN_ETH_PAYLOAD [2/6]

#define MIN_ETH_PAYLOAD   ETH_MIN_ETH_PAYLOAD

Definition at line 1313 of file stm32f469/stm32f469i-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

MIN_ETH_PAYLOAD [3/6]

#define MIN_ETH_PAYLOAD   ETH_MIN_ETH_PAYLOAD

Definition at line 1313 of file stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

MIN_ETH_PAYLOAD [4/6]

#define MIN_ETH_PAYLOAD   ETH_MIN_ETH_PAYLOAD

Definition at line 1313 of file stm32f769/stm32f769i-disco/Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

MIN_ETH_PAYLOAD [5/6]

#define MIN_ETH_PAYLOAD   ETH_MIN_ETH_PAYLOAD

Definition at line 1313 of file stm32f411/stm32f411e-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

MIN_ETH_PAYLOAD [6/6]

#define MIN_ETH_PAYLOAD   ETH_MIN_ETH_PAYLOAD

Definition at line 1322 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

VLAN_TAG [1/6]

#define VLAN_TAG   ETH_VLAN_TAG

Definition at line 1283 of file stm32h735/stm32h735g-dk/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

VLAN_TAG [2/6]

#define VLAN_TAG   ETH_VLAN_TAG

Definition at line 1312 of file stm32f411/stm32f411e-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

VLAN_TAG [3/6]

#define VLAN_TAG   ETH_VLAN_TAG

Definition at line 1312 of file stm32f469/stm32f469i-disco/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

VLAN_TAG [4/6]

#define VLAN_TAG   ETH_VLAN_TAG

Definition at line 1312 of file stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

VLAN_TAG [5/6]

#define VLAN_TAG   ETH_VLAN_TAG

Definition at line 1312 of file stm32f769/stm32f769i-disco/Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.

VLAN_TAG [6/6]

#define VLAN_TAG   ETH_VLAN_TAG

Definition at line 1321 of file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h.