usart1.h
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1 
31 /*
32  * Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
33  */
34 
35 #ifndef _SAME70_USART1_INSTANCE_
36 #define _SAME70_USART1_INSTANCE_
37 
38 /* ========== Register definition for USART1 peripheral ========== */
39 #if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
40  #define REG_USART1_CR (0x40028000U)
41  #define REG_USART1_MR (0x40028004U)
42  #define REG_USART1_IER (0x40028008U)
43  #define REG_USART1_IDR (0x4002800CU)
44  #define REG_USART1_IMR (0x40028010U)
45  #define REG_USART1_CSR (0x40028014U)
46  #define REG_USART1_RHR (0x40028018U)
47  #define REG_USART1_THR (0x4002801CU)
48  #define REG_USART1_BRGR (0x40028020U)
49  #define REG_USART1_RTOR (0x40028024U)
50  #define REG_USART1_TTGR (0x40028028U)
51  #define REG_USART1_FIDI (0x40028040U)
52  #define REG_USART1_NER (0x40028044U)
53  #define REG_USART1_IF (0x4002804CU)
54  #define REG_USART1_MAN (0x40028050U)
55  #define REG_USART1_LINMR (0x40028054U)
56  #define REG_USART1_LINIR (0x40028058U)
57  #define REG_USART1_LINBRR (0x4002805CU)
58  #define REG_USART1_LONMR (0x40028060U)
59  #define REG_USART1_LONPR (0x40028064U)
60  #define REG_USART1_LONDL (0x40028068U)
61  #define REG_USART1_LONL2HDR (0x4002806CU)
62  #define REG_USART1_LONBL (0x40028070U)
63  #define REG_USART1_LONB1TX (0x40028074U)
64  #define REG_USART1_LONB1RX (0x40028078U)
65  #define REG_USART1_LONPRIO (0x4002807CU)
66  #define REG_USART1_IDTTX (0x40028080U)
67  #define REG_USART1_IDTRX (0x40028084U)
68  #define REG_USART1_ICDIFF (0x40028088U)
69  #define REG_USART1_WPMR (0x400280E4U)
70  #define REG_USART1_WPSR (0x400280E8U)
71  #define REG_USART1_VERSION (0x400280FCU)
72 #else
73  #define REG_USART1_CR (*(__O uint32_t*)0x40028000U)
74  #define REG_USART1_MR (*(__IO uint32_t*)0x40028004U)
75  #define REG_USART1_IER (*(__O uint32_t*)0x40028008U)
76  #define REG_USART1_IDR (*(__O uint32_t*)0x4002800CU)
77  #define REG_USART1_IMR (*(__I uint32_t*)0x40028010U)
78  #define REG_USART1_CSR (*(__I uint32_t*)0x40028014U)
79  #define REG_USART1_RHR (*(__I uint32_t*)0x40028018U)
80  #define REG_USART1_THR (*(__O uint32_t*)0x4002801CU)
81  #define REG_USART1_BRGR (*(__IO uint32_t*)0x40028020U)
82  #define REG_USART1_RTOR (*(__IO uint32_t*)0x40028024U)
83  #define REG_USART1_TTGR (*(__IO uint32_t*)0x40028028U)
84  #define REG_USART1_FIDI (*(__IO uint32_t*)0x40028040U)
85  #define REG_USART1_NER (*(__I uint32_t*)0x40028044U)
86  #define REG_USART1_IF (*(__IO uint32_t*)0x4002804CU)
87  #define REG_USART1_MAN (*(__IO uint32_t*)0x40028050U)
88  #define REG_USART1_LINMR (*(__IO uint32_t*)0x40028054U)
89  #define REG_USART1_LINIR (*(__IO uint32_t*)0x40028058U)
90  #define REG_USART1_LINBRR (*(__I uint32_t*)0x4002805CU)
91  #define REG_USART1_LONMR (*(__IO uint32_t*)0x40028060U)
92  #define REG_USART1_LONPR (*(__IO uint32_t*)0x40028064U)
93  #define REG_USART1_LONDL (*(__IO uint32_t*)0x40028068U)
94  #define REG_USART1_LONL2HDR (*(__IO uint32_t*)0x4002806CU)
95  #define REG_USART1_LONBL (*(__I uint32_t*)0x40028070U)
96  #define REG_USART1_LONB1TX (*(__IO uint32_t*)0x40028074U)
97  #define REG_USART1_LONB1RX (*(__IO uint32_t*)0x40028078U)
98  #define REG_USART1_LONPRIO (*(__IO uint32_t*)0x4002807CU)
99  #define REG_USART1_IDTTX (*(__IO uint32_t*)0x40028080U)
100  #define REG_USART1_IDTRX (*(__IO uint32_t*)0x40028084U)
101  #define REG_USART1_ICDIFF (*(__IO uint32_t*)0x40028088U)
102  #define REG_USART1_WPMR (*(__IO uint32_t*)0x400280E4U)
103  #define REG_USART1_WPSR (*(__I uint32_t*)0x400280E8U)
104  #define REG_USART1_VERSION (*(__I uint32_t*)0x400280FCU)
105 #endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
106 
107 #endif /* _SAME70_USART1_INSTANCE_ */

inertial_sense_ros
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autogenerated on Sat Sep 19 2020 03:19:05