spi0.h
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1 
31 /*
32  * Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
33  */
34 
35 #ifndef _SAME70_SPI0_INSTANCE_
36 #define _SAME70_SPI0_INSTANCE_
37 
38 /* ========== Register definition for SPI0 peripheral ========== */
39 #if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
40  #define REG_SPI0_CR (0x40008000U)
41  #define REG_SPI0_MR (0x40008004U)
42  #define REG_SPI0_RDR (0x40008008U)
43  #define REG_SPI0_TDR (0x4000800CU)
44  #define REG_SPI0_SR (0x40008010U)
45  #define REG_SPI0_IER (0x40008014U)
46  #define REG_SPI0_IDR (0x40008018U)
47  #define REG_SPI0_IMR (0x4000801CU)
48  #define REG_SPI0_CSR (0x40008030U)
49  #define REG_SPI0_WPMR (0x400080E4U)
50  #define REG_SPI0_WPSR (0x400080E8U)
51  #define REG_SPI0_VERSION (0x400080FCU)
52 #else
53  #define REG_SPI0_CR (*(__O uint32_t*)0x40008000U)
54  #define REG_SPI0_MR (*(__IO uint32_t*)0x40008004U)
55  #define REG_SPI0_RDR (*(__I uint32_t*)0x40008008U)
56  #define REG_SPI0_TDR (*(__O uint32_t*)0x4000800CU)
57  #define REG_SPI0_SR (*(__I uint32_t*)0x40008010U)
58  #define REG_SPI0_IER (*(__O uint32_t*)0x40008014U)
59  #define REG_SPI0_IDR (*(__O uint32_t*)0x40008018U)
60  #define REG_SPI0_IMR (*(__I uint32_t*)0x4000801CU)
61  #define REG_SPI0_CSR (*(__IO uint32_t*)0x40008030U)
62  #define REG_SPI0_WPMR (*(__IO uint32_t*)0x400080E4U)
63  #define REG_SPI0_WPSR (*(__I uint32_t*)0x400080E8U)
64  #define REG_SPI0_VERSION (*(__I uint32_t*)0x400080FCU)
65 #endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
66 
67 #endif /* _SAME70_SPI0_INSTANCE_ */


inertial_sense_ros
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autogenerated on Sat Sep 19 2020 03:19:05