libchip_compiler.h
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1 /* ---------------------------------------------------------------------------- */
2 /* Atmel Microcontroller Software Support */
3 /* SAM Software Package License */
4 /* ---------------------------------------------------------------------------- */
5 /* Copyright (c) 2015, Atmel Corporation */
6 /* */
7 /* All rights reserved. */
8 /* */
9 /* Redistribution and use in source and binary forms, with or without */
10 /* modification, are permitted provided that the following condition is met: */
11 /* */
12 /* - Redistributions of source code must retain the above copyright notice, */
13 /* this list of conditions and the disclaimer below. */
14 /* */
15 /* Atmel's name may not be used to endorse or promote products derived from */
16 /* this software without specific prior written permission. */
17 /* */
18 /* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */
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20 /* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */
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23 /* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */
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28 /* ---------------------------------------------------------------------------- */
29 
30 #ifndef _COMPILER_H_
31 #define _COMPILER_H_
32 
33 /*
34  * Peripherals registers definitions
35  */
36 #if defined(__SAMV71Q21__)
37  #include "include/samv71/samv71.h"
38 #elif defined(__SAME70Q21__)
39  #include "include/same70/same70.h"
40 #elif defined(__SAMS70N20__)
41  #include "sams70.h"
42 #elif defined(__SAME70Q20B__)
43  #include "sams70.h"
44 #else
45  #error "please define correct macro for the chip first!"
46 #endif
47 #include <compiler.h>
48 
49 
50 //_____ D E C L A R A T I O N S ____________________________________________
51 
52 #ifndef __ASSEMBLY__
53 
54 #include <stddef.h>
55 #include <stdlib.h>
56 #include <stdbool.h>
57 #include <stdint.h>
58 
59 #ifndef WEAK
60 /* Define WEAK attribute */
61 #if defined (__CC_ARM)
62  #define WEAK __attribute__ ((weak))
63 #elif defined (__ICCARM__)
64  #define WEAK __weak
65 #elif defined (__GNUC__)
66  #define WEAK __attribute__ ((weak))
67 #endif
68 #endif // WEAK
69 
70 #ifndef COMPILER_NAME
71 /* Define Compiler name of tool chains */
72 #if defined (__CC_ARM)
73  #define COMPILER_NAME "KEIL"
74 #elif defined (__ICCARM__)
75  #define COMPILER_NAME "IAR"
76 #elif defined (__GNUC__)
77  #define COMPILER_NAME "GCC"
78 #endif
79 #endif // COMPILER_NAME
80 
81 #ifndef NO_INIT
82 /* Define NO_INIT attribute */
83 #if defined (__CC_ARM)
84  #define NO_INIT
85 #elif defined (__ICCARM__)
86  #define NO_INIT __no_init
87 #elif defined (__GNUC__)
88  #define NO_INIT
89 #endif
90 #endif // NO_INIT
91 
92 /* Define memory sync for tool chains */
93 #if defined (__CC_ARM)
94  #define memory_sync() __dsb(15);__isb(15);
95 #elif defined (__ICCARM__)
96  #define memory_sync() __DSB();__ISB();
97 #elif defined (__GNUC__)
98  #define memory_sync() __DSB();__ISB();
99 #endif
100 
101 /* Define memory barrier for tool chains */
102 #if defined (__CC_ARM)
103  #define memory_barrier() __dmb(15);
104 #elif defined (__ICCARM__)
105  #define memory_barrier() __DMB();
106 #elif defined (__GNUC__)
107  #define memory_barrier() __DMB();
108 #endif
109 
120 #define TPASTE2(a, b) a##b
122 #define TPASTE3(a, b, c) a##b##c
123 
134 #if 0
136 #define ATPASTE2(a, b) TPASTE2(a, b)
137 #define ATPASTE3(a, b, c) TPASTE3(a, b, c)
138 #endif // 0
139 
141 
148 #define COMPILER_PRAGMA(arg) _Pragma(#arg)
149 
155 #define COMPILER_PACK_SET(alignment) COMPILER_PRAGMA(pack(alignment))
156 
162 #define COMPILER_PACK_RESET() COMPILER_PRAGMA(pack())
163 
168 #if defined (__CC_ARM)
169  #define COMPILER_SECTION(a) __attribute__((__section__(a)))
170 #elif defined (__ICCARM__)
171  #define COMPILER_SECTION(a) COMPILER_PRAGMA(location = a)
172 #elif defined (__GNUC__)
173  #define COMPILER_SECTION(a) __attribute__((__section__(a)))
174 #endif
175 
179 #if defined (__CC_ARM)
180  #define COMPILER_ALIGNED(a) __attribute__((__aligned__(a)))
181 #elif defined (__ICCARM__)
182  #define COMPILER_ALIGNED(a) COMPILER_PRAGMA(data_alignment = a)
183 #elif defined (__GNUC__)
184  #define COMPILER_ALIGNED(a) __attribute__((__aligned__(a)))
185 #endif
186 
191 #ifndef COMPILER_WORD_ALIGNED
192 #if defined (__CC_ARM)
193  #define COMPILER_WORD_ALIGNED __attribute__((__aligned__(4)))
194 #elif defined (__ICCARM__)
195  #define COMPILER_WORD_ALIGNED COMPILER_PRAGMA(data_alignment = 4)
196 #elif defined (__GNUC__)
197  #define COMPILER_WORD_ALIGNED __attribute__((__aligned__(4)))
198 #endif
199 #endif // COMPILER_WORD_ALIGNED
200 
201 
202 
214 
216 #if 0
217 
225 #define Abs(a) (((a) < 0) ? -(a) : (a))
226 
236 #define Min(a, b) (((a) < (b)) ? (a) : (b))
237 
247 #define Max(a, b) (((a) > (b)) ? (a) : (b))
248 #endif // 0
249 
250 // abs() is already defined by stdlib.h
251 
261 #define min(a, b) Min(a, b)
262 
272 #define max(a, b) Max(a, b)
273 
275 
276 #if 0
277 #define be32_to_cpu(x) __REV(x)
278 #define cpu_to_be32(x) __REV(x)
279 #define BE32_TO_CPU(x) __REV(x)
280 #define CPU_TO_BE32(x) __REV(x)
281 #endif // 0
282 
287 #define UNUSED(v) (void)(v)
288 
301 #if 0
302 
311 # define irq_initialize_vectors() \
312  do { \
313  } while (0)
314 
332 # define irq_register_handler(int_num, int_prio) \
333  NVIC_ClearPendingIRQ((IRQn_Type)int_num); \
334  NVIC_SetPriority((IRQn_Type)int_num, int_prio); \
335  NVIC_EnableIRQ((IRQn_Type)int_num); \
336 
337 
338 
339 
340 # define cpu_irq_enable() \
341  do { \
342  /*g_interrupt_enabled = true; */ \
343  __DMB(); \
344  __enable_irq(); \
345  } while (0)
346 # define cpu_irq_disable() \
347  do { \
348  __disable_irq(); \
349  __DMB(); \
350  /*g_interrupt_enabled = false; */ \
351  } while (0)
352 
353  typedef uint32_t irqflags_t;
354 
355 #if !defined(__DOXYGEN__)
356  extern volatile bool g_interrupt_enabled;
357 #endif
358 
359 #define cpu_irq_is_enabled() (__get_PRIMASK() == 0)
360 
361  static volatile uint32_t cpu_irq_critical_section_counter;
362  static volatile bool cpu_irq_prev_interrupt_state;
363 
364  static inline irqflags_t cpu_irq_save(void)
365  {
366  irqflags_t flags = cpu_irq_is_enabled();
367  cpu_irq_disable();
368  return flags;
369  }
370 
371  static inline bool cpu_irq_is_enabled_flags(irqflags_t flags)
372  {
373  return (flags);
374  }
375 
376  static inline void cpu_irq_restore(irqflags_t flags)
377  {
378  if (cpu_irq_is_enabled_flags(flags))
379  cpu_irq_enable();
380  }
381  /*
382  void cpu_irq_enter_critical(void);
383  void cpu_irq_leave_critical(void);*/
384 
389 #endif // 0
390 
391 #define Enable_global_interrupt() cpu_irq_enable()
392 #define Disable_global_interrupt() cpu_irq_disable()
393 #define Is_global_interrupt_enabled() cpu_irq_is_enabled()
394 
395 
396  //_____ M A C R O S ________________________________________________________
397 
400 #define DISABLE 0
402 #define ENABLE 1
403 #define DISABLED 0
404 #define ENABLED 1
405 #define OFF 0
406 #define ON 1
407 #define FALSE 0
408 #define TRUE 1
409 #ifndef __cplusplus
410  #if !defined(__bool_true_false_are_defined)
411  #define false FALSE
412  #define true TRUE
413  #endif
414 #endif
415 #define KO 0
416 #define OK 1
417 #define PASS 0
418 #define FAIL 1
419 #define LOW 0
420 #define HIGH 1
421 #define CLR 0
422 #define SET 1
423 
425 #if 0
426 
432 #define ctz(u) ((u) & (1ul << 0) ? 0 : \
433  (u) & (1ul << 1) ? 1 : \
434  (u) & (1ul << 2) ? 2 : \
435  (u) & (1ul << 3) ? 3 : \
436  (u) & (1ul << 4) ? 4 : \
437  (u) & (1ul << 5) ? 5 : \
438  (u) & (1ul << 6) ? 6 : \
439  (u) & (1ul << 7) ? 7 : \
440  (u) & (1ul << 8) ? 8 : \
441  (u) & (1ul << 9) ? 9 : \
442  (u) & (1ul << 10) ? 10 : \
443  (u) & (1ul << 11) ? 11 : \
444  (u) & (1ul << 12) ? 12 : \
445  (u) & (1ul << 13) ? 13 : \
446  (u) & (1ul << 14) ? 14 : \
447  (u) & (1ul << 15) ? 15 : \
448  (u) & (1ul << 16) ? 16 : \
449  (u) & (1ul << 17) ? 17 : \
450  (u) & (1ul << 18) ? 18 : \
451  (u) & (1ul << 19) ? 19 : \
452  (u) & (1ul << 20) ? 20 : \
453  (u) & (1ul << 21) ? 21 : \
454  (u) & (1ul << 22) ? 22 : \
455  (u) & (1ul << 23) ? 23 : \
456  (u) & (1ul << 24) ? 24 : \
457  (u) & (1ul << 25) ? 25 : \
458  (u) & (1ul << 26) ? 26 : \
459  (u) & (1ul << 27) ? 27 : \
460  (u) & (1ul << 28) ? 28 : \
461  (u) & (1ul << 29) ? 29 : \
462  (u) & (1ul << 30) ? 30 : \
463  (u) & (1ul << 31) ? 31 : \
464  32)
465 #endif // 0
466 
467 #endif // __ASSEMBLY__
468 
469 #endif // _COMPILER_H_
cpu_irq_disable
#define cpu_irq_disable()
Disable interrupts globally.
cpu_irq_critical_section_counter
static volatile uint32_t cpu_irq_critical_section_counter
Definition: interrupt_sam_nvic.h:138
cpu_irq_is_enabled
#define cpu_irq_is_enabled()
Check if interrupts are globally enabled.
cpu_irq_save
static irqflags_t cpu_irq_save(void)
Get and clear the global interrupt flags.
Definition: interrupt_sam_nvic.h:141
g_interrupt_enabled
volatile bool g_interrupt_enabled
Definition: interrupt_sam_nvic.c:44
cpu_irq_restore
static void cpu_irq_restore(irqflags_t flags)
Restore global interrupt flags.
Definition: interrupt_sam_nvic.h:153
compiler.h
Commonly used includes, types and macros.
cpu_irq_is_enabled_flags
static bool cpu_irq_is_enabled_flags(irqflags_t flags)
Check if interrupts are globally enabled in supplied flags.
Definition: interrupt_sam_nvic.h:148
cpu_irq_prev_interrupt_state
static volatile bool cpu_irq_prev_interrupt_state
Definition: interrupt_sam_nvic.h:139
irqflags_t
uint32_t irqflags_t
Type used for holding state of interrupt flag.
Definition: interrupt_sam_nvic.h:130
cpu_irq_enable
#define cpu_irq_enable()
Enable interrupts globally.

inertial_sense_ros
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autogenerated on Sat Sep 19 2020 03:19:04