instance/smc.h

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/*
 * Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
 */

#ifndef _SAME70_SMC_INSTANCE_
#define _SAME70_SMC_INSTANCE_

/* ========== Register definition for SMC peripheral ========== */
#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
  #define REG_SMC_SETUP0                   (0x40080000U) 
  #define REG_SMC_PULSE0                   (0x40080004U) 
  #define REG_SMC_CYCLE0                   (0x40080008U) 
  #define REG_SMC_MODE0                    (0x4008000CU) 
  #define REG_SMC_SETUP1                   (0x40080010U) 
  #define REG_SMC_PULSE1                   (0x40080014U) 
  #define REG_SMC_CYCLE1                   (0x40080018U) 
  #define REG_SMC_MODE1                    (0x4008001CU) 
  #define REG_SMC_SETUP2                   (0x40080020U) 
  #define REG_SMC_PULSE2                   (0x40080024U) 
  #define REG_SMC_CYCLE2                   (0x40080028U) 
  #define REG_SMC_MODE2                    (0x4008002CU) 
  #define REG_SMC_SETUP3                   (0x40080030U) 
  #define REG_SMC_PULSE3                   (0x40080034U) 
  #define REG_SMC_CYCLE3                   (0x40080038U) 
  #define REG_SMC_MODE3                    (0x4008003CU) 
  #define REG_SMC_OCMS                     (0x40080080U) 
  #define REG_SMC_KEY1                     (0x40080084U) 
  #define REG_SMC_KEY2                     (0x40080088U) 
  #define REG_SMC_WPMR                     (0x400800E4U) 
  #define REG_SMC_WPSR                     (0x400800E8U) 
  #define REG_SMC_VERSION                  (0x400800FCU) 
#else
  #define REG_SMC_SETUP0  (*(__IO uint32_t*)0x40080000U) 
  #define REG_SMC_PULSE0  (*(__IO uint32_t*)0x40080004U) 
  #define REG_SMC_CYCLE0  (*(__IO uint32_t*)0x40080008U) 
  #define REG_SMC_MODE0   (*(__IO uint32_t*)0x4008000CU) 
  #define REG_SMC_SETUP1  (*(__IO uint32_t*)0x40080010U) 
  #define REG_SMC_PULSE1  (*(__IO uint32_t*)0x40080014U) 
  #define REG_SMC_CYCLE1  (*(__IO uint32_t*)0x40080018U) 
  #define REG_SMC_MODE1   (*(__IO uint32_t*)0x4008001CU) 
  #define REG_SMC_SETUP2  (*(__IO uint32_t*)0x40080020U) 
  #define REG_SMC_PULSE2  (*(__IO uint32_t*)0x40080024U) 
  #define REG_SMC_CYCLE2  (*(__IO uint32_t*)0x40080028U) 
  #define REG_SMC_MODE2   (*(__IO uint32_t*)0x4008002CU) 
  #define REG_SMC_SETUP3  (*(__IO uint32_t*)0x40080030U) 
  #define REG_SMC_PULSE3  (*(__IO uint32_t*)0x40080034U) 
  #define REG_SMC_CYCLE3  (*(__IO uint32_t*)0x40080038U) 
  #define REG_SMC_MODE3   (*(__IO uint32_t*)0x4008003CU) 
  #define REG_SMC_OCMS    (*(__IO uint32_t*)0x40080080U) 
  #define REG_SMC_KEY1    (*(__O  uint32_t*)0x40080084U) 
  #define REG_SMC_KEY2    (*(__O  uint32_t*)0x40080088U) 
  #define REG_SMC_WPMR    (*(__IO uint32_t*)0x400800E4U) 
  #define REG_SMC_WPSR    (*(__I  uint32_t*)0x400800E8U) 
  #define REG_SMC_VERSION (*(__I  uint32_t*)0x400800FCU) 
#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */

#endif /* _SAME70_SMC_INSTANCE_ */