Go to the documentation of this file. 35 #ifndef _SAME70_USBHS_INSTANCE_ 36 #define _SAME70_USBHS_INSTANCE_ 39 #if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) 40 #define REG_USBHS_DEVCTRL (0x40038000U) 41 #define REG_USBHS_DEVISR (0x40038004U) 42 #define REG_USBHS_DEVICR (0x40038008U) 43 #define REG_USBHS_DEVIFR (0x4003800CU) 44 #define REG_USBHS_DEVIMR (0x40038010U) 45 #define REG_USBHS_DEVIDR (0x40038014U) 46 #define REG_USBHS_DEVIER (0x40038018U) 47 #define REG_USBHS_DEVEPT (0x4003801CU) 48 #define REG_USBHS_DEVFNUM (0x40038020U) 49 #define REG_USBHS_DEVEPTCFG (0x40038100U) 50 #define REG_USBHS_DEVEPTISR (0x40038130U) 51 #define REG_USBHS_DEVEPTICR (0x40038160U) 52 #define REG_USBHS_DEVEPTIFR (0x40038190U) 53 #define REG_USBHS_DEVEPTIMR (0x400381C0U) 54 #define REG_USBHS_DEVEPTIER (0x400381F0U) 55 #define REG_USBHS_DEVEPTIDR (0x40038220U) 56 #define REG_USBHS_DEVDMANXTDSC1 (0x40038310U) 57 #define REG_USBHS_DEVDMAADDRESS1 (0x40038314U) 58 #define REG_USBHS_DEVDMACONTROL1 (0x40038318U) 59 #define REG_USBHS_DEVDMASTATUS1 (0x4003831CU) 60 #define REG_USBHS_DEVDMANXTDSC2 (0x40038320U) 61 #define REG_USBHS_DEVDMAADDRESS2 (0x40038324U) 62 #define REG_USBHS_DEVDMACONTROL2 (0x40038328U) 63 #define REG_USBHS_DEVDMASTATUS2 (0x4003832CU) 64 #define REG_USBHS_DEVDMANXTDSC3 (0x40038330U) 65 #define REG_USBHS_DEVDMAADDRESS3 (0x40038334U) 66 #define REG_USBHS_DEVDMACONTROL3 (0x40038338U) 67 #define REG_USBHS_DEVDMASTATUS3 (0x4003833CU) 68 #define REG_USBHS_DEVDMANXTDSC4 (0x40038340U) 69 #define REG_USBHS_DEVDMAADDRESS4 (0x40038344U) 70 #define REG_USBHS_DEVDMACONTROL4 (0x40038348U) 71 #define REG_USBHS_DEVDMASTATUS4 (0x4003834CU) 72 #define REG_USBHS_DEVDMANXTDSC5 (0x40038350U) 73 #define REG_USBHS_DEVDMAADDRESS5 (0x40038354U) 74 #define REG_USBHS_DEVDMACONTROL5 (0x40038358U) 75 #define REG_USBHS_DEVDMASTATUS5 (0x4003835CU) 76 #define REG_USBHS_DEVDMANXTDSC6 (0x40038360U) 77 #define REG_USBHS_DEVDMAADDRESS6 (0x40038364U) 78 #define REG_USBHS_DEVDMACONTROL6 (0x40038368U) 79 #define REG_USBHS_DEVDMASTATUS6 (0x4003836CU) 80 #define REG_USBHS_DEVDMANXTDSC7 (0x40038370U) 81 #define REG_USBHS_DEVDMAADDRESS7 (0x40038374U) 82 #define REG_USBHS_DEVDMACONTROL7 (0x40038378U) 83 #define REG_USBHS_DEVDMASTATUS7 (0x4003837CU) 84 #define REG_USBHS_HSTCTRL (0x40038400U) 85 #define REG_USBHS_HSTISR (0x40038404U) 86 #define REG_USBHS_HSTICR (0x40038408U) 87 #define REG_USBHS_HSTIFR (0x4003840CU) 88 #define REG_USBHS_HSTIMR (0x40038410U) 89 #define REG_USBHS_HSTIDR (0x40038414U) 90 #define REG_USBHS_HSTIER (0x40038418U) 91 #define REG_USBHS_HSTPIP (0x4003841CU) 92 #define REG_USBHS_HSTFNUM (0x40038420U) 93 #define REG_USBHS_HSTADDR1 (0x40038424U) 94 #define REG_USBHS_HSTADDR2 (0x40038428U) 95 #define REG_USBHS_HSTADDR3 (0x4003842CU) 96 #define REG_USBHS_HSTPIPCFG (0x40038500U) 97 #define REG_USBHS_HSTPIPISR (0x40038530U) 98 #define REG_USBHS_HSTPIPICR (0x40038560U) 99 #define REG_USBHS_HSTPIPIFR (0x40038590U) 100 #define REG_USBHS_HSTPIPIMR (0x400385C0U) 101 #define REG_USBHS_HSTPIPIER (0x400385F0U) 102 #define REG_USBHS_HSTPIPIDR (0x40038620U) 103 #define REG_USBHS_HSTPIPINRQ (0x40038650U) 104 #define REG_USBHS_HSTPIPERR (0x40038680U) 105 #define REG_USBHS_HSTDMANXTDSC1 (0x40038710U) 106 #define REG_USBHS_HSTDMAADDRESS1 (0x40038714U) 107 #define REG_USBHS_HSTDMACONTROL1 (0x40038718U) 108 #define REG_USBHS_HSTDMASTATUS1 (0x4003871CU) 109 #define REG_USBHS_HSTDMANXTDSC2 (0x40038720U) 110 #define REG_USBHS_HSTDMAADDRESS2 (0x40038724U) 111 #define REG_USBHS_HSTDMACONTROL2 (0x40038728U) 112 #define REG_USBHS_HSTDMASTATUS2 (0x4003872CU) 113 #define REG_USBHS_HSTDMANXTDSC3 (0x40038730U) 114 #define REG_USBHS_HSTDMAADDRESS3 (0x40038734U) 115 #define REG_USBHS_HSTDMACONTROL3 (0x40038738U) 116 #define REG_USBHS_HSTDMASTATUS3 (0x4003873CU) 117 #define REG_USBHS_HSTDMANXTDSC4 (0x40038740U) 118 #define REG_USBHS_HSTDMAADDRESS4 (0x40038744U) 119 #define REG_USBHS_HSTDMACONTROL4 (0x40038748U) 120 #define REG_USBHS_HSTDMASTATUS4 (0x4003874CU) 121 #define REG_USBHS_HSTDMANXTDSC5 (0x40038750U) 122 #define REG_USBHS_HSTDMAADDRESS5 (0x40038754U) 123 #define REG_USBHS_HSTDMACONTROL5 (0x40038758U) 124 #define REG_USBHS_HSTDMASTATUS5 (0x4003875CU) 125 #define REG_USBHS_HSTDMANXTDSC6 (0x40038760U) 126 #define REG_USBHS_HSTDMAADDRESS6 (0x40038764U) 127 #define REG_USBHS_HSTDMACONTROL6 (0x40038768U) 128 #define REG_USBHS_HSTDMASTATUS6 (0x4003876CU) 129 #define REG_USBHS_HSTDMANXTDSC7 (0x40038770U) 130 #define REG_USBHS_HSTDMAADDRESS7 (0x40038774U) 131 #define REG_USBHS_HSTDMACONTROL7 (0x40038778U) 132 #define REG_USBHS_HSTDMASTATUS7 (0x4003877CU) 133 #define REG_USBHS_CTRL (0x40038800U) 134 #define REG_USBHS_SR (0x40038804U) 135 #define REG_USBHS_SCR (0x40038808U) 136 #define REG_USBHS_SFR (0x4003880CU) 137 #define REG_USBHS_TSTA1 (0x40038810U) 138 #define REG_USBHS_TSTA2 (0x40038814U) 139 #define REG_USBHS_VERSION (0x40038818U) 140 #define REG_USBHS_FSM (0x4003882CU) 142 #define REG_USBHS_DEVCTRL (*(__IO uint32_t*)0x40038000U) 143 #define REG_USBHS_DEVISR (*(__I uint32_t*)0x40038004U) 144 #define REG_USBHS_DEVICR (*(__O uint32_t*)0x40038008U) 145 #define REG_USBHS_DEVIFR (*(__O uint32_t*)0x4003800CU) 146 #define REG_USBHS_DEVIMR (*(__I uint32_t*)0x40038010U) 147 #define REG_USBHS_DEVIDR (*(__O uint32_t*)0x40038014U) 148 #define REG_USBHS_DEVIER (*(__O uint32_t*)0x40038018U) 149 #define REG_USBHS_DEVEPT (*(__IO uint32_t*)0x4003801CU) 150 #define REG_USBHS_DEVFNUM (*(__I uint32_t*)0x40038020U) 151 #define REG_USBHS_DEVEPTCFG (*(__IO uint32_t*)0x40038100U) 152 #define REG_USBHS_DEVEPTISR (*(__I uint32_t*)0x40038130U) 153 #define REG_USBHS_DEVEPTICR (*(__O uint32_t*)0x40038160U) 154 #define REG_USBHS_DEVEPTIFR (*(__O uint32_t*)0x40038190U) 155 #define REG_USBHS_DEVEPTIMR (*(__I uint32_t*)0x400381C0U) 156 #define REG_USBHS_DEVEPTIER (*(__O uint32_t*)0x400381F0U) 157 #define REG_USBHS_DEVEPTIDR (*(__O uint32_t*)0x40038220U) 158 #define REG_USBHS_DEVDMANXTDSC1 (*(__IO uint32_t*)0x40038310U) 159 #define REG_USBHS_DEVDMAADDRESS1 (*(__IO uint32_t*)0x40038314U) 160 #define REG_USBHS_DEVDMACONTROL1 (*(__IO uint32_t*)0x40038318U) 161 #define REG_USBHS_DEVDMASTATUS1 (*(__IO uint32_t*)0x4003831CU) 162 #define REG_USBHS_DEVDMANXTDSC2 (*(__IO uint32_t*)0x40038320U) 163 #define REG_USBHS_DEVDMAADDRESS2 (*(__IO uint32_t*)0x40038324U) 164 #define REG_USBHS_DEVDMACONTROL2 (*(__IO uint32_t*)0x40038328U) 165 #define REG_USBHS_DEVDMASTATUS2 (*(__IO uint32_t*)0x4003832CU) 166 #define REG_USBHS_DEVDMANXTDSC3 (*(__IO uint32_t*)0x40038330U) 167 #define REG_USBHS_DEVDMAADDRESS3 (*(__IO uint32_t*)0x40038334U) 168 #define REG_USBHS_DEVDMACONTROL3 (*(__IO uint32_t*)0x40038338U) 169 #define REG_USBHS_DEVDMASTATUS3 (*(__IO uint32_t*)0x4003833CU) 170 #define REG_USBHS_DEVDMANXTDSC4 (*(__IO uint32_t*)0x40038340U) 171 #define REG_USBHS_DEVDMAADDRESS4 (*(__IO uint32_t*)0x40038344U) 172 #define REG_USBHS_DEVDMACONTROL4 (*(__IO uint32_t*)0x40038348U) 173 #define REG_USBHS_DEVDMASTATUS4 (*(__IO uint32_t*)0x4003834CU) 174 #define REG_USBHS_DEVDMANXTDSC5 (*(__IO uint32_t*)0x40038350U) 175 #define REG_USBHS_DEVDMAADDRESS5 (*(__IO uint32_t*)0x40038354U) 176 #define REG_USBHS_DEVDMACONTROL5 (*(__IO uint32_t*)0x40038358U) 177 #define REG_USBHS_DEVDMASTATUS5 (*(__IO uint32_t*)0x4003835CU) 178 #define REG_USBHS_DEVDMANXTDSC6 (*(__IO uint32_t*)0x40038360U) 179 #define REG_USBHS_DEVDMAADDRESS6 (*(__IO uint32_t*)0x40038364U) 180 #define REG_USBHS_DEVDMACONTROL6 (*(__IO uint32_t*)0x40038368U) 181 #define REG_USBHS_DEVDMASTATUS6 (*(__IO uint32_t*)0x4003836CU) 182 #define REG_USBHS_DEVDMANXTDSC7 (*(__IO uint32_t*)0x40038370U) 183 #define REG_USBHS_DEVDMAADDRESS7 (*(__IO uint32_t*)0x40038374U) 184 #define REG_USBHS_DEVDMACONTROL7 (*(__IO uint32_t*)0x40038378U) 185 #define REG_USBHS_DEVDMASTATUS7 (*(__IO uint32_t*)0x4003837CU) 186 #define REG_USBHS_HSTCTRL (*(__IO uint32_t*)0x40038400U) 187 #define REG_USBHS_HSTISR (*(__I uint32_t*)0x40038404U) 188 #define REG_USBHS_HSTICR (*(__O uint32_t*)0x40038408U) 189 #define REG_USBHS_HSTIFR (*(__O uint32_t*)0x4003840CU) 190 #define REG_USBHS_HSTIMR (*(__I uint32_t*)0x40038410U) 191 #define REG_USBHS_HSTIDR (*(__O uint32_t*)0x40038414U) 192 #define REG_USBHS_HSTIER (*(__O uint32_t*)0x40038418U) 193 #define REG_USBHS_HSTPIP (*(__IO uint32_t*)0x4003841CU) 194 #define REG_USBHS_HSTFNUM (*(__IO uint32_t*)0x40038420U) 195 #define REG_USBHS_HSTADDR1 (*(__IO uint32_t*)0x40038424U) 196 #define REG_USBHS_HSTADDR2 (*(__IO uint32_t*)0x40038428U) 197 #define REG_USBHS_HSTADDR3 (*(__IO uint32_t*)0x4003842CU) 198 #define REG_USBHS_HSTPIPCFG (*(__IO uint32_t*)0x40038500U) 199 #define REG_USBHS_HSTPIPISR (*(__I uint32_t*)0x40038530U) 200 #define REG_USBHS_HSTPIPICR (*(__O uint32_t*)0x40038560U) 201 #define REG_USBHS_HSTPIPIFR (*(__O uint32_t*)0x40038590U) 202 #define REG_USBHS_HSTPIPIMR (*(__I uint32_t*)0x400385C0U) 203 #define REG_USBHS_HSTPIPIER (*(__O uint32_t*)0x400385F0U) 204 #define REG_USBHS_HSTPIPIDR (*(__O uint32_t*)0x40038620U) 205 #define REG_USBHS_HSTPIPINRQ (*(__IO uint32_t*)0x40038650U) 206 #define REG_USBHS_HSTPIPERR (*(__IO uint32_t*)0x40038680U) 207 #define REG_USBHS_HSTDMANXTDSC1 (*(__IO uint32_t*)0x40038710U) 208 #define REG_USBHS_HSTDMAADDRESS1 (*(__IO uint32_t*)0x40038714U) 209 #define REG_USBHS_HSTDMACONTROL1 (*(__IO uint32_t*)0x40038718U) 210 #define REG_USBHS_HSTDMASTATUS1 (*(__IO uint32_t*)0x4003871CU) 211 #define REG_USBHS_HSTDMANXTDSC2 (*(__IO uint32_t*)0x40038720U) 212 #define REG_USBHS_HSTDMAADDRESS2 (*(__IO uint32_t*)0x40038724U) 213 #define REG_USBHS_HSTDMACONTROL2 (*(__IO uint32_t*)0x40038728U) 214 #define REG_USBHS_HSTDMASTATUS2 (*(__IO uint32_t*)0x4003872CU) 215 #define REG_USBHS_HSTDMANXTDSC3 (*(__IO uint32_t*)0x40038730U) 216 #define REG_USBHS_HSTDMAADDRESS3 (*(__IO uint32_t*)0x40038734U) 217 #define REG_USBHS_HSTDMACONTROL3 (*(__IO uint32_t*)0x40038738U) 218 #define REG_USBHS_HSTDMASTATUS3 (*(__IO uint32_t*)0x4003873CU) 219 #define REG_USBHS_HSTDMANXTDSC4 (*(__IO uint32_t*)0x40038740U) 220 #define REG_USBHS_HSTDMAADDRESS4 (*(__IO uint32_t*)0x40038744U) 221 #define REG_USBHS_HSTDMACONTROL4 (*(__IO uint32_t*)0x40038748U) 222 #define REG_USBHS_HSTDMASTATUS4 (*(__IO uint32_t*)0x4003874CU) 223 #define REG_USBHS_HSTDMANXTDSC5 (*(__IO uint32_t*)0x40038750U) 224 #define REG_USBHS_HSTDMAADDRESS5 (*(__IO uint32_t*)0x40038754U) 225 #define REG_USBHS_HSTDMACONTROL5 (*(__IO uint32_t*)0x40038758U) 226 #define REG_USBHS_HSTDMASTATUS5 (*(__IO uint32_t*)0x4003875CU) 227 #define REG_USBHS_HSTDMANXTDSC6 (*(__IO uint32_t*)0x40038760U) 228 #define REG_USBHS_HSTDMAADDRESS6 (*(__IO uint32_t*)0x40038764U) 229 #define REG_USBHS_HSTDMACONTROL6 (*(__IO uint32_t*)0x40038768U) 230 #define REG_USBHS_HSTDMASTATUS6 (*(__IO uint32_t*)0x4003876CU) 231 #define REG_USBHS_HSTDMANXTDSC7 (*(__IO uint32_t*)0x40038770U) 232 #define REG_USBHS_HSTDMAADDRESS7 (*(__IO uint32_t*)0x40038774U) 233 #define REG_USBHS_HSTDMACONTROL7 (*(__IO uint32_t*)0x40038778U) 234 #define REG_USBHS_HSTDMASTATUS7 (*(__IO uint32_t*)0x4003877CU) 235 #define REG_USBHS_CTRL (*(__IO uint32_t*)0x40038800U) 236 #define REG_USBHS_SR (*(__I uint32_t*)0x40038804U) 237 #define REG_USBHS_SCR (*(__O uint32_t*)0x40038808U) 238 #define REG_USBHS_SFR (*(__O uint32_t*)0x4003880CU) 239 #define REG_USBHS_TSTA1 (*(__IO uint32_t*)0x40038810U) 240 #define REG_USBHS_TSTA2 (*(__IO uint32_t*)0x40038814U) 241 #define REG_USBHS_VERSION (*(__I uint32_t*)0x40038818U) 242 #define REG_USBHS_FSM (*(__I uint32_t*)0x4003882CU)