stm32f10x_spi.h
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1 
23 /* Define to prevent recursive inclusion -------------------------------------*/
24 #ifndef __STM32F10x_SPI_H
25 #define __STM32F10x_SPI_H
26 
27 #ifdef __cplusplus
28  extern "C" {
29 #endif
30 
31 /* Includes ------------------------------------------------------------------*/
32 #include "stm32f10x.h"
33 
50 typedef struct
51 {
52  uint16_t SPI_Direction;
55  uint16_t SPI_Mode;
58  uint16_t SPI_DataSize;
61  uint16_t SPI_CPOL;
64  uint16_t SPI_CPHA;
67  uint16_t SPI_NSS;
71  uint16_t SPI_BaudRatePrescaler;
77  uint16_t SPI_FirstBit;
80  uint16_t SPI_CRCPolynomial;
81 }SPI_InitTypeDef;
82 
87 typedef struct
88 {
89 
90  uint16_t I2S_Mode;
93  uint16_t I2S_Standard;
96  uint16_t I2S_DataFormat;
99  uint16_t I2S_MCLKOutput;
102  uint32_t I2S_AudioFreq;
105  uint16_t I2S_CPOL;
107 }I2S_InitTypeDef;
108 
117 #define IS_SPI_ALL_PERIPH(PERIPH) (((PERIPH) == SPI1) || \
118  ((PERIPH) == SPI2) || \
119  ((PERIPH) == SPI3))
120 
121 #define IS_SPI_23_PERIPH(PERIPH) (((PERIPH) == SPI2) || \
122  ((PERIPH) == SPI3))
123 
128 #define SPI_Direction_2Lines_FullDuplex ((uint16_t)0x0000)
129 #define SPI_Direction_2Lines_RxOnly ((uint16_t)0x0400)
130 #define SPI_Direction_1Line_Rx ((uint16_t)0x8000)
131 #define SPI_Direction_1Line_Tx ((uint16_t)0xC000)
132 #define IS_SPI_DIRECTION_MODE(MODE) (((MODE) == SPI_Direction_2Lines_FullDuplex) || \
133  ((MODE) == SPI_Direction_2Lines_RxOnly) || \
134  ((MODE) == SPI_Direction_1Line_Rx) || \
135  ((MODE) == SPI_Direction_1Line_Tx))
136 
144 #define SPI_Mode_Master ((uint16_t)0x0104)
145 #define SPI_Mode_Slave ((uint16_t)0x0000)
146 #define IS_SPI_MODE(MODE) (((MODE) == SPI_Mode_Master) || \
147  ((MODE) == SPI_Mode_Slave))
148 
156 #define SPI_DataSize_16b ((uint16_t)0x0800)
157 #define SPI_DataSize_8b ((uint16_t)0x0000)
158 #define IS_SPI_DATASIZE(DATASIZE) (((DATASIZE) == SPI_DataSize_16b) || \
159  ((DATASIZE) == SPI_DataSize_8b))
160 
168 #define SPI_CPOL_Low ((uint16_t)0x0000)
169 #define SPI_CPOL_High ((uint16_t)0x0002)
170 #define IS_SPI_CPOL(CPOL) (((CPOL) == SPI_CPOL_Low) || \
171  ((CPOL) == SPI_CPOL_High))
172 
180 #define SPI_CPHA_1Edge ((uint16_t)0x0000)
181 #define SPI_CPHA_2Edge ((uint16_t)0x0001)
182 #define IS_SPI_CPHA(CPHA) (((CPHA) == SPI_CPHA_1Edge) || \
183  ((CPHA) == SPI_CPHA_2Edge))
184 
192 #define SPI_NSS_Soft ((uint16_t)0x0200)
193 #define SPI_NSS_Hard ((uint16_t)0x0000)
194 #define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_Soft) || \
195  ((NSS) == SPI_NSS_Hard))
196 
204 #define SPI_BaudRatePrescaler_2 ((uint16_t)0x0000)
205 #define SPI_BaudRatePrescaler_4 ((uint16_t)0x0008)
206 #define SPI_BaudRatePrescaler_8 ((uint16_t)0x0010)
207 #define SPI_BaudRatePrescaler_16 ((uint16_t)0x0018)
208 #define SPI_BaudRatePrescaler_32 ((uint16_t)0x0020)
209 #define SPI_BaudRatePrescaler_64 ((uint16_t)0x0028)
210 #define SPI_BaudRatePrescaler_128 ((uint16_t)0x0030)
211 #define SPI_BaudRatePrescaler_256 ((uint16_t)0x0038)
212 #define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BaudRatePrescaler_2) || \
213  ((PRESCALER) == SPI_BaudRatePrescaler_4) || \
214  ((PRESCALER) == SPI_BaudRatePrescaler_8) || \
215  ((PRESCALER) == SPI_BaudRatePrescaler_16) || \
216  ((PRESCALER) == SPI_BaudRatePrescaler_32) || \
217  ((PRESCALER) == SPI_BaudRatePrescaler_64) || \
218  ((PRESCALER) == SPI_BaudRatePrescaler_128) || \
219  ((PRESCALER) == SPI_BaudRatePrescaler_256))
220 
228 #define SPI_FirstBit_MSB ((uint16_t)0x0000)
229 #define SPI_FirstBit_LSB ((uint16_t)0x0080)
230 #define IS_SPI_FIRST_BIT(BIT) (((BIT) == SPI_FirstBit_MSB) || \
231  ((BIT) == SPI_FirstBit_LSB))
232 
240 #define I2S_Mode_SlaveTx ((uint16_t)0x0000)
241 #define I2S_Mode_SlaveRx ((uint16_t)0x0100)
242 #define I2S_Mode_MasterTx ((uint16_t)0x0200)
243 #define I2S_Mode_MasterRx ((uint16_t)0x0300)
244 #define IS_I2S_MODE(MODE) (((MODE) == I2S_Mode_SlaveTx) || \
245  ((MODE) == I2S_Mode_SlaveRx) || \
246  ((MODE) == I2S_Mode_MasterTx) || \
247  ((MODE) == I2S_Mode_MasterRx) )
248 
256 #define I2S_Standard_Phillips ((uint16_t)0x0000)
257 #define I2S_Standard_MSB ((uint16_t)0x0010)
258 #define I2S_Standard_LSB ((uint16_t)0x0020)
259 #define I2S_Standard_PCMShort ((uint16_t)0x0030)
260 #define I2S_Standard_PCMLong ((uint16_t)0x00B0)
261 #define IS_I2S_STANDARD(STANDARD) (((STANDARD) == I2S_Standard_Phillips) || \
262  ((STANDARD) == I2S_Standard_MSB) || \
263  ((STANDARD) == I2S_Standard_LSB) || \
264  ((STANDARD) == I2S_Standard_PCMShort) || \
265  ((STANDARD) == I2S_Standard_PCMLong))
266 
274 #define I2S_DataFormat_16b ((uint16_t)0x0000)
275 #define I2S_DataFormat_16bextended ((uint16_t)0x0001)
276 #define I2S_DataFormat_24b ((uint16_t)0x0003)
277 #define I2S_DataFormat_32b ((uint16_t)0x0005)
278 #define IS_I2S_DATA_FORMAT(FORMAT) (((FORMAT) == I2S_DataFormat_16b) || \
279  ((FORMAT) == I2S_DataFormat_16bextended) || \
280  ((FORMAT) == I2S_DataFormat_24b) || \
281  ((FORMAT) == I2S_DataFormat_32b))
282 
290 #define I2S_MCLKOutput_Enable ((uint16_t)0x0200)
291 #define I2S_MCLKOutput_Disable ((uint16_t)0x0000)
292 #define IS_I2S_MCLK_OUTPUT(OUTPUT) (((OUTPUT) == I2S_MCLKOutput_Enable) || \
293  ((OUTPUT) == I2S_MCLKOutput_Disable))
294 
302 #define I2S_AudioFreq_192k ((uint32_t)192000)
303 #define I2S_AudioFreq_96k ((uint32_t)96000)
304 #define I2S_AudioFreq_48k ((uint32_t)48000)
305 #define I2S_AudioFreq_44k ((uint32_t)44100)
306 #define I2S_AudioFreq_32k ((uint32_t)32000)
307 #define I2S_AudioFreq_22k ((uint32_t)22050)
308 #define I2S_AudioFreq_16k ((uint32_t)16000)
309 #define I2S_AudioFreq_11k ((uint32_t)11025)
310 #define I2S_AudioFreq_8k ((uint32_t)8000)
311 #define I2S_AudioFreq_Default ((uint32_t)2)
312 
313 #define IS_I2S_AUDIO_FREQ(FREQ) ((((FREQ) >= I2S_AudioFreq_8k) && \
314  ((FREQ) <= I2S_AudioFreq_192k)) || \
315  ((FREQ) == I2S_AudioFreq_Default))
316 
324 #define I2S_CPOL_Low ((uint16_t)0x0000)
325 #define I2S_CPOL_High ((uint16_t)0x0008)
326 #define IS_I2S_CPOL(CPOL) (((CPOL) == I2S_CPOL_Low) || \
327  ((CPOL) == I2S_CPOL_High))
328 
336 #define SPI_I2S_DMAReq_Tx ((uint16_t)0x0002)
337 #define SPI_I2S_DMAReq_Rx ((uint16_t)0x0001)
338 #define IS_SPI_I2S_DMAREQ(DMAREQ) ((((DMAREQ) & (uint16_t)0xFFFC) == 0x00) && ((DMAREQ) != 0x00))
339 
347 #define SPI_NSSInternalSoft_Set ((uint16_t)0x0100)
348 #define SPI_NSSInternalSoft_Reset ((uint16_t)0xFEFF)
349 #define IS_SPI_NSS_INTERNAL(INTERNAL) (((INTERNAL) == SPI_NSSInternalSoft_Set) || \
350  ((INTERNAL) == SPI_NSSInternalSoft_Reset))
351 
359 #define SPI_CRC_Tx ((uint8_t)0x00)
360 #define SPI_CRC_Rx ((uint8_t)0x01)
361 #define IS_SPI_CRC(CRC) (((CRC) == SPI_CRC_Tx) || ((CRC) == SPI_CRC_Rx))
362 
370 #define SPI_Direction_Rx ((uint16_t)0xBFFF)
371 #define SPI_Direction_Tx ((uint16_t)0x4000)
372 #define IS_SPI_DIRECTION(DIRECTION) (((DIRECTION) == SPI_Direction_Rx) || \
373  ((DIRECTION) == SPI_Direction_Tx))
374 
382 #define SPI_I2S_IT_TXE ((uint8_t)0x71)
383 #define SPI_I2S_IT_RXNE ((uint8_t)0x60)
384 #define SPI_I2S_IT_ERR ((uint8_t)0x50)
385 #define IS_SPI_I2S_CONFIG_IT(IT) (((IT) == SPI_I2S_IT_TXE) || \
386  ((IT) == SPI_I2S_IT_RXNE) || \
387  ((IT) == SPI_I2S_IT_ERR))
388 #define SPI_I2S_IT_OVR ((uint8_t)0x56)
389 #define SPI_IT_MODF ((uint8_t)0x55)
390 #define SPI_IT_CRCERR ((uint8_t)0x54)
391 #define I2S_IT_UDR ((uint8_t)0x53)
392 #define IS_SPI_I2S_CLEAR_IT(IT) (((IT) == SPI_IT_CRCERR))
393 #define IS_SPI_I2S_GET_IT(IT) (((IT) == SPI_I2S_IT_RXNE) || ((IT) == SPI_I2S_IT_TXE) || \
394  ((IT) == I2S_IT_UDR) || ((IT) == SPI_IT_CRCERR) || \
395  ((IT) == SPI_IT_MODF) || ((IT) == SPI_I2S_IT_OVR))
396 
404 #define SPI_I2S_FLAG_RXNE ((uint16_t)0x0001)
405 #define SPI_I2S_FLAG_TXE ((uint16_t)0x0002)
406 #define I2S_FLAG_CHSIDE ((uint16_t)0x0004)
407 #define I2S_FLAG_UDR ((uint16_t)0x0008)
408 #define SPI_FLAG_CRCERR ((uint16_t)0x0010)
409 #define SPI_FLAG_MODF ((uint16_t)0x0020)
410 #define SPI_I2S_FLAG_OVR ((uint16_t)0x0040)
411 #define SPI_I2S_FLAG_BSY ((uint16_t)0x0080)
412 #define IS_SPI_I2S_CLEAR_FLAG(FLAG) (((FLAG) == SPI_FLAG_CRCERR))
413 #define IS_SPI_I2S_GET_FLAG(FLAG) (((FLAG) == SPI_I2S_FLAG_BSY) || ((FLAG) == SPI_I2S_FLAG_OVR) || \
414  ((FLAG) == SPI_FLAG_MODF) || ((FLAG) == SPI_FLAG_CRCERR) || \
415  ((FLAG) == I2S_FLAG_UDR) || ((FLAG) == I2S_FLAG_CHSIDE) || \
416  ((FLAG) == SPI_I2S_FLAG_TXE) || ((FLAG) == SPI_I2S_FLAG_RXNE))
417 
425 #define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) ((POLYNOMIAL) >= 0x1)
426 
446 void SPI_I2S_DeInit(SPI_TypeDef* SPIx);
447 void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct);
448 void I2S_Init(SPI_TypeDef* SPIx, I2S_InitTypeDef* I2S_InitStruct);
449 void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct);
450 void I2S_StructInit(I2S_InitTypeDef* I2S_InitStruct);
451 void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState);
452 void I2S_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState);
453 void SPI_I2S_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT, FunctionalState NewState);
454 void SPI_I2S_DMACmd(SPI_TypeDef* SPIx, uint16_t SPI_I2S_DMAReq, FunctionalState NewState);
455 void SPI_I2S_SendData(SPI_TypeDef* SPIx, uint16_t Data);
456 uint16_t SPI_I2S_ReceiveData(SPI_TypeDef* SPIx);
457 void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, uint16_t SPI_NSSInternalSoft);
458 void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState);
459 void SPI_DataSizeConfig(SPI_TypeDef* SPIx, uint16_t SPI_DataSize);
460 void SPI_TransmitCRC(SPI_TypeDef* SPIx);
461 void SPI_CalculateCRC(SPI_TypeDef* SPIx, FunctionalState NewState);
462 uint16_t SPI_GetCRC(SPI_TypeDef* SPIx, uint8_t SPI_CRC);
463 uint16_t SPI_GetCRCPolynomial(SPI_TypeDef* SPIx);
464 void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, uint16_t SPI_Direction);
465 FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG);
466 void SPI_I2S_ClearFlag(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG);
467 ITStatus SPI_I2S_GetITStatus(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT);
468 void SPI_I2S_ClearITPendingBit(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT);
469 
470 #ifdef __cplusplus
471 }
472 #endif
473 
474 #endif /*__STM32F10x_SPI_H */
475 
487 /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
FlagStatus
FlagStatus
Definition: stm32f4xx.h:706
FunctionalState
FunctionalState
Definition: stm32f4xx.h:708
SPI_Init
void SPI_Init(SPI_TypeDef *SPIx, SPI_InitTypeDef *SPI_InitStruct)
Initializes the SPIx peripheral according to the specified parameters in the SPI_InitStruct.
Definition: stm32f4xx_spi.c:284
SPI_I2S_ClearFlag
void SPI_I2S_ClearFlag(SPI_TypeDef *SPIx, uint16_t SPI_I2S_FLAG)
Clears the SPIx CRC Error (CRCERR) flag.
Definition: stm32f4xx_spi.c:1202
SPI_NSSInternalSoftwareConfig
void SPI_NSSInternalSoftwareConfig(SPI_TypeDef *SPIx, uint16_t SPI_NSSInternalSoft)
Configures internally by software the NSS pin for the selected SPI.
Definition: stm32f4xx_spi.c:635
SPI_StructInit
void SPI_StructInit(SPI_InitTypeDef *SPI_InitStruct)
Fills each SPI_InitStruct member with its default value.
Definition: stm32f4xx_spi.c:480
SPI_GetCRC
uint16_t SPI_GetCRC(SPI_TypeDef *SPIx, uint8_t SPI_CRC)
Returns the transmit or the receive CRC register value for the specified SPI.
Definition: stm32f4xx_spi.c:947
SPI_I2S_GetITStatus
ITStatus SPI_I2S_GetITStatus(SPI_TypeDef *SPIx, uint8_t SPI_I2S_IT)
Checks whether the specified SPIx/I2Sx interrupt has occurred or not.
Definition: stm32f4xx_spi.c:1227
SPI_TransmitCRC
void SPI_TransmitCRC(SPI_TypeDef *SPIx)
Transmit the SPIx CRC value.
Definition: stm32f4xx_spi.c:929
SPI_I2S_SendData
void SPI_I2S_SendData(SPI_TypeDef *SPIx, uint16_t Data)
Transmits a Data through the SPIx/I2Sx peripheral.
Definition: stm32f4xx_spi.c:817
SPI_BiDirectionalLineConfig
void SPI_BiDirectionalLineConfig(SPI_TypeDef *SPIx, uint16_t SPI_Direction)
Selects the data transfer direction in bidirectional mode for the specified SPI.
Definition: stm32f4xx_spi.c:609
SPI_TypeDef
Serial Peripheral Interface.
Definition: stm32f4xx.h:1580
SPI_I2S_ReceiveData
uint16_t SPI_I2S_ReceiveData(SPI_TypeDef *SPIx)
Returns the most recent received data by the SPIx/I2Sx peripheral.
Definition: stm32f4xx_spi.c:801
I2S_Cmd
void I2S_Cmd(SPI_TypeDef *SPIx, FunctionalState NewState)
Enables or disables the specified SPI peripheral (in I2S mode).
Definition: stm32f4xx_spi.c:562
SPI_CalculateCRC
void SPI_CalculateCRC(SPI_TypeDef *SPIx, FunctionalState NewState)
Enables or disables the CRC value calculation of the transferred bytes.
Definition: stm32f4xx_spi.c:907
SPI_Cmd
void SPI_Cmd(SPI_TypeDef *SPIx, FunctionalState NewState)
Enables or disables the specified SPI peripheral.
Definition: stm32f4xx_spi.c:537
ITStatus
enum FlagStatus ITStatus
SPI_I2S_DeInit
void SPI_I2S_DeInit(SPI_TypeDef *SPIx)
De-initialize the SPIx peripheral registers to their default reset values.
Definition: stm32f4xx_spi.c:224
SPI_DataSizeConfig
void SPI_DataSizeConfig(SPI_TypeDef *SPIx, uint16_t SPI_DataSize)
Configures the data size for the selected SPI.
Definition: stm32f4xx_spi.c:589
SPI_SSOutputCmd
void SPI_SSOutputCmd(SPI_TypeDef *SPIx, FunctionalState NewState)
Enables or disables the SS output for the selected SPI.
Definition: stm32f4xx_spi.c:659
SPI_InitTypeDef
SPI Init structure definition.
Definition: stm32f4xx_spi.h:54
SPI_I2S_GetFlagStatus
FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef *SPIx, uint16_t SPI_I2S_FLAG)
Checks whether the specified SPIx/I2Sx flag is set or not.
Definition: stm32f4xx_spi.c:1161
I2S_Init
void I2S_Init(SPI_TypeDef *SPIx, I2S_InitTypeDef *I2S_InitStruct)
Initializes the SPIx peripheral according to the specified parameters in the I2S_InitStruct.
Definition: stm32f4xx_spi.c:348
I2S_InitTypeDef
I2S Init structure definition.
Definition: stm32f4xx_spi.h:91
SPI_I2S_DMACmd
void SPI_I2S_DMACmd(SPI_TypeDef *SPIx, uint16_t SPI_I2S_DMAReq, FunctionalState NewState)
Enables or disables the SPIx/I2Sx DMA interface.
Definition: stm32f4xx_spi.c:1009
SPI_GetCRCPolynomial
uint16_t SPI_GetCRCPolynomial(SPI_TypeDef *SPIx)
Returns the CRC Polynomial register value for the specified SPI.
Definition: stm32f4xx_spi.c:972
stm32f10x.h
CMSIS Cortex-M3 Device Peripheral Access Layer Header File. This file contains all the peripheral reg...
SPI_I2S_ClearITPendingBit
void SPI_I2S_ClearITPendingBit(SPI_TypeDef *SPIx, uint8_t SPI_I2S_IT)
Clears the SPIx CRC Error (CRCERR) interrupt pending bit.
Definition: stm32f4xx_spi.c:1282
I2S_StructInit
void I2S_StructInit(I2S_InitTypeDef *I2S_InitStruct)
Fills each I2S_InitStruct member with its default value.
Definition: stm32f4xx_spi.c:508
SPI_I2S_ITConfig
void SPI_I2S_ITConfig(SPI_TypeDef *SPIx, uint8_t SPI_I2S_IT, FunctionalState NewState)
Enables or disables the specified SPI/I2S interrupts.
Definition: stm32f4xx_spi.c:1117

rosflight_firmware
Author(s): Daniel Koch , James Jackson
autogenerated on Thu Apr 15 2021 05:07:48