rfbuffer.h
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00001 /*
00002  * RF Buffer handling functions
00003  *
00004  * Copyright (c) 2009 Nick Kossifidis <mickflemm@gmail.com>
00005  *
00006  * Permission to use, copy, modify, and distribute this software for any
00007  * purpose with or without fee is hereby granted, provided that the above
00008  * copyright notice and this permission notice appear in all copies.
00009  *
00010  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
00011  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
00012  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
00013  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
00014  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
00015  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
00016  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
00017  *
00018  */
00019 
00020 
00021 /*
00022  * There are some special registers on the RF chip
00023  * that control various operation settings related mostly to
00024  * the analog parts (channel, gain adjustment etc).
00025  *
00026  * We don't write on those registers directly but
00027  * we send a data packet on the chip, using a special register,
00028  * that holds all the settings we need. After we 've sent the
00029  * data packet, we write on another special register to notify hw
00030  * to apply the settings. This is done so that control registers
00031  * can be dynamicaly programmed during operation and the settings
00032  * are applied faster on the hw.
00033  *
00034  * We call each data packet an "RF Bank" and all the data we write
00035  * (all RF Banks) "RF Buffer". This file holds initial RF Buffer
00036  * data for the different RF chips, and various info to match RF
00037  * Buffer offsets with specific RF registers so that we can access
00038  * them. We tweak these settings on rfregs_init function.
00039  *
00040  * Also check out reg.h and U.S. Patent 6677779 B1 (about buffer
00041  * registers and control registers):
00042  *
00043  * http://www.google.com/patents?id=qNURAAAAEBAJ
00044  */
00045 
00046 
00047 /*
00048  * Struct to hold default mode specific RF
00049  * register values (RF Banks)
00050  */
00051 struct ath5k_ini_rfbuffer {
00052         u8      rfb_bank;               /* RF Bank number */
00053         u16     rfb_ctrl_register;      /* RF Buffer control register */
00054         u32     rfb_mode_data[5];       /* RF Buffer data for each mode */
00055 };
00056 
00057 /*
00058  * Struct to hold RF Buffer field
00059  * infos used to access certain RF
00060  * analog registers
00061  */
00062 struct ath5k_rfb_field {
00063         u8      len;    /* Field length */
00064         u16     pos;    /* Offset on the raw packet */
00065         u8      col;    /* Column -used for shifting */
00066 };
00067 
00068 /*
00069  * RF analog register definition
00070  */
00071 struct ath5k_rf_reg {
00072         u8                      bank;   /* RF Buffer Bank number */
00073         u8                      index;  /* Register's index on rf_regs_idx */
00074         struct ath5k_rfb_field  field;  /* RF Buffer field for this register */
00075 };
00076 
00077 /* Map RF registers to indexes
00078  * We do this to handle common bits and make our
00079  * life easier by using an index for each register
00080  * instead of a full rfb_field */
00081 enum ath5k_rf_regs_idx {
00082         /* BANK 6 */
00083         AR5K_RF_OB_2GHZ = 0,
00084         AR5K_RF_OB_5GHZ,
00085         AR5K_RF_DB_2GHZ,
00086         AR5K_RF_DB_5GHZ,
00087         AR5K_RF_FIXED_BIAS_A,
00088         AR5K_RF_FIXED_BIAS_B,
00089         AR5K_RF_PWD_XPD,
00090         AR5K_RF_XPD_SEL,
00091         AR5K_RF_XPD_GAIN,
00092         AR5K_RF_PD_GAIN_LO,
00093         AR5K_RF_PD_GAIN_HI,
00094         AR5K_RF_HIGH_VC_CP,
00095         AR5K_RF_MID_VC_CP,
00096         AR5K_RF_LOW_VC_CP,
00097         AR5K_RF_PUSH_UP,
00098         AR5K_RF_PAD2GND,
00099         AR5K_RF_XB2_LVL,
00100         AR5K_RF_XB5_LVL,
00101         AR5K_RF_PWD_ICLOBUF_2G,
00102         AR5K_RF_PWD_84,
00103         AR5K_RF_PWD_90,
00104         AR5K_RF_PWD_130,
00105         AR5K_RF_PWD_131,
00106         AR5K_RF_PWD_132,
00107         AR5K_RF_PWD_136,
00108         AR5K_RF_PWD_137,
00109         AR5K_RF_PWD_138,
00110         AR5K_RF_PWD_166,
00111         AR5K_RF_PWD_167,
00112         AR5K_RF_DERBY_CHAN_SEL_MODE,
00113         /* BANK 7 */
00114         AR5K_RF_GAIN_I,
00115         AR5K_RF_PLO_SEL,
00116         AR5K_RF_RFGAIN_SEL,
00117         AR5K_RF_RFGAIN_STEP,
00118         AR5K_RF_WAIT_S,
00119         AR5K_RF_WAIT_I,
00120         AR5K_RF_MAX_TIME,
00121         AR5K_RF_MIXVGA_OVR,
00122         AR5K_RF_MIXGAIN_OVR,
00123         AR5K_RF_MIXGAIN_STEP,
00124         AR5K_RF_PD_DELAY_A,
00125         AR5K_RF_PD_DELAY_B,
00126         AR5K_RF_PD_DELAY_XR,
00127         AR5K_RF_PD_PERIOD_A,
00128         AR5K_RF_PD_PERIOD_B,
00129         AR5K_RF_PD_PERIOD_XR,
00130 };
00131 
00132 
00133 /*******************\
00134 * RF5111 (Sombrero) *
00135 \*******************/
00136 
00137 /* BANK 6                               len  pos col */
00138 #define AR5K_RF5111_OB_2GHZ             { 3, 119, 0 }
00139 #define AR5K_RF5111_DB_2GHZ             { 3, 122, 0 }
00140 
00141 #define AR5K_RF5111_OB_5GHZ             { 3, 104, 0 }
00142 #define AR5K_RF5111_DB_5GHZ             { 3, 107, 0 }
00143 
00144 #define AR5K_RF5111_PWD_XPD             { 1, 95,  0 }
00145 #define AR5K_RF5111_XPD_GAIN            { 4, 96,  0 }
00146 
00147 /* Access to PWD registers */
00148 #define AR5K_RF5111_PWD(_n)             { 1, (135 - _n), 3 }
00149 
00150 /* BANK 7                               len  pos col */
00151 #define AR5K_RF5111_GAIN_I              { 6, 29,  0 }
00152 #define AR5K_RF5111_PLO_SEL             { 1, 4,   0 }
00153 #define AR5K_RF5111_RFGAIN_SEL          { 1, 36,  0 }
00154 #define AR5K_RF5111_RFGAIN_STEP         { 6, 37,  0 }
00155 /* Only on AR5212 BaseBand and up */
00156 #define AR5K_RF5111_WAIT_S              { 5, 19,  0 }
00157 #define AR5K_RF5111_WAIT_I              { 5, 24,  0 }
00158 #define AR5K_RF5111_MAX_TIME            { 2, 49,  0 }
00159 
00160 static const struct ath5k_rf_reg rf_regs_5111[] = {
00161         {6, AR5K_RF_OB_2GHZ,            AR5K_RF5111_OB_2GHZ},
00162         {6, AR5K_RF_DB_2GHZ,            AR5K_RF5111_DB_2GHZ},
00163         {6, AR5K_RF_OB_5GHZ,            AR5K_RF5111_OB_5GHZ},
00164         {6, AR5K_RF_DB_5GHZ,            AR5K_RF5111_DB_5GHZ},
00165         {6, AR5K_RF_PWD_XPD,            AR5K_RF5111_PWD_XPD},
00166         {6, AR5K_RF_XPD_GAIN,           AR5K_RF5111_XPD_GAIN},
00167         {6, AR5K_RF_PWD_84,             AR5K_RF5111_PWD(84)},
00168         {6, AR5K_RF_PWD_90,             AR5K_RF5111_PWD(90)},
00169         {7, AR5K_RF_GAIN_I,             AR5K_RF5111_GAIN_I},
00170         {7, AR5K_RF_PLO_SEL,            AR5K_RF5111_PLO_SEL},
00171         {7, AR5K_RF_RFGAIN_SEL,         AR5K_RF5111_RFGAIN_SEL},
00172         {7, AR5K_RF_RFGAIN_STEP,        AR5K_RF5111_RFGAIN_STEP},
00173         {7, AR5K_RF_WAIT_S,             AR5K_RF5111_WAIT_S},
00174         {7, AR5K_RF_WAIT_I,             AR5K_RF5111_WAIT_I},
00175         {7, AR5K_RF_MAX_TIME,           AR5K_RF5111_MAX_TIME}
00176 };
00177 
00178 /* Default mode specific settings */
00179 static const struct ath5k_ini_rfbuffer rfb_5111[] = {
00180         { 0, 0x989c,
00181         /*     mode a/XR  mode aTurbo    mode b     mode g    mode gTurbo */
00182             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00183         { 0, 0x989c,
00184             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00185         { 0, 0x989c,
00186             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00187         { 0, 0x989c,
00188             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00189         { 0, 0x989c,
00190             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00191         { 0, 0x989c,
00192             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00193         { 0, 0x989c,
00194             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00195         { 0, 0x989c,
00196             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00197         { 0, 0x989c,
00198             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00199         { 0, 0x989c,
00200             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00201         { 0, 0x989c,
00202             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00203         { 0, 0x989c,
00204             { 0x00380000, 0x00380000, 0x00380000, 0x00380000, 0x00380000 } },
00205         { 0, 0x989c,
00206             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00207         { 0, 0x989c,
00208             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00209         { 0, 0x989c,
00210             { 0x00000000, 0x00000000, 0x000000c0, 0x00000080, 0x00000080 } },
00211         { 0, 0x989c,
00212             { 0x000400f9, 0x000400f9, 0x000400ff, 0x000400fd, 0x000400fd } },
00213         { 0, 0x98d4,
00214             { 0x00000000, 0x00000000, 0x00000004, 0x00000004, 0x00000004 } },
00215         { 1, 0x98d4,
00216             { 0x00000020, 0x00000020, 0x00000020, 0x00000020, 0x00000020 } },
00217         { 2, 0x98d4,
00218             { 0x00000010, 0x00000014, 0x00000010, 0x00000010, 0x00000014 } },
00219         { 3, 0x98d8,
00220             { 0x00601068, 0x00601068, 0x00601068, 0x00601068, 0x00601068 } },
00221         { 6, 0x989c,
00222             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00223         { 6, 0x989c,
00224             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00225         { 6, 0x989c,
00226             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00227         { 6, 0x989c,
00228             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00229         { 6, 0x989c,
00230             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00231         { 6, 0x989c,
00232             { 0x10000000, 0x10000000, 0x10000000, 0x10000000, 0x10000000 } },
00233         { 6, 0x989c,
00234             { 0x04000000, 0x04000000, 0x04000000, 0x04000000, 0x04000000 } },
00235         { 6, 0x989c,
00236             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00237         { 6, 0x989c,
00238             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00239         { 6, 0x989c,
00240             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00241         { 6, 0x989c,
00242             { 0x00000000, 0x00000000, 0x0a000000, 0x00000000, 0x00000000 } },
00243         { 6, 0x989c,
00244             { 0x003800c0, 0x00380080, 0x023800c0, 0x003800c0, 0x003800c0 } },
00245         { 6, 0x989c,
00246             { 0x00020006, 0x00020006, 0x00000006, 0x00020006, 0x00020006 } },
00247         { 6, 0x989c,
00248             { 0x00000089, 0x00000089, 0x00000089, 0x00000089, 0x00000089 } },
00249         { 6, 0x989c,
00250             { 0x000000a0, 0x000000a0, 0x000000a0, 0x000000a0, 0x000000a0 } },
00251         { 6, 0x989c,
00252             { 0x00040007, 0x00040007, 0x00040007, 0x00040007, 0x00040007 } },
00253         { 6, 0x98d4,
00254             { 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a } },
00255         { 7, 0x989c,
00256             { 0x00000040, 0x00000048, 0x00000040, 0x00000040, 0x00000040 } },
00257         { 7, 0x989c,
00258             { 0x00000010, 0x00000010, 0x00000010, 0x00000010, 0x00000010 } },
00259         { 7, 0x989c,
00260             { 0x00000008, 0x00000008, 0x00000008, 0x00000008, 0x00000008 } },
00261         { 7, 0x989c,
00262             { 0x0000004f, 0x0000004f, 0x0000004f, 0x0000004f, 0x0000004f } },
00263         { 7, 0x989c,
00264             { 0x000000f1, 0x000000f1, 0x00000061, 0x000000f1, 0x000000f1 } },
00265         { 7, 0x989c,
00266             { 0x0000904f, 0x0000904f, 0x0000904c, 0x0000904f, 0x0000904f } },
00267         { 7, 0x989c,
00268             { 0x0000125a, 0x0000125a, 0x0000129a, 0x0000125a, 0x0000125a } },
00269         { 7, 0x98cc,
00270             { 0x0000000e, 0x0000000e, 0x0000000f, 0x0000000e, 0x0000000e } },
00271 };
00272 
00273 
00274 
00275 /***********************\
00276 * RF5112/RF2112 (Derby) *
00277 \***********************/
00278 
00279 /* BANK 7 (Common)                      len  pos col */
00280 #define AR5K_RF5112X_GAIN_I             { 6, 14,  0 }
00281 #define AR5K_RF5112X_MIXVGA_OVR         { 1, 36,  0 }
00282 #define AR5K_RF5112X_MIXGAIN_OVR        { 2, 37,  0 }
00283 #define AR5K_RF5112X_MIXGAIN_STEP       { 4, 32,  0 }
00284 #define AR5K_RF5112X_PD_DELAY_A         { 4, 58,  0 }
00285 #define AR5K_RF5112X_PD_DELAY_B         { 4, 62,  0 }
00286 #define AR5K_RF5112X_PD_DELAY_XR        { 4, 66,  0 }
00287 #define AR5K_RF5112X_PD_PERIOD_A        { 4, 70,  0 }
00288 #define AR5K_RF5112X_PD_PERIOD_B        { 4, 74,  0 }
00289 #define AR5K_RF5112X_PD_PERIOD_XR       { 4, 78,  0 }
00290 
00291 /* RFX112 (Derby 1) */
00292 
00293 /* BANK 6                               len  pos col */
00294 #define AR5K_RF5112_OB_2GHZ             { 3, 269, 0 }
00295 #define AR5K_RF5112_DB_2GHZ             { 3, 272, 0 }
00296 
00297 #define AR5K_RF5112_OB_5GHZ             { 3, 261, 0 }
00298 #define AR5K_RF5112_DB_5GHZ             { 3, 264, 0 }
00299 
00300 #define AR5K_RF5112_FIXED_BIAS_A        { 1, 260, 0 }
00301 #define AR5K_RF5112_FIXED_BIAS_B        { 1, 259, 0 }
00302 
00303 #define AR5K_RF5112_XPD_SEL             { 1, 284, 0 }
00304 #define AR5K_RF5112_XPD_GAIN            { 2, 252, 0 }
00305 
00306 /* Access to PWD registers */
00307 #define AR5K_RF5112_PWD(_n)             { 1, (302 - _n), 3 }
00308 
00309 static const struct ath5k_rf_reg rf_regs_5112[] = {
00310         {6, AR5K_RF_OB_2GHZ,            AR5K_RF5112_OB_2GHZ},
00311         {6, AR5K_RF_DB_2GHZ,            AR5K_RF5112_DB_2GHZ},
00312         {6, AR5K_RF_OB_5GHZ,            AR5K_RF5112_OB_5GHZ},
00313         {6, AR5K_RF_DB_5GHZ,            AR5K_RF5112_DB_5GHZ},
00314         {6, AR5K_RF_FIXED_BIAS_A,       AR5K_RF5112_FIXED_BIAS_A},
00315         {6, AR5K_RF_FIXED_BIAS_B,       AR5K_RF5112_FIXED_BIAS_B},
00316         {6, AR5K_RF_XPD_SEL,            AR5K_RF5112_XPD_SEL},
00317         {6, AR5K_RF_XPD_GAIN,           AR5K_RF5112_XPD_GAIN},
00318         {6, AR5K_RF_PWD_130,            AR5K_RF5112_PWD(130)},
00319         {6, AR5K_RF_PWD_131,            AR5K_RF5112_PWD(131)},
00320         {6, AR5K_RF_PWD_132,            AR5K_RF5112_PWD(132)},
00321         {6, AR5K_RF_PWD_136,            AR5K_RF5112_PWD(136)},
00322         {6, AR5K_RF_PWD_137,            AR5K_RF5112_PWD(137)},
00323         {6, AR5K_RF_PWD_138,            AR5K_RF5112_PWD(138)},
00324         {7, AR5K_RF_GAIN_I,             AR5K_RF5112X_GAIN_I},
00325         {7, AR5K_RF_MIXVGA_OVR,         AR5K_RF5112X_MIXVGA_OVR},
00326         {7, AR5K_RF_MIXGAIN_OVR,        AR5K_RF5112X_MIXGAIN_OVR},
00327         {7, AR5K_RF_MIXGAIN_STEP,       AR5K_RF5112X_MIXGAIN_STEP},
00328         {7, AR5K_RF_PD_DELAY_A,         AR5K_RF5112X_PD_DELAY_A},
00329         {7, AR5K_RF_PD_DELAY_B,         AR5K_RF5112X_PD_DELAY_B},
00330         {7, AR5K_RF_PD_DELAY_XR,        AR5K_RF5112X_PD_DELAY_XR},
00331         {7, AR5K_RF_PD_PERIOD_A,        AR5K_RF5112X_PD_PERIOD_A},
00332         {7, AR5K_RF_PD_PERIOD_B,        AR5K_RF5112X_PD_PERIOD_B},
00333         {7, AR5K_RF_PD_PERIOD_XR,       AR5K_RF5112X_PD_PERIOD_XR},
00334 };
00335 
00336 /* Default mode specific settings */
00337 static const struct ath5k_ini_rfbuffer rfb_5112[] = {
00338         { 1, 0x98d4,
00339         /*     mode a/XR  mode aTurbo    mode b     mode g    mode gTurbo */
00340             { 0x00000020, 0x00000020, 0x00000020, 0x00000020, 0x00000020 } },
00341         { 2, 0x98d0,
00342             { 0x03060408, 0x03070408, 0x03060408, 0x03060408, 0x03070408 } },
00343         { 3, 0x98dc,
00344             { 0x00a0c0c0, 0x00a0c0c0, 0x00e0c0c0, 0x00e0c0c0, 0x00e0c0c0 } },
00345         { 6, 0x989c,
00346             { 0x00a00000, 0x00a00000, 0x00a00000, 0x00a00000, 0x00a00000 } },
00347         { 6, 0x989c,
00348             { 0x000a0000, 0x000a0000, 0x000a0000, 0x000a0000, 0x000a0000 } },
00349         { 6, 0x989c,
00350             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00351         { 6, 0x989c,
00352             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00353         { 6, 0x989c,
00354             { 0x00660000, 0x00660000, 0x00660000, 0x00660000, 0x00660000 } },
00355         { 6, 0x989c,
00356             { 0x00db0000, 0x00db0000, 0x00db0000, 0x00db0000, 0x00db0000 } },
00357         { 6, 0x989c,
00358             { 0x00f10000, 0x00f10000, 0x00f10000, 0x00f10000, 0x00f10000 } },
00359         { 6, 0x989c,
00360             { 0x00120000, 0x00120000, 0x00120000, 0x00120000, 0x00120000 } },
00361         { 6, 0x989c,
00362             { 0x00120000, 0x00120000, 0x00120000, 0x00120000, 0x00120000 } },
00363         { 6, 0x989c,
00364             { 0x00730000, 0x00730000, 0x00730000, 0x00730000, 0x00730000 } },
00365         { 6, 0x989c,
00366             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00367         { 6, 0x989c,
00368             { 0x000c0000, 0x000c0000, 0x000c0000, 0x000c0000, 0x000c0000 } },
00369         { 6, 0x989c,
00370             { 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000 } },
00371         { 6, 0x989c,
00372             { 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000 } },
00373         { 6, 0x989c,
00374             { 0x008b0000, 0x008b0000, 0x008b0000, 0x008b0000, 0x008b0000 } },
00375         { 6, 0x989c,
00376             { 0x00600000, 0x00600000, 0x00600000, 0x00600000, 0x00600000 } },
00377         { 6, 0x989c,
00378             { 0x000c0000, 0x000c0000, 0x000c0000, 0x000c0000, 0x000c0000 } },
00379         { 6, 0x989c,
00380             { 0x00840000, 0x00840000, 0x00840000, 0x00840000, 0x00840000 } },
00381         { 6, 0x989c,
00382             { 0x00640000, 0x00640000, 0x00640000, 0x00640000, 0x00640000 } },
00383         { 6, 0x989c,
00384             { 0x00200000, 0x00200000, 0x00200000, 0x00200000, 0x00200000 } },
00385         { 6, 0x989c,
00386             { 0x00240000, 0x00240000, 0x00240000, 0x00240000, 0x00240000 } },
00387         { 6, 0x989c,
00388             { 0x00250000, 0x00250000, 0x00250000, 0x00250000, 0x00250000 } },
00389         { 6, 0x989c,
00390             { 0x00110000, 0x00110000, 0x00110000, 0x00110000, 0x00110000 } },
00391         { 6, 0x989c,
00392             { 0x00110000, 0x00110000, 0x00110000, 0x00110000, 0x00110000 } },
00393         { 6, 0x989c,
00394             { 0x00510000, 0x00510000, 0x00510000, 0x00510000, 0x00510000 } },
00395         { 6, 0x989c,
00396             { 0x1c040000, 0x1c040000, 0x1c040000, 0x1c040000, 0x1c040000 } },
00397         { 6, 0x989c,
00398             { 0x000a0000, 0x000a0000, 0x000a0000, 0x000a0000, 0x000a0000 } },
00399         { 6, 0x989c,
00400             { 0x00a10000, 0x00a10000, 0x00a10000, 0x00a10000, 0x00a10000 } },
00401         { 6, 0x989c,
00402             { 0x00400000, 0x00400000, 0x00400000, 0x00400000, 0x00400000 } },
00403         { 6, 0x989c,
00404             { 0x03090000, 0x03090000, 0x03090000, 0x03090000, 0x03090000 } },
00405         { 6, 0x989c,
00406             { 0x06000000, 0x06000000, 0x06000000, 0x06000000, 0x06000000 } },
00407         { 6, 0x989c,
00408             { 0x000000b0, 0x000000b0, 0x000000a8, 0x000000a8, 0x000000a8 } },
00409         { 6, 0x989c,
00410             { 0x0000002e, 0x0000002e, 0x0000002e, 0x0000002e, 0x0000002e } },
00411         { 6, 0x989c,
00412             { 0x006c4a41, 0x006c4a41, 0x006c4af1, 0x006c4a61, 0x006c4a61 } },
00413         { 6, 0x989c,
00414             { 0x0050892a, 0x0050892a, 0x0050892b, 0x0050892b, 0x0050892b } },
00415         { 6, 0x989c,
00416             { 0x00842400, 0x00842400, 0x00842400, 0x00842400, 0x00842400 } },
00417         { 6, 0x989c,
00418             { 0x00c69200, 0x00c69200, 0x00c69200, 0x00c69200, 0x00c69200 } },
00419         { 6, 0x98d0,
00420             { 0x0002000c, 0x0002000c, 0x0002000c, 0x0002000c, 0x0002000c } },
00421         { 7, 0x989c,
00422             { 0x00000094, 0x00000094, 0x00000094, 0x00000094, 0x00000094 } },
00423         { 7, 0x989c,
00424             { 0x00000091, 0x00000091, 0x00000091, 0x00000091, 0x00000091 } },
00425         { 7, 0x989c,
00426             { 0x0000000a, 0x0000000a, 0x00000012, 0x00000012, 0x00000012 } },
00427         { 7, 0x989c,
00428             { 0x00000080, 0x00000080, 0x00000080, 0x00000080, 0x00000080 } },
00429         { 7, 0x989c,
00430             { 0x000000c1, 0x000000c1, 0x000000c1, 0x000000c1, 0x000000c1 } },
00431         { 7, 0x989c,
00432             { 0x00000060, 0x00000060, 0x00000060, 0x00000060, 0x00000060 } },
00433         { 7, 0x989c,
00434             { 0x000000f0, 0x000000f0, 0x000000f0, 0x000000f0, 0x000000f0 } },
00435         { 7, 0x989c,
00436             { 0x00000022, 0x00000022, 0x00000022, 0x00000022, 0x00000022 } },
00437         { 7, 0x989c,
00438             { 0x00000092, 0x00000092, 0x00000092, 0x00000092, 0x00000092 } },
00439         { 7, 0x989c,
00440             { 0x000000d4, 0x000000d4, 0x000000d4, 0x000000d4, 0x000000d4 } },
00441         { 7, 0x989c,
00442             { 0x000014cc, 0x000014cc, 0x000014cc, 0x000014cc, 0x000014cc } },
00443         { 7, 0x989c,
00444             { 0x0000048c, 0x0000048c, 0x0000048c, 0x0000048c, 0x0000048c } },
00445         { 7, 0x98c4,
00446             { 0x00000003, 0x00000003, 0x00000003, 0x00000003, 0x00000003 } },
00447 };
00448 
00449 /* RFX112A (Derby 2) */
00450 
00451 /* BANK 6                               len  pos col */
00452 #define AR5K_RF5112A_OB_2GHZ            { 3, 287, 0 }
00453 #define AR5K_RF5112A_DB_2GHZ            { 3, 290, 0 }
00454 
00455 #define AR5K_RF5112A_OB_5GHZ            { 3, 279, 0 }
00456 #define AR5K_RF5112A_DB_5GHZ            { 3, 282, 0 }
00457 
00458 #define AR5K_RF5112A_FIXED_BIAS_A       { 1, 278, 0 }
00459 #define AR5K_RF5112A_FIXED_BIAS_B       { 1, 277, 0 }
00460 
00461 #define AR5K_RF5112A_XPD_SEL            { 1, 302, 0 }
00462 #define AR5K_RF5112A_PDGAINLO           { 2, 270, 0 }
00463 #define AR5K_RF5112A_PDGAINHI           { 2, 257, 0 }
00464 
00465 /* Access to PWD registers */
00466 #define AR5K_RF5112A_PWD(_n)            { 1, (306 - _n), 3 }
00467 
00468 /* Voltage regulators */
00469 #define AR5K_RF5112A_HIGH_VC_CP         { 2, 90,  2 }
00470 #define AR5K_RF5112A_MID_VC_CP          { 2, 92,  2 }
00471 #define AR5K_RF5112A_LOW_VC_CP          { 2, 94,  2 }
00472 #define AR5K_RF5112A_PUSH_UP            { 1, 254,  2 }
00473 
00474 /* Power consumption */
00475 #define AR5K_RF5112A_PAD2GND            { 1, 281, 1 }
00476 #define AR5K_RF5112A_XB2_LVL            { 2, 1,   3 }
00477 #define AR5K_RF5112A_XB5_LVL            { 2, 3,   3 }
00478 
00479 static const struct ath5k_rf_reg rf_regs_5112a[] = {
00480         {6, AR5K_RF_OB_2GHZ,            AR5K_RF5112A_OB_2GHZ},
00481         {6, AR5K_RF_DB_2GHZ,            AR5K_RF5112A_DB_2GHZ},
00482         {6, AR5K_RF_OB_5GHZ,            AR5K_RF5112A_OB_5GHZ},
00483         {6, AR5K_RF_DB_5GHZ,            AR5K_RF5112A_DB_5GHZ},
00484         {6, AR5K_RF_FIXED_BIAS_A,       AR5K_RF5112A_FIXED_BIAS_A},
00485         {6, AR5K_RF_FIXED_BIAS_B,       AR5K_RF5112A_FIXED_BIAS_B},
00486         {6, AR5K_RF_XPD_SEL,            AR5K_RF5112A_XPD_SEL},
00487         {6, AR5K_RF_PD_GAIN_LO,         AR5K_RF5112A_PDGAINLO},
00488         {6, AR5K_RF_PD_GAIN_HI,         AR5K_RF5112A_PDGAINHI},
00489         {6, AR5K_RF_PWD_130,            AR5K_RF5112A_PWD(130)},
00490         {6, AR5K_RF_PWD_131,            AR5K_RF5112A_PWD(131)},
00491         {6, AR5K_RF_PWD_132,            AR5K_RF5112A_PWD(132)},
00492         {6, AR5K_RF_PWD_136,            AR5K_RF5112A_PWD(136)},
00493         {6, AR5K_RF_PWD_137,            AR5K_RF5112A_PWD(137)},
00494         {6, AR5K_RF_PWD_138,            AR5K_RF5112A_PWD(138)},
00495         {6, AR5K_RF_PWD_166,            AR5K_RF5112A_PWD(166)},
00496         {6, AR5K_RF_PWD_167,            AR5K_RF5112A_PWD(167)},
00497         {6, AR5K_RF_HIGH_VC_CP,         AR5K_RF5112A_HIGH_VC_CP},
00498         {6, AR5K_RF_MID_VC_CP,          AR5K_RF5112A_MID_VC_CP},
00499         {6, AR5K_RF_LOW_VC_CP,          AR5K_RF5112A_LOW_VC_CP},
00500         {6, AR5K_RF_PUSH_UP,            AR5K_RF5112A_PUSH_UP},
00501         {6, AR5K_RF_PAD2GND,            AR5K_RF5112A_PAD2GND},
00502         {6, AR5K_RF_XB2_LVL,            AR5K_RF5112A_XB2_LVL},
00503         {6, AR5K_RF_XB5_LVL,            AR5K_RF5112A_XB5_LVL},
00504         {7, AR5K_RF_GAIN_I,             AR5K_RF5112X_GAIN_I},
00505         {7, AR5K_RF_MIXVGA_OVR,         AR5K_RF5112X_MIXVGA_OVR},
00506         {7, AR5K_RF_MIXGAIN_OVR,        AR5K_RF5112X_MIXGAIN_OVR},
00507         {7, AR5K_RF_MIXGAIN_STEP,       AR5K_RF5112X_MIXGAIN_STEP},
00508         {7, AR5K_RF_PD_DELAY_A,         AR5K_RF5112X_PD_DELAY_A},
00509         {7, AR5K_RF_PD_DELAY_B,         AR5K_RF5112X_PD_DELAY_B},
00510         {7, AR5K_RF_PD_DELAY_XR,        AR5K_RF5112X_PD_DELAY_XR},
00511         {7, AR5K_RF_PD_PERIOD_A,        AR5K_RF5112X_PD_PERIOD_A},
00512         {7, AR5K_RF_PD_PERIOD_B,        AR5K_RF5112X_PD_PERIOD_B},
00513         {7, AR5K_RF_PD_PERIOD_XR,       AR5K_RF5112X_PD_PERIOD_XR},
00514 };
00515 
00516 /* Default mode specific settings */
00517 static const struct ath5k_ini_rfbuffer rfb_5112a[] = {
00518         { 1, 0x98d4,
00519         /*     mode a/XR  mode aTurbo    mode b     mode g    mode gTurbo */
00520             { 0x00000020, 0x00000020, 0x00000020, 0x00000020, 0x00000020 } },
00521         { 2, 0x98d0,
00522             { 0x03060408, 0x03070408, 0x03060408, 0x03060408, 0x03070408 } },
00523         { 3, 0x98dc,
00524             { 0x00a020c0, 0x00a020c0, 0x00e020c0, 0x00e020c0, 0x00e020c0 } },
00525         { 6, 0x989c,
00526             { 0x0f000000, 0x0f000000, 0x0f000000, 0x0f000000, 0x0f000000 } },
00527         { 6, 0x989c,
00528             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00529         { 6, 0x989c,
00530             { 0x00800000, 0x00800000, 0x00800000, 0x00800000, 0x00800000 } },
00531         { 6, 0x989c,
00532             { 0x002a0000, 0x002a0000, 0x002a0000, 0x002a0000, 0x002a0000 } },
00533         { 6, 0x989c,
00534             { 0x00010000, 0x00010000, 0x00010000, 0x00010000, 0x00010000 } },
00535         { 6, 0x989c,
00536             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00537         { 6, 0x989c,
00538             { 0x00180000, 0x00180000, 0x00180000, 0x00180000, 0x00180000 } },
00539         { 6, 0x989c,
00540             { 0x00600000, 0x00600000, 0x006e0000, 0x006e0000, 0x006e0000 } },
00541         { 6, 0x989c,
00542             { 0x00c70000, 0x00c70000, 0x00c70000, 0x00c70000, 0x00c70000 } },
00543         { 6, 0x989c,
00544             { 0x004b0000, 0x004b0000, 0x004b0000, 0x004b0000, 0x004b0000 } },
00545         { 6, 0x989c,
00546             { 0x04480000, 0x04480000, 0x04480000, 0x04480000, 0x04480000 } },
00547         { 6, 0x989c,
00548             { 0x004c0000, 0x004c0000, 0x004c0000, 0x004c0000, 0x004c0000 } },
00549         { 6, 0x989c,
00550             { 0x00e40000, 0x00e40000, 0x00e40000, 0x00e40000, 0x00e40000 } },
00551         { 6, 0x989c,
00552             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00553         { 6, 0x989c,
00554             { 0x00fc0000, 0x00fc0000, 0x00fc0000, 0x00fc0000, 0x00fc0000 } },
00555         { 6, 0x989c,
00556             { 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000 } },
00557         { 6, 0x989c,
00558             { 0x043f0000, 0x043f0000, 0x043f0000, 0x043f0000, 0x043f0000 } },
00559         { 6, 0x989c,
00560             { 0x000c0000, 0x000c0000, 0x000c0000, 0x000c0000, 0x000c0000 } },
00561         { 6, 0x989c,
00562             { 0x02190000, 0x02190000, 0x02190000, 0x02190000, 0x02190000 } },
00563         { 6, 0x989c,
00564             { 0x00240000, 0x00240000, 0x00240000, 0x00240000, 0x00240000 } },
00565         { 6, 0x989c,
00566             { 0x00b40000, 0x00b40000, 0x00b40000, 0x00b40000, 0x00b40000 } },
00567         { 6, 0x989c,
00568             { 0x00990000, 0x00990000, 0x00990000, 0x00990000, 0x00990000 } },
00569         { 6, 0x989c,
00570             { 0x00500000, 0x00500000, 0x00500000, 0x00500000, 0x00500000 } },
00571         { 6, 0x989c,
00572             { 0x002a0000, 0x002a0000, 0x002a0000, 0x002a0000, 0x002a0000 } },
00573         { 6, 0x989c,
00574             { 0x00120000, 0x00120000, 0x00120000, 0x00120000, 0x00120000 } },
00575         { 6, 0x989c,
00576             { 0xc0320000, 0xc0320000, 0xc0320000, 0xc0320000, 0xc0320000 } },
00577         { 6, 0x989c,
00578             { 0x01740000, 0x01740000, 0x01740000, 0x01740000, 0x01740000 } },
00579         { 6, 0x989c,
00580             { 0x00110000, 0x00110000, 0x00110000, 0x00110000, 0x00110000 } },
00581         { 6, 0x989c,
00582             { 0x86280000, 0x86280000, 0x86280000, 0x86280000, 0x86280000 } },
00583         { 6, 0x989c,
00584             { 0x31840000, 0x31840000, 0x31840000, 0x31840000, 0x31840000 } },
00585         { 6, 0x989c,
00586             { 0x00f20080, 0x00f20080, 0x00f20080, 0x00f20080, 0x00f20080 } },
00587         { 6, 0x989c,
00588             { 0x00270019, 0x00270019, 0x00270019, 0x00270019, 0x00270019 } },
00589         { 6, 0x989c,
00590             { 0x00000003, 0x00000003, 0x00000003, 0x00000003, 0x00000003 } },
00591         { 6, 0x989c,
00592             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00593         { 6, 0x989c,
00594             { 0x000000b2, 0x000000b2, 0x000000b2, 0x000000b2, 0x000000b2 } },
00595         { 6, 0x989c,
00596             { 0x00b02084, 0x00b02084, 0x00b02084, 0x00b02084, 0x00b02084 } },
00597         { 6, 0x989c,
00598             { 0x004125a4, 0x004125a4, 0x004125a4, 0x004125a4, 0x004125a4 } },
00599         { 6, 0x989c,
00600             { 0x00119220, 0x00119220, 0x00119220, 0x00119220, 0x00119220 } },
00601         { 6, 0x989c,
00602             { 0x001a4800, 0x001a4800, 0x001a4800, 0x001a4800, 0x001a4800 } },
00603         { 6, 0x98d8,
00604             { 0x000b0230, 0x000b0230, 0x000b0230, 0x000b0230, 0x000b0230 } },
00605         { 7, 0x989c,
00606             { 0x00000094, 0x00000094, 0x00000094, 0x00000094, 0x00000094 } },
00607         { 7, 0x989c,
00608             { 0x00000091, 0x00000091, 0x00000091, 0x00000091, 0x00000091 } },
00609         { 7, 0x989c,
00610             { 0x00000012, 0x00000012, 0x00000012, 0x00000012, 0x00000012 } },
00611         { 7, 0x989c,
00612             { 0x00000080, 0x00000080, 0x00000080, 0x00000080, 0x00000080 } },
00613         { 7, 0x989c,
00614             { 0x000000d9, 0x000000d9, 0x000000d9, 0x000000d9, 0x000000d9 } },
00615         { 7, 0x989c,
00616             { 0x00000060, 0x00000060, 0x00000060, 0x00000060, 0x00000060 } },
00617         { 7, 0x989c,
00618             { 0x000000f0, 0x000000f0, 0x000000f0, 0x000000f0, 0x000000f0 } },
00619         { 7, 0x989c,
00620             { 0x000000a2, 0x000000a2, 0x000000a2, 0x000000a2, 0x000000a2 } },
00621         { 7, 0x989c,
00622             { 0x00000052, 0x00000052, 0x00000052, 0x00000052, 0x00000052 } },
00623         { 7, 0x989c,
00624             { 0x000000d4, 0x000000d4, 0x000000d4, 0x000000d4, 0x000000d4 } },
00625         { 7, 0x989c,
00626             { 0x000014cc, 0x000014cc, 0x000014cc, 0x000014cc, 0x000014cc } },
00627         { 7, 0x989c,
00628             { 0x0000048c, 0x0000048c, 0x0000048c, 0x0000048c, 0x0000048c } },
00629         { 7, 0x98c4,
00630             { 0x00000003, 0x00000003, 0x00000003, 0x00000003, 0x00000003 } },
00631 };
00632 
00633 
00634 
00635 /******************\
00636 * RF2413 (Griffin) *
00637 \******************/
00638 
00639 /* BANK 6                               len  pos col */
00640 #define AR5K_RF2413_OB_2GHZ             { 3, 168, 0 }
00641 #define AR5K_RF2413_DB_2GHZ             { 3, 165, 0 }
00642 
00643 static const struct ath5k_rf_reg rf_regs_2413[] = {
00644         {6, AR5K_RF_OB_2GHZ,            AR5K_RF2413_OB_2GHZ},
00645         {6, AR5K_RF_DB_2GHZ,            AR5K_RF2413_DB_2GHZ},
00646 };
00647 
00648 /* Default mode specific settings
00649  * XXX: a/aTurbo ???
00650  */
00651 static const struct ath5k_ini_rfbuffer rfb_2413[] = {
00652         { 1, 0x98d4,
00653         /*     mode a/XR  mode aTurbo    mode b     mode g    mode gTurbo */
00654             { 0x00000020, 0x00000020, 0x00000020, 0x00000020, 0x00000020 } },
00655         { 2, 0x98d0,
00656             { 0x02001408, 0x02011408, 0x02001408, 0x02001408, 0x02011408 } },
00657         { 3, 0x98dc,
00658             { 0x00a020c0, 0x00a020c0, 0x00e020c0, 0x00e020c0, 0x00e020c0 } },
00659         { 6, 0x989c,
00660             { 0xf0000000, 0xf0000000, 0xf0000000, 0xf0000000, 0xf0000000 } },
00661         { 6, 0x989c,
00662             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00663         { 6, 0x989c,
00664             { 0x03000000, 0x03000000, 0x03000000, 0x03000000, 0x03000000 } },
00665         { 6, 0x989c,
00666             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00667         { 6, 0x989c,
00668             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00669         { 6, 0x989c,
00670             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00671         { 6, 0x989c,
00672             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00673         { 6, 0x989c,
00674             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00675         { 6, 0x989c,
00676             { 0x40400000, 0x40400000, 0x40400000, 0x40400000, 0x40400000 } },
00677         { 6, 0x989c,
00678             { 0x65050000, 0x65050000, 0x65050000, 0x65050000, 0x65050000 } },
00679         { 6, 0x989c,
00680             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00681         { 6, 0x989c,
00682             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00683         { 6, 0x989c,
00684             { 0x00420000, 0x00420000, 0x00420000, 0x00420000, 0x00420000 } },
00685         { 6, 0x989c,
00686             { 0x00b50000, 0x00b50000, 0x00b50000, 0x00b50000, 0x00b50000 } },
00687         { 6, 0x989c,
00688             { 0x00030000, 0x00030000, 0x00030000, 0x00030000, 0x00030000 } },
00689         { 6, 0x989c,
00690             { 0x00f70000, 0x00f70000, 0x00f70000, 0x00f70000, 0x00f70000 } },
00691         { 6, 0x989c,
00692             { 0x009d0000, 0x009d0000, 0x009d0000, 0x009d0000, 0x009d0000 } },
00693         { 6, 0x989c,
00694             { 0x00220000, 0x00220000, 0x00220000, 0x00220000, 0x00220000 } },
00695         { 6, 0x989c,
00696             { 0x04220000, 0x04220000, 0x04220000, 0x04220000, 0x04220000 } },
00697         { 6, 0x989c,
00698             { 0x00230018, 0x00230018, 0x00230018, 0x00230018, 0x00230018 } },
00699         { 6, 0x989c,
00700             { 0x00280000, 0x00280000, 0x00280060, 0x00280060, 0x00280060 } },
00701         { 6, 0x989c,
00702             { 0x005000c0, 0x005000c0, 0x005000c3, 0x005000c3, 0x005000c3 } },
00703         { 6, 0x989c,
00704             { 0x0004007f, 0x0004007f, 0x0004007f, 0x0004007f, 0x0004007f } },
00705         { 6, 0x989c,
00706             { 0x00000458, 0x00000458, 0x00000458, 0x00000458, 0x00000458 } },
00707         { 6, 0x989c,
00708             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00709         { 6, 0x989c,
00710             { 0x0000c000, 0x0000c000, 0x0000c000, 0x0000c000, 0x0000c000 } },
00711         { 6, 0x98d8,
00712             { 0x00400230, 0x00400230, 0x00400230, 0x00400230, 0x00400230 } },
00713         { 7, 0x989c,
00714             { 0x00006400, 0x00006400, 0x00006400, 0x00006400, 0x00006400 } },
00715         { 7, 0x989c,
00716             { 0x00000800, 0x00000800, 0x00000800, 0x00000800, 0x00000800 } },
00717         { 7, 0x98cc,
00718             { 0x0000000e, 0x0000000e, 0x0000000e, 0x0000000e, 0x0000000e } },
00719 };
00720 
00721 
00722 
00723 /***************************\
00724 * RF2315/RF2316 (Cobra SoC) *
00725 \***************************/
00726 
00727 /* BANK 6                               len  pos col */
00728 #define AR5K_RF2316_OB_2GHZ             { 3, 178, 0 }
00729 #define AR5K_RF2316_DB_2GHZ             { 3, 175, 0 }
00730 
00731 static const struct ath5k_rf_reg rf_regs_2316[] = {
00732         {6, AR5K_RF_OB_2GHZ,            AR5K_RF2316_OB_2GHZ},
00733         {6, AR5K_RF_DB_2GHZ,            AR5K_RF2316_DB_2GHZ},
00734 };
00735 
00736 /* Default mode specific settings */
00737 static const struct ath5k_ini_rfbuffer rfb_2316[] = {
00738         { 1, 0x98d4,
00739         /*     mode a/XR  mode aTurbo    mode b     mode g    mode gTurbo */
00740             { 0x00000020, 0x00000020, 0x00000020, 0x00000020, 0x00000020 } },
00741         { 2, 0x98d0,
00742             { 0x02001408, 0x02011408, 0x02001408, 0x02001408, 0x02011408 } },
00743         { 3, 0x98dc,
00744             { 0x00a020c0, 0x00a020c0, 0x00e020c0, 0x00e020c0, 0x00e020c0 } },
00745         { 6, 0x989c,
00746             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00747         { 6, 0x989c,
00748             { 0xc0000000, 0xc0000000, 0xc0000000, 0xc0000000, 0xc0000000 } },
00749         { 6, 0x989c,
00750             { 0x0f000000, 0x0f000000, 0x0f000000, 0x0f000000, 0x0f000000 } },
00751         { 6, 0x989c,
00752             { 0x02000000, 0x02000000, 0x02000000, 0x02000000, 0x02000000 } },
00753         { 6, 0x989c,
00754             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00755         { 6, 0x989c,
00756             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00757         { 6, 0x989c,
00758             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00759         { 6, 0x989c,
00760             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00761         { 6, 0x989c,
00762             { 0xf8000000, 0xf8000000, 0xf8000000, 0xf8000000, 0xf8000000 } },
00763         { 6, 0x989c,
00764             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00765         { 6, 0x989c,
00766             { 0x95150000, 0x95150000, 0x95150000, 0x95150000, 0x95150000 } },
00767         { 6, 0x989c,
00768             { 0xc1000000, 0xc1000000, 0xc1000000, 0xc1000000, 0xc1000000 } },
00769         { 6, 0x989c,
00770             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00771         { 6, 0x989c,
00772             { 0x00080000, 0x00080000, 0x00080000, 0x00080000, 0x00080000 } },
00773         { 6, 0x989c,
00774             { 0x00d50000, 0x00d50000, 0x00d50000, 0x00d50000, 0x00d50000 } },
00775         { 6, 0x989c,
00776             { 0x000e0000, 0x000e0000, 0x000e0000, 0x000e0000, 0x000e0000 } },
00777         { 6, 0x989c,
00778             { 0x00dc0000, 0x00dc0000, 0x00dc0000, 0x00dc0000, 0x00dc0000 } },
00779         { 6, 0x989c,
00780             { 0x00770000, 0x00770000, 0x00770000, 0x00770000, 0x00770000 } },
00781         { 6, 0x989c,
00782             { 0x008a0000, 0x008a0000, 0x008a0000, 0x008a0000, 0x008a0000 } },
00783         { 6, 0x989c,
00784             { 0x10880000, 0x10880000, 0x10880000, 0x10880000, 0x10880000 } },
00785         { 6, 0x989c,
00786             { 0x008c0060, 0x008c0060, 0x008c0060, 0x008c0060, 0x008c0060 } },
00787         { 6, 0x989c,
00788             { 0x00a00000, 0x00a00000, 0x00a00080, 0x00a00080, 0x00a00080 } },
00789         { 6, 0x989c,
00790             { 0x00400000, 0x00400000, 0x0040000d, 0x0040000d, 0x0040000d } },
00791         { 6, 0x989c,
00792             { 0x00110400, 0x00110400, 0x00110400, 0x00110400, 0x00110400 } },
00793         { 6, 0x989c,
00794             { 0x00000060, 0x00000060, 0x00000060, 0x00000060, 0x00000060 } },
00795         { 6, 0x989c,
00796             { 0x00000001, 0x00000001, 0x00000001, 0x00000001, 0x00000001 } },
00797         { 6, 0x989c,
00798             { 0x00000b00, 0x00000b00, 0x00000b00, 0x00000b00, 0x00000b00 } },
00799         { 6, 0x989c,
00800             { 0x00000be8, 0x00000be8, 0x00000be8, 0x00000be8, 0x00000be8 } },
00801         { 6, 0x98c0,
00802             { 0x00010000, 0x00010000, 0x00010000, 0x00010000, 0x00010000 } },
00803         { 7, 0x989c,
00804             { 0x00006400, 0x00006400, 0x00006400, 0x00006400, 0x00006400 } },
00805         { 7, 0x989c,
00806             { 0x00000800, 0x00000800, 0x00000800, 0x00000800, 0x00000800 } },
00807         { 7, 0x98cc,
00808             { 0x0000000e, 0x0000000e, 0x0000000e, 0x0000000e, 0x0000000e } },
00809 };
00810 
00811 
00812 
00813 /******************************\
00814 * RF5413/RF5424 (Eagle/Condor) *
00815 \******************************/
00816 
00817 /* BANK 6                               len  pos col */
00818 #define AR5K_RF5413_OB_2GHZ             { 3, 241, 0 }
00819 #define AR5K_RF5413_DB_2GHZ             { 3, 238, 0 }
00820 
00821 #define AR5K_RF5413_OB_5GHZ             { 3, 247, 0 }
00822 #define AR5K_RF5413_DB_5GHZ             { 3, 244, 0 }
00823 
00824 #define AR5K_RF5413_PWD_ICLOBUF2G       { 3, 131, 3 }
00825 #define AR5K_RF5413_DERBY_CHAN_SEL_MODE { 1, 291, 2 }
00826 
00827 static const struct ath5k_rf_reg rf_regs_5413[] = {
00828         {6, AR5K_RF_OB_2GHZ,             AR5K_RF5413_OB_2GHZ},
00829         {6, AR5K_RF_DB_2GHZ,             AR5K_RF5413_DB_2GHZ},
00830         {6, AR5K_RF_OB_5GHZ,             AR5K_RF5413_OB_5GHZ},
00831         {6, AR5K_RF_DB_5GHZ,             AR5K_RF5413_DB_5GHZ},
00832         {6, AR5K_RF_PWD_ICLOBUF_2G,      AR5K_RF5413_PWD_ICLOBUF2G},
00833         {6, AR5K_RF_DERBY_CHAN_SEL_MODE, AR5K_RF5413_DERBY_CHAN_SEL_MODE},
00834 };
00835 
00836 /* Default mode specific settings */
00837 static const struct ath5k_ini_rfbuffer rfb_5413[] = {
00838         { 1, 0x98d4,
00839         /*     mode a/XR  mode aTurbo    mode b     mode g    mode gTurbo */
00840             { 0x00000020, 0x00000020, 0x00000020, 0x00000020, 0x00000020 } },
00841         { 2, 0x98d0,
00842             { 0x00000008, 0x00000008, 0x00000008, 0x00000008, 0x00000008 } },
00843         { 3, 0x98dc,
00844             { 0x00a000c0, 0x00a000c0, 0x00e000c0, 0x00e000c0, 0x00e000c0 } },
00845         { 6, 0x989c,
00846             { 0x33000000, 0x33000000, 0x33000000, 0x33000000, 0x33000000 } },
00847         { 6, 0x989c,
00848             { 0x01000000, 0x01000000, 0x01000000, 0x01000000, 0x01000000 } },
00849         { 6, 0x989c,
00850             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00851         { 6, 0x989c,
00852             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00853         { 6, 0x989c,
00854             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00855         { 6, 0x989c,
00856             { 0x1f000000, 0x1f000000, 0x1f000000, 0x1f000000, 0x1f000000 } },
00857         { 6, 0x989c,
00858             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00859         { 6, 0x989c,
00860             { 0x00b80000, 0x00b80000, 0x00b80000, 0x00b80000, 0x00b80000 } },
00861         { 6, 0x989c,
00862             { 0x00b70000, 0x00b70000, 0x00b70000, 0x00b70000, 0x00b70000 } },
00863         { 6, 0x989c,
00864             { 0x00840000, 0x00840000, 0x00840000, 0x00840000, 0x00840000 } },
00865         { 6, 0x989c,
00866             { 0x00980000, 0x00980000, 0x00980000, 0x00980000, 0x00980000 } },
00867         { 6, 0x989c,
00868             { 0x00c00000, 0x00c00000, 0x00c00000, 0x00c00000, 0x00c00000 } },
00869         { 6, 0x989c,
00870             { 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000 } },
00871         { 6, 0x989c,
00872             { 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000 } },
00873         { 6, 0x989c,
00874             { 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000 } },
00875         { 6, 0x989c,
00876             { 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000 } },
00877         { 6, 0x989c,
00878             { 0x00d70000, 0x00d70000, 0x00d70000, 0x00d70000, 0x00d70000 } },
00879         { 6, 0x989c,
00880             { 0x00610000, 0x00610000, 0x00610000, 0x00610000, 0x00610000 } },
00881         { 6, 0x989c,
00882             { 0x00fe0000, 0x00fe0000, 0x00fe0000, 0x00fe0000, 0x00fe0000 } },
00883         { 6, 0x989c,
00884             { 0x00de0000, 0x00de0000, 0x00de0000, 0x00de0000, 0x00de0000 } },
00885         { 6, 0x989c,
00886             { 0x007f0000, 0x007f0000, 0x007f0000, 0x007f0000, 0x007f0000 } },
00887         { 6, 0x989c,
00888             { 0x043d0000, 0x043d0000, 0x043d0000, 0x043d0000, 0x043d0000 } },
00889         { 6, 0x989c,
00890             { 0x00770000, 0x00770000, 0x00770000, 0x00770000, 0x00770000 } },
00891         { 6, 0x989c,
00892             { 0x00440000, 0x00440000, 0x00440000, 0x00440000, 0x00440000 } },
00893         { 6, 0x989c,
00894             { 0x00980000, 0x00980000, 0x00980000, 0x00980000, 0x00980000 } },
00895         { 6, 0x989c,
00896             { 0x00100080, 0x00100080, 0x00100080, 0x00100080, 0x00100080 } },
00897         { 6, 0x989c,
00898             { 0x0005c034, 0x0005c034, 0x0005c034, 0x0005c034, 0x0005c034 } },
00899         { 6, 0x989c,
00900             { 0x003100f0, 0x003100f0, 0x003100f0, 0x003100f0, 0x003100f0 } },
00901         { 6, 0x989c,
00902             { 0x000c011f, 0x000c011f, 0x000c011f, 0x000c011f, 0x000c011f } },
00903         { 6, 0x989c,
00904             { 0x00510040, 0x00510040, 0x00510040, 0x00510040, 0x00510040 } },
00905         { 6, 0x989c,
00906             { 0x005000da, 0x005000da, 0x005000da, 0x005000da, 0x005000da } },
00907         { 6, 0x989c,
00908             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00909         { 6, 0x989c,
00910             { 0x00004044, 0x00004044, 0x00004044, 0x00004044, 0x00004044 } },
00911         { 6, 0x989c,
00912             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00913         { 6, 0x989c,
00914             { 0x000060c0, 0x000060c0, 0x000060c0, 0x000060c0, 0x000060c0 } },
00915         { 6, 0x989c,
00916             { 0x00002c00, 0x00002c00, 0x00003600, 0x00003600, 0x00002c00 } },
00917         { 6, 0x98c8,
00918             { 0x00000403, 0x00000403, 0x00040403, 0x00040403, 0x00040403 } },
00919         { 7, 0x989c,
00920             { 0x00006400, 0x00006400, 0x00006400, 0x00006400, 0x00006400 } },
00921         { 7, 0x989c,
00922             { 0x00000800, 0x00000800, 0x00000800, 0x00000800, 0x00000800 } },
00923         { 7, 0x98cc,
00924             { 0x0000000e, 0x0000000e, 0x0000000e, 0x0000000e, 0x0000000e } },
00925 };
00926 
00927 
00928 
00929 /***************************\
00930 * RF2425/RF2417 (Swan/Nala) *
00931 * AR2317 (Spider SoC)       *
00932 \***************************/
00933 
00934 /* BANK 6                               len  pos col */
00935 #define AR5K_RF2425_OB_2GHZ             { 3, 193, 0 }
00936 #define AR5K_RF2425_DB_2GHZ             { 3, 190, 0 }
00937 
00938 static const struct ath5k_rf_reg rf_regs_2425[] = {
00939         {6, AR5K_RF_OB_2GHZ,            AR5K_RF2425_OB_2GHZ},
00940         {6, AR5K_RF_DB_2GHZ,            AR5K_RF2425_DB_2GHZ},
00941 };
00942 
00943 /* Default mode specific settings
00944  * XXX: a/aTurbo ?
00945  */
00946 static const struct ath5k_ini_rfbuffer rfb_2425[] = {
00947         { 1, 0x98d4,
00948         /*     mode a/XR  mode aTurbo    mode b     mode g    mode gTurbo */
00949             { 0x00000020, 0x00000020, 0x00000020, 0x00000020, 0x00000020 } },
00950         { 2, 0x98d0,
00951             { 0x02001408, 0x02001408, 0x02001408, 0x02001408, 0x02001408 } },
00952         { 3, 0x98dc,
00953             { 0x00a020c0, 0x00a020c0, 0x00e020c0, 0x00e020c0, 0x00e020c0 } },
00954         { 6, 0x989c,
00955             { 0x10000000, 0x10000000, 0x10000000, 0x10000000, 0x10000000 } },
00956         { 6, 0x989c,
00957             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00958         { 6, 0x989c,
00959             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00960         { 6, 0x989c,
00961             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00962         { 6, 0x989c,
00963             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00964         { 6, 0x989c,
00965             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00966         { 6, 0x989c,
00967             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00968         { 6, 0x989c,
00969             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00970         { 6, 0x989c,
00971             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00972         { 6, 0x989c,
00973             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00974         { 6, 0x989c,
00975             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00976         { 6, 0x989c,
00977             { 0x002a0000, 0x002a0000, 0x002a0000, 0x002a0000, 0x002a0000 } },
00978         { 6, 0x989c,
00979             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00980         { 6, 0x989c,
00981             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00982         { 6, 0x989c,
00983             { 0x00100000, 0x00100000, 0x00100000, 0x00100000, 0x00100000 } },
00984         { 6, 0x989c,
00985             { 0x00020000, 0x00020000, 0x00020000, 0x00020000, 0x00020000 } },
00986         { 6, 0x989c,
00987             { 0x00730000, 0x00730000, 0x00730000, 0x00730000, 0x00730000 } },
00988         { 6, 0x989c,
00989             { 0x00f80000, 0x00f80000, 0x00f80000, 0x00f80000, 0x00f80000 } },
00990         { 6, 0x989c,
00991             { 0x00e70000, 0x00e70000, 0x00e70000, 0x00e70000, 0x00e70000 } },
00992         { 6, 0x989c,
00993             { 0x00140000, 0x00140000, 0x00140000, 0x00140000, 0x00140000 } },
00994         { 6, 0x989c,
00995             { 0x00910040, 0x00910040, 0x00910040, 0x00910040, 0x00910040 } },
00996         { 6, 0x989c,
00997             { 0x0007001a, 0x0007001a, 0x0007001a, 0x0007001a, 0x0007001a } },
00998         { 6, 0x989c,
00999             { 0x00410000, 0x00410000, 0x00410000, 0x00410000, 0x00410000 } },
01000         { 6, 0x989c,
01001             { 0x00810000, 0x00810000, 0x00810060, 0x00810060, 0x00810060 } },
01002         { 6, 0x989c,
01003             { 0x00020800, 0x00020800, 0x00020803, 0x00020803, 0x00020803 } },
01004         { 6, 0x989c,
01005             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
01006         { 6, 0x989c,
01007             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
01008         { 6, 0x989c,
01009             { 0x00001660, 0x00001660, 0x00001660, 0x00001660, 0x00001660 } },
01010         { 6, 0x989c,
01011             { 0x00001688, 0x00001688, 0x00001688, 0x00001688, 0x00001688 } },
01012         { 6, 0x98c4,
01013             { 0x00000001, 0x00000001, 0x00000001, 0x00000001, 0x00000001 } },
01014         { 7, 0x989c,
01015             { 0x00006400, 0x00006400, 0x00006400, 0x00006400, 0x00006400 } },
01016         { 7, 0x989c,
01017             { 0x00000800, 0x00000800, 0x00000800, 0x00000800, 0x00000800 } },
01018         { 7, 0x98cc,
01019             { 0x0000000e, 0x0000000e, 0x0000000e, 0x0000000e, 0x0000000e } },
01020 };
01021 
01022 /*
01023  * TODO: Handle the few differences with swan during
01024  * bank modification and get rid of this
01025  */
01026 static const struct ath5k_ini_rfbuffer rfb_2317[] = {
01027         { 1, 0x98d4,
01028         /*     mode a/XR  mode aTurbo    mode b     mode g    mode gTurbo */
01029             { 0x00000020, 0x00000020, 0x00000020, 0x00000020, 0x00000020 } },
01030         { 2, 0x98d0,
01031             { 0x02001408, 0x02011408, 0x02001408, 0x02001408, 0x02011408 } },
01032         { 3, 0x98dc,
01033             { 0x00a020c0, 0x00a020c0, 0x00e020c0, 0x00e020c0, 0x00e020c0 } },
01034         { 6, 0x989c,
01035             { 0x10000000, 0x10000000, 0x10000000, 0x10000000, 0x10000000 } },
01036         { 6, 0x989c,
01037             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
01038         { 6, 0x989c,
01039             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
01040         { 6, 0x989c,
01041             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
01042         { 6, 0x989c,
01043             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
01044         { 6, 0x989c,
01045             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
01046         { 6, 0x989c,
01047             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
01048         { 6, 0x989c,
01049             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
01050         { 6, 0x989c,
01051             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
01052         { 6, 0x989c,
01053             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
01054         { 6, 0x989c,
01055             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
01056         { 6, 0x989c,
01057             { 0x002a0000, 0x002a0000, 0x002a0000, 0x002a0000, 0x002a0000 } },
01058         { 6, 0x989c,
01059             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
01060         { 6, 0x989c,
01061             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
01062         { 6, 0x989c,
01063             { 0x00100000, 0x00100000, 0x00100000, 0x00100000, 0x00100000 } },
01064         { 6, 0x989c,
01065             { 0x00020000, 0x00020000, 0x00020000, 0x00020000, 0x00020000 } },
01066         { 6, 0x989c,
01067             { 0x00730000, 0x00730000, 0x00730000, 0x00730000, 0x00730000 } },
01068         { 6, 0x989c,
01069             { 0x00f80000, 0x00f80000, 0x00f80000, 0x00f80000, 0x00f80000 } },
01070         { 6, 0x989c,
01071             { 0x00e70000, 0x00e70000, 0x00e70000, 0x00e70000, 0x00e70000 } },
01072         { 6, 0x989c,
01073             { 0x00140100, 0x00140100, 0x00140100, 0x00140100, 0x00140100 } },
01074         { 6, 0x989c,
01075             { 0x00910040, 0x00910040, 0x00910040, 0x00910040, 0x00910040 } },
01076         { 6, 0x989c,
01077             { 0x0007001a, 0x0007001a, 0x0007001a, 0x0007001a, 0x0007001a } },
01078         { 6, 0x989c,
01079             { 0x00410000, 0x00410000, 0x00410000, 0x00410000, 0x00410000 } },
01080         { 6, 0x989c,
01081             { 0x00810000, 0x00810000, 0x00810060, 0x00810060, 0x00810060 } },
01082         { 6, 0x989c,
01083             { 0x00020800, 0x00020800, 0x00020803, 0x00020803, 0x00020803 } },
01084         { 6, 0x989c,
01085             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
01086         { 6, 0x989c,
01087             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
01088         { 6, 0x989c,
01089             { 0x00001660, 0x00001660, 0x00001660, 0x00001660, 0x00001660 } },
01090         { 6, 0x989c,
01091             { 0x00009688, 0x00009688, 0x00009688, 0x00009688, 0x00009688 } },
01092         { 6, 0x98c4,
01093             { 0x00000001, 0x00000001, 0x00000001, 0x00000001, 0x00000001 } },
01094         { 7, 0x989c,
01095             { 0x00006400, 0x00006400, 0x00006400, 0x00006400, 0x00006400 } },
01096         { 7, 0x989c,
01097             { 0x00000800, 0x00000800, 0x00000800, 0x00000800, 0x00000800 } },
01098         { 7, 0x98cc,
01099             { 0x0000000e, 0x0000000e, 0x0000000e, 0x0000000e, 0x0000000e } },
01100 };
01101 
01102 /*
01103  * TODO: Handle the few differences with swan during
01104  * bank modification and get rid of this
01105  * XXX: a/aTurbo ?
01106  */
01107 static const struct ath5k_ini_rfbuffer rfb_2417[] = {
01108         { 1, 0x98d4,
01109         /*     mode a/XR  mode aTurbo    mode b     mode g    mode gTurbo */
01110             { 0x00000020, 0x00000020, 0x00000020, 0x00000020, 0x00000020 } },
01111         { 2, 0x98d0,
01112             { 0x02001408, 0x02001408, 0x02001408, 0x02001408, 0x02001408 } },
01113         { 3, 0x98dc,
01114             { 0x00a020c0, 0x00a020c0, 0x00e020c0, 0x00e020c0, 0x00e020c0 } },
01115         { 6, 0x989c,
01116             { 0x10000000, 0x10000000, 0x10000000, 0x10000000, 0x10000000 } },
01117         { 6, 0x989c,
01118             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
01119         { 6, 0x989c,
01120             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
01121         { 6, 0x989c,
01122             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
01123         { 6, 0x989c,
01124             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
01125         { 6, 0x989c,
01126             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
01127         { 6, 0x989c,
01128             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
01129         { 6, 0x989c,
01130             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
01131         { 6, 0x989c,
01132             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
01133         { 6, 0x989c,
01134             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
01135         { 6, 0x989c,
01136             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
01137         { 6, 0x989c,
01138             { 0x002a0000, 0x002a0000, 0x002a0000, 0x002a0000, 0x002a0000 } },
01139         { 6, 0x989c,
01140             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
01141         { 6, 0x989c,
01142             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
01143         { 6, 0x989c,
01144             { 0x00100000, 0x00100000, 0x00100000, 0x00100000, 0x00100000 } },
01145         { 6, 0x989c,
01146             { 0x00020000, 0x00020000, 0x00020000, 0x00020000, 0x00020000 } },
01147         { 6, 0x989c,
01148             { 0x00730000, 0x00730000, 0x00730000, 0x00730000, 0x00730000 } },
01149         { 6, 0x989c,
01150             { 0x00f80000, 0x00f80000, 0x00f80000, 0x00f80000, 0x00f80000 } },
01151         { 6, 0x989c,
01152             { 0x00e70000, 0x00e70000, 0x80e70000, 0x80e70000, 0x00e70000 } },
01153         { 6, 0x989c,
01154             { 0x00140000, 0x00140000, 0x00140000, 0x00140000, 0x00140000 } },
01155         { 6, 0x989c,
01156             { 0x00910040, 0x00910040, 0x00910040, 0x00910040, 0x00910040 } },
01157         { 6, 0x989c,
01158             { 0x0007001a, 0x0007001a, 0x0207001a, 0x0207001a, 0x0007001a } },
01159         { 6, 0x989c,
01160             { 0x00410000, 0x00410000, 0x00410000, 0x00410000, 0x00410000 } },
01161         { 6, 0x989c,
01162             { 0x00810000, 0x00810000, 0x00810060, 0x00810060, 0x00810060 } },
01163         { 6, 0x989c,
01164             { 0x00020800, 0x00020800, 0x00020803, 0x00020803, 0x00020803 } },
01165         { 6, 0x989c,
01166             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
01167         { 6, 0x989c,
01168             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
01169         { 6, 0x989c,
01170             { 0x00001660, 0x00001660, 0x00001660, 0x00001660, 0x00001660 } },
01171         { 6, 0x989c,
01172             { 0x00001688, 0x00001688, 0x00001688, 0x00001688, 0x00001688 } },
01173         { 6, 0x98c4,
01174             { 0x00000001, 0x00000001, 0x00000001, 0x00000001, 0x00000001 } },
01175         { 7, 0x989c,
01176             { 0x00006400, 0x00006400, 0x00006400, 0x00006400, 0x00006400 } },
01177         { 7, 0x989c,
01178             { 0x00000800, 0x00000800, 0x00000800, 0x00000800, 0x00000800 } },
01179         { 7, 0x98cc,
01180             { 0x0000000e, 0x0000000e, 0x0000000e, 0x0000000e, 0x0000000e } },
01181 };

ros_rt_wmp
Author(s): Danilo Tardioli, dantard@unizar.es
autogenerated on Mon Oct 6 2014 08:27:11