usart2.h
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1 
31 /*
32  * Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
33  */
34 
35 #ifndef _SAME70_USART2_INSTANCE_
36 #define _SAME70_USART2_INSTANCE_
37 
38 /* ========== Register definition for USART2 peripheral ========== */
39 #if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
40  #define REG_USART2_CR (0x4002C000U)
41  #define REG_USART2_MR (0x4002C004U)
42  #define REG_USART2_IER (0x4002C008U)
43  #define REG_USART2_IDR (0x4002C00CU)
44  #define REG_USART2_IMR (0x4002C010U)
45  #define REG_USART2_CSR (0x4002C014U)
46  #define REG_USART2_RHR (0x4002C018U)
47  #define REG_USART2_THR (0x4002C01CU)
48  #define REG_USART2_BRGR (0x4002C020U)
49  #define REG_USART2_RTOR (0x4002C024U)
50  #define REG_USART2_TTGR (0x4002C028U)
51  #define REG_USART2_FIDI (0x4002C040U)
52  #define REG_USART2_NER (0x4002C044U)
53  #define REG_USART2_IF (0x4002C04CU)
54  #define REG_USART2_MAN (0x4002C050U)
55  #define REG_USART2_LINMR (0x4002C054U)
56  #define REG_USART2_LINIR (0x4002C058U)
57  #define REG_USART2_LINBRR (0x4002C05CU)
58  #define REG_USART2_LONMR (0x4002C060U)
59  #define REG_USART2_LONPR (0x4002C064U)
60  #define REG_USART2_LONDL (0x4002C068U)
61  #define REG_USART2_LONL2HDR (0x4002C06CU)
62  #define REG_USART2_LONBL (0x4002C070U)
63  #define REG_USART2_LONB1TX (0x4002C074U)
64  #define REG_USART2_LONB1RX (0x4002C078U)
65  #define REG_USART2_LONPRIO (0x4002C07CU)
66  #define REG_USART2_IDTTX (0x4002C080U)
67  #define REG_USART2_IDTRX (0x4002C084U)
68  #define REG_USART2_ICDIFF (0x4002C088U)
69  #define REG_USART2_WPMR (0x4002C0E4U)
70  #define REG_USART2_WPSR (0x4002C0E8U)
71  #define REG_USART2_VERSION (0x4002C0FCU)
72 #else
73  #define REG_USART2_CR (*(__O uint32_t*)0x4002C000U)
74  #define REG_USART2_MR (*(__IO uint32_t*)0x4002C004U)
75  #define REG_USART2_IER (*(__O uint32_t*)0x4002C008U)
76  #define REG_USART2_IDR (*(__O uint32_t*)0x4002C00CU)
77  #define REG_USART2_IMR (*(__I uint32_t*)0x4002C010U)
78  #define REG_USART2_CSR (*(__I uint32_t*)0x4002C014U)
79  #define REG_USART2_RHR (*(__I uint32_t*)0x4002C018U)
80  #define REG_USART2_THR (*(__O uint32_t*)0x4002C01CU)
81  #define REG_USART2_BRGR (*(__IO uint32_t*)0x4002C020U)
82  #define REG_USART2_RTOR (*(__IO uint32_t*)0x4002C024U)
83  #define REG_USART2_TTGR (*(__IO uint32_t*)0x4002C028U)
84  #define REG_USART2_FIDI (*(__IO uint32_t*)0x4002C040U)
85  #define REG_USART2_NER (*(__I uint32_t*)0x4002C044U)
86  #define REG_USART2_IF (*(__IO uint32_t*)0x4002C04CU)
87  #define REG_USART2_MAN (*(__IO uint32_t*)0x4002C050U)
88  #define REG_USART2_LINMR (*(__IO uint32_t*)0x4002C054U)
89  #define REG_USART2_LINIR (*(__IO uint32_t*)0x4002C058U)
90  #define REG_USART2_LINBRR (*(__I uint32_t*)0x4002C05CU)
91  #define REG_USART2_LONMR (*(__IO uint32_t*)0x4002C060U)
92  #define REG_USART2_LONPR (*(__IO uint32_t*)0x4002C064U)
93  #define REG_USART2_LONDL (*(__IO uint32_t*)0x4002C068U)
94  #define REG_USART2_LONL2HDR (*(__IO uint32_t*)0x4002C06CU)
95  #define REG_USART2_LONBL (*(__I uint32_t*)0x4002C070U)
96  #define REG_USART2_LONB1TX (*(__IO uint32_t*)0x4002C074U)
97  #define REG_USART2_LONB1RX (*(__IO uint32_t*)0x4002C078U)
98  #define REG_USART2_LONPRIO (*(__IO uint32_t*)0x4002C07CU)
99  #define REG_USART2_IDTTX (*(__IO uint32_t*)0x4002C080U)
100  #define REG_USART2_IDTRX (*(__IO uint32_t*)0x4002C084U)
101  #define REG_USART2_ICDIFF (*(__IO uint32_t*)0x4002C088U)
102  #define REG_USART2_WPMR (*(__IO uint32_t*)0x4002C0E4U)
103  #define REG_USART2_WPSR (*(__I uint32_t*)0x4002C0E8U)
104  #define REG_USART2_VERSION (*(__I uint32_t*)0x4002C0FCU)
105 #endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
106 
107 #endif /* _SAME70_USART2_INSTANCE_ */


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autogenerated on Sat Sep 19 2020 03:19:05