m2m_ate_mode.h
Go to the documentation of this file.
1 
35 #ifdef _M2M_ATE_FW_
36 
37 #ifndef _M2M_ATE_MODE_H_
38 #define _M2M_ATE_MODE_H_
39 
40 /*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
41 INCLUDES
42 *=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
43 #include "common/include/nm_common.h"
44 #include "driver/include/m2m_types.h"
45 
46 /*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
47 MACROS
48 *=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
49 #define M2M_ATE_MAX_NUM_OF_RATES (20)
50 
52 #define M2M_ATE_MAX_FRAME_LENGTH (1024)
53 
55 #define M2M_ATE_MIN_FRAME_LENGTH (1)
56 
60 #define M2M_ATE_SUCCESS (M2M_SUCCESS)
61 
63 #define M2M_ATE_ERR_VALIDATE (M2M_ERR_FAIL)
64 
66 #define M2M_ATE_ERR_TX_ALREADY_RUNNING (-1)
67 
69 #define M2M_ATE_ERR_RX_ALREADY_RUNNING (-2)
70 
72 #define M2M_ATE_ERR_UNHANDLED_CASE (-3)
73 
75 #define M2M_ATE_RX_DISABLE_DA 0x0
76 #define M2M_ATE_RX_ENABLE_DA 0x1
77 
78 #define M2M_ATE_RX_DISABLE_SA 0x0
79 #define M2M_ATE_RX_ENABLE_SA 0x1
80 
81 #define M2M_ATE_DISABLE_SELF_MACADDR 0x0
82 #define M2M_ATE_SET_SELF_MACADDR 0x1
83 /*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
84 DATA TYPES
85 *=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
90 typedef enum {
91  M2M_ATE_FW_STATE_STOP = 0x00,
94  M2M_ATE_FW_STATE_RUN = 0x01,
97 }tenuM2mAteFwState;
98 
103 typedef enum {
104  M2M_ATE_TX_RATE_1_Mbps_INDEX = 0x00,
105  M2M_ATE_TX_RATE_2_Mbps_INDEX = 0x01,
106  M2M_ATE_TX_RATE_55_Mbps_INDEX = 0x02,
107  M2M_ATE_TX_RATE_11_Mbps_INDEX = 0x03,
110  M2M_ATE_TX_RATE_6_Mbps_INDEX = 0x04,
111  M2M_ATE_TX_RATE_9_Mbps_INDEX = 0x05,
112  M2M_ATE_TX_RATE_12_Mbps_INDEX = 0x06,
113  M2M_ATE_TX_RATE_18_Mbps_INDEX = 0x07,
114  M2M_ATE_TX_RATE_24_Mbps_INDEX = 0x08,
115  M2M_ATE_TX_RATE_36_Mbps_INDEX = 0x09,
116  M2M_ATE_TX_RATE_48_Mbps_INDEX = 0x0A,
117  M2M_ATE_TX_RATE_54_Mbps_INDEX = 0x0B,
120  M2M_ATE_TX_RATE_MCS_0_INDEX = 0x0C,
121  M2M_ATE_TX_RATE_MCS_1_INDEX = 0x0D,
122  M2M_ATE_TX_RATE_MCS_2_INDEX = 0x0E,
123  M2M_ATE_TX_RATE_MCS_3_INDEX = 0x0F,
124  M2M_ATE_TX_RATE_MCS_4_INDEX = 0x10,
125  M2M_ATE_TX_RATE_MCS_5_INDEX = 0x11,
126  M2M_ATE_TX_RATE_MCS_6_INDEX = 0x12,
127  M2M_ATE_TX_RATE_MCS_7_INDEX = 0x13,
130 }tenuM2mAteTxIndexOfRates;
131 
136 typedef enum {
137  M2M_ATE_TX_DUTY_1 = 0x01,
138  M2M_ATE_TX_DUTY_2 = 0x02,
139  M2M_ATE_TX_DUTY_3 = 0x03,
140  M2M_ATE_TX_DUTY_4 = 0x04,
141  M2M_ATE_TX_DUTY_5 = 0x05,
142  M2M_ATE_TX_DUTY_6 = 0x06,
143  M2M_ATE_TX_DUTY_7 = 0x07,
144  M2M_ATE_TX_DUTY_8 = 0x08,
145  M2M_ATE_TX_DUTY_9 = 0x09,
146  M2M_ATE_TX_DUTY_10 = 0xA0,
147 }tenuM2mAteTxDutyCycle;
148 
149 
150 #define M2M_ATE_TX_DUTY_MAX_VALUE M2M_ATE_TX_DUTY_1
151 
153 #define M2M_ATE_TX_DUTY_MIN_VALUE M2M_ATE_TX_DUTY_10
154 
161 typedef enum {
162  M2M_ATE_TX_DPD_DYNAMIC = 0x00,
163  M2M_ATE_TX_DPD_BYPASS = 0x01,
164  M2M_ATE_TX_DPD_ENABLED = 0x02,
165 }tenuM2mAteTxDpdControl;
166 
171 typedef enum {
172  M2M_ATE_TX_GAIN_DYNAMIC = 0x00,
173  M2M_ATE_TX_GAIN_BYPASS = 0x01,
174  M2M_ATE_TX_GAIN_FCC = 0x02,
175  M2M_ATE_TX_GAIN_TELEC = 0x03,
176 }tenuM2mAteTxGainSetting;
177 
182 typedef enum {
183  M2M_ATE_PMU_DISBLE = 0x00,
184  M2M_ATE_PMU_ENABLE = 0x01,
185 }tenuM2mAtePMUSetting;
186 
191 typedef enum {
192  M2M_ATE_TX_SRC_MAC = 0x00,
193  M2M_ATE_TX_SRC_PHY = 0x01,
194 }tenuM2mAteTxSource;
195 
200 typedef enum {
201  M2M_ATE_TX_MODE_NORM = 0x00,
202  M2M_ATE_TX_MODE_CW = 0x01,
203 }tenuM2mAteTxMode;
204 
209 typedef enum {
210  M2M_ATE_CHANNEL_1 = 0x01,
211  M2M_ATE_CHANNEL_2 = 0x02,
212  M2M_ATE_CHANNEL_3 = 0x03,
213  M2M_ATE_CHANNEL_4 = 0x04,
214  M2M_ATE_CHANNEL_5 = 0x05,
215  M2M_ATE_CHANNEL_6 = 0x06,
216  M2M_ATE_CHANNEL_7 = 0x07,
217  M2M_ATE_CHANNEL_8 = 0x08,
218  M2M_ATE_CHANNEL_9 = 0x09,
219  M2M_ATE_CHANNEL_10 = 0x0A,
220  M2M_ATE_CHANNEL_11 = 0x0B,
221  M2M_ATE_CHANNEL_12 = 0x0C,
222  M2M_ATE_CHANNEL_13 = 0x0D,
223  M2M_ATE_CHANNEL_14 = 0x0E,
224 }tenuM2mAteChannels;
225 
230 typedef struct {
231  uint32 num_rx_pkts;
234  uint32 num_err_pkts;
237  uint32 num_good_pkts;
240 } tstrM2mAteRxStatus;
241 
246 typedef struct {
247  uint32 num_frames;
250  uint32 data_rate;
253  uint8 channel_num;
256  uint8 duty_cycle;
259  uint16 frame_len;
262  uint8 tx_gain_sel;
265  uint8 dpd_ctrl;
268  uint8 use_pmu;
271  uint8 phy_burst_tx;
274  uint8 cw_tx;
277  uint32 xo_offset_x1000;
280  uint8 use_efuse_xo_offset;
283  uint8 peer_mac_addr[6];
286 } tstrM2mAteTx;
287 
292 typedef struct {
293  uint8 channel_num;
296  uint8 use_pmu;
299  uint32 xo_offset_x1000;
302  uint8 use_efuse_xo_offset;
305  uint8 self_mac_addr[6];
308  uint8 sa_mac_addr[6];
311  uint8 mac_filter_en_da;
314  uint8 mac_filter_en_sa;
317  uint8 override_self_mac_addr;
320 } tstrM2mAteRx;
321 
322 /*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*
323 FUNCTION PROTOTYPES
324 *=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*=*/
325 #ifdef __cplusplus
326  extern "C" {
327 #endif
328 
339 sint8 m2m_ate_init(uint32 req_serial_number);
340 
351 sint8 m2m_ate_deinit(void);
352 
367 sint8 m2m_ate_set_fw_state(uint8);
368 
381 sint8 m2m_ate_get_fw_state(void);
382 
397 uint32 m2m_ate_get_tx_rate(uint8);
398 
411 sint8 m2m_ate_get_tx_status(void);
412 
427 sint8 m2m_ate_start_tx(tstrM2mAteTx *);
428 
441 sint8 m2m_ate_stop_tx(void);
442 
455 sint8 m2m_ate_get_rx_status(void);
456 
471 sint8 m2m_ate_start_rx(tstrM2mAteRx *);
472 
485 sint8 m2m_ate_stop_rx(void);
486 
501 sint8 m2m_ate_read_rx_status(tstrM2mAteRxStatus *);
502 
515 sint8 m2m_ate_set_dig_gain(double dGaindB);
516 
529 sint8 m2m_ate_get_dig_gain(double * pdGaindB);
530 
543 sint8 m2m_ate_get_pa_gain(uint32 * paGain);
544 
557 sint8 m2m_ate_get_ppa_gain(uint32 * ppaGain);
558 
571 sint8 m2m_ate_get_tot_gain(double * pTotGaindB);
572 
573 
574 #ifdef __cplusplus
575 }
576 #endif
577 
578 #endif /* _M2M_CONFIG_MODE_H_ */
579 
580 #endif //_M2M_ATE_FW_
nm_common.h
This module contains common APIs declarations.
sint8
signed char sint8
Range of values between -128 to 127.
Definition: nm_bsp.h:111
m2m_types.h
WINC3400 IoT Application Interface Internal Types.
uint16
unsigned short uint16
Range of values between 0 to 65535.
Definition: nm_bsp.h:96
uint32
unsigned long uint32
Range of values between 0 to 4294967295.
Definition: nm_bsp.h:103
uint8
unsigned char uint8
Range of values between 0 to 255.
Definition: nm_bsp.h:89

inertial_sense_ros
Author(s):
autogenerated on Sat Sep 19 2020 03:19:04