instance/icm.h
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1 
31 /*
32  * Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
33  */
34 
35 #ifndef _SAME70_ICM_INSTANCE_
36 #define _SAME70_ICM_INSTANCE_
37 
38 /* ========== Register definition for ICM peripheral ========== */
39 #if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
40  #define REG_ICM_CFG (0x40048000U)
41  #define REG_ICM_CTRL (0x40048004U)
42  #define REG_ICM_SR (0x40048008U)
43  #define REG_ICM_IER (0x40048010U)
44  #define REG_ICM_IDR (0x40048014U)
45  #define REG_ICM_IMR (0x40048018U)
46  #define REG_ICM_ISR (0x4004801CU)
47  #define REG_ICM_UASR (0x40048020U)
48  #define REG_ICM_DSCR (0x40048030U)
49  #define REG_ICM_HASH (0x40048034U)
50  #define REG_ICM_UIHVAL (0x40048038U)
51  #define REG_ICM_ADDRSIZE (0x400480ECU)
52  #define REG_ICM_IPNAME (0x400480F0U)
53  #define REG_ICM_FEATURES (0x400480F8U)
54  #define REG_ICM_VERSION (0x400480FCU)
55 #else
56  #define REG_ICM_CFG (*(__IO uint32_t*)0x40048000U)
57  #define REG_ICM_CTRL (*(__O uint32_t*)0x40048004U)
58  #define REG_ICM_SR (*(__I uint32_t*)0x40048008U)
59  #define REG_ICM_IER (*(__O uint32_t*)0x40048010U)
60  #define REG_ICM_IDR (*(__O uint32_t*)0x40048014U)
61  #define REG_ICM_IMR (*(__I uint32_t*)0x40048018U)
62  #define REG_ICM_ISR (*(__I uint32_t*)0x4004801CU)
63  #define REG_ICM_UASR (*(__I uint32_t*)0x40048020U)
64  #define REG_ICM_DSCR (*(__IO uint32_t*)0x40048030U)
65  #define REG_ICM_HASH (*(__IO uint32_t*)0x40048034U)
66  #define REG_ICM_UIHVAL (*(__O uint32_t*)0x40048038U)
67  #define REG_ICM_ADDRSIZE (*(__I uint32_t*)0x400480ECU)
68  #define REG_ICM_IPNAME (*(__I uint32_t*)0x400480F0U)
69  #define REG_ICM_FEATURES (*(__I uint32_t*)0x400480F8U)
70  #define REG_ICM_VERSION (*(__I uint32_t*)0x400480FCU)
71 #endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
72 
73 #endif /* _SAME70_ICM_INSTANCE_ */


inertial_sense_ros
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autogenerated on Sat Sep 19 2020 03:19:04