stm32f4xx_hash_sha1.c
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1 
46 /* Includes ------------------------------------------------------------------*/
47 #include "stm32f4xx_hash.h"
48 
58 /* Private typedef -----------------------------------------------------------*/
59 /* Private define ------------------------------------------------------------*/
60 #define SHA1BUSY_TIMEOUT ((uint32_t) 0x00010000)
61 
62 /* Private macro -------------------------------------------------------------*/
63 /* Private variables ---------------------------------------------------------*/
64 /* Private function prototypes -----------------------------------------------*/
65 /* Private functions ---------------------------------------------------------*/
66 
93 ErrorStatus HASH_SHA1(uint8_t *Input, uint32_t Ilen, uint8_t Output[20])
94 {
95  HASH_InitTypeDef SHA1_HASH_InitStructure;
96  HASH_MsgDigest SHA1_MessageDigest;
97  __IO uint16_t nbvalidbitsdata = 0;
98  uint32_t i = 0;
99  __IO uint32_t counter = 0;
100  uint32_t busystatus = 0;
102  uint32_t inputaddr = (uint32_t)Input;
103  uint32_t outputaddr = (uint32_t)Output;
104 
105  /* Number of valid bits in last word of the Input data */
106  nbvalidbitsdata = 8 * (Ilen % 4);
107 
108  /* HASH peripheral initialization */
109  HASH_DeInit();
110 
111  /* HASH Configuration */
112  SHA1_HASH_InitStructure.HASH_AlgoSelection = HASH_AlgoSelection_SHA1;
113  SHA1_HASH_InitStructure.HASH_AlgoMode = HASH_AlgoMode_HASH;
114  SHA1_HASH_InitStructure.HASH_DataType = HASH_DataType_8b;
115  HASH_Init(&SHA1_HASH_InitStructure);
116 
117  /* Configure the number of valid bits in last word of the data */
118  HASH_SetLastWordValidBitsNbr(nbvalidbitsdata);
119 
120  /* Write the Input block in the IN FIFO */
121  for(i=0; i<Ilen; i+=4)
122  {
123  HASH_DataIn(*(uint32_t*)inputaddr);
124  inputaddr+=4;
125  }
126 
127  /* Start the HASH processor */
129 
130  /* wait until the Busy flag is RESET */
131  do
132  {
133  busystatus = HASH_GetFlagStatus(HASH_FLAG_BUSY);
134  counter++;
135  }while ((counter != SHA1BUSY_TIMEOUT) && (busystatus != RESET));
136 
137  if (busystatus != RESET)
138  {
139  status = ERROR;
140  }
141  else
142  {
143  /* Read the message digest */
144  HASH_GetDigest(&SHA1_MessageDigest);
145  *(uint32_t*)(outputaddr) = __REV(SHA1_MessageDigest.Data[0]);
146  outputaddr+=4;
147  *(uint32_t*)(outputaddr) = __REV(SHA1_MessageDigest.Data[1]);
148  outputaddr+=4;
149  *(uint32_t*)(outputaddr) = __REV(SHA1_MessageDigest.Data[2]);
150  outputaddr+=4;
151  *(uint32_t*)(outputaddr) = __REV(SHA1_MessageDigest.Data[3]);
152  outputaddr+=4;
153  *(uint32_t*)(outputaddr) = __REV(SHA1_MessageDigest.Data[4]);
154  }
155  return status;
156 }
157 
169 ErrorStatus HMAC_SHA1(uint8_t *Key, uint32_t Keylen, uint8_t *Input,
170  uint32_t Ilen, uint8_t Output[20])
171 {
172  HASH_InitTypeDef SHA1_HASH_InitStructure;
173  HASH_MsgDigest SHA1_MessageDigest;
174  __IO uint16_t nbvalidbitsdata = 0;
175  __IO uint16_t nbvalidbitskey = 0;
176  uint32_t i = 0;
177  __IO uint32_t counter = 0;
178  uint32_t busystatus = 0;
180  uint32_t keyaddr = (uint32_t)Key;
181  uint32_t inputaddr = (uint32_t)Input;
182  uint32_t outputaddr = (uint32_t)Output;
183 
184  /* Number of valid bits in last word of the Input data */
185  nbvalidbitsdata = 8 * (Ilen % 4);
186 
187  /* Number of valid bits in last word of the Key */
188  nbvalidbitskey = 8 * (Keylen % 4);
189 
190  /* HASH peripheral initialization */
191  HASH_DeInit();
192 
193  /* HASH Configuration */
194  SHA1_HASH_InitStructure.HASH_AlgoSelection = HASH_AlgoSelection_SHA1;
195  SHA1_HASH_InitStructure.HASH_AlgoMode = HASH_AlgoMode_HMAC;
196  SHA1_HASH_InitStructure.HASH_DataType = HASH_DataType_8b;
197  if(Keylen > 64)
198  {
199  /* HMAC long Key */
200  SHA1_HASH_InitStructure.HASH_HMACKeyType = HASH_HMACKeyType_LongKey;
201  }
202  else
203  {
204  /* HMAC short Key */
205  SHA1_HASH_InitStructure.HASH_HMACKeyType = HASH_HMACKeyType_ShortKey;
206  }
207  HASH_Init(&SHA1_HASH_InitStructure);
208 
209  /* Configure the number of valid bits in last word of the Key */
210  HASH_SetLastWordValidBitsNbr(nbvalidbitskey);
211 
212  /* Write the Key */
213  for(i=0; i<Keylen; i+=4)
214  {
215  HASH_DataIn(*(uint32_t*)keyaddr);
216  keyaddr+=4;
217  }
218 
219  /* Start the HASH processor */
221 
222  /* wait until the Busy flag is RESET */
223  do
224  {
225  busystatus = HASH_GetFlagStatus(HASH_FLAG_BUSY);
226  counter++;
227  }while ((counter != SHA1BUSY_TIMEOUT) && (busystatus != RESET));
228 
229  if (busystatus != RESET)
230  {
231  status = ERROR;
232  }
233  else
234  {
235  /* Configure the number of valid bits in last word of the Input data */
236  HASH_SetLastWordValidBitsNbr(nbvalidbitsdata);
237 
238  /* Write the Input block in the IN FIFO */
239  for(i=0; i<Ilen; i+=4)
240  {
241  HASH_DataIn(*(uint32_t*)inputaddr);
242  inputaddr+=4;
243  }
244 
245  /* Start the HASH processor */
247 
248 
249  /* wait until the Busy flag is RESET */
250  counter =0;
251  do
252  {
253  busystatus = HASH_GetFlagStatus(HASH_FLAG_BUSY);
254  counter++;
255  }while ((counter != SHA1BUSY_TIMEOUT) && (busystatus != RESET));
256 
257  if (busystatus != RESET)
258  {
259  status = ERROR;
260  }
261  else
262  {
263  /* Configure the number of valid bits in last word of the Key */
264  HASH_SetLastWordValidBitsNbr(nbvalidbitskey);
265 
266  /* Write the Key */
267  keyaddr = (uint32_t)Key;
268  for(i=0; i<Keylen; i+=4)
269  {
270  HASH_DataIn(*(uint32_t*)keyaddr);
271  keyaddr+=4;
272  }
273 
274  /* Start the HASH processor */
276 
277  /* wait until the Busy flag is RESET */
278  counter =0;
279  do
280  {
281  busystatus = HASH_GetFlagStatus(HASH_FLAG_BUSY);
282  counter++;
283  }while ((counter != SHA1BUSY_TIMEOUT) && (busystatus != RESET));
284 
285  if (busystatus != RESET)
286  {
287  status = ERROR;
288  }
289  else
290  {
291  /* Read the message digest */
292  HASH_GetDigest(&SHA1_MessageDigest);
293  *(uint32_t*)(outputaddr) = __REV(SHA1_MessageDigest.Data[0]);
294  outputaddr+=4;
295  *(uint32_t*)(outputaddr) = __REV(SHA1_MessageDigest.Data[1]);
296  outputaddr+=4;
297  *(uint32_t*)(outputaddr) = __REV(SHA1_MessageDigest.Data[2]);
298  outputaddr+=4;
299  *(uint32_t*)(outputaddr) = __REV(SHA1_MessageDigest.Data[3]);
300  outputaddr+=4;
301  *(uint32_t*)(outputaddr) = __REV(SHA1_MessageDigest.Data[4]);
302  }
303  }
304  }
305  return status;
306 }
323 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
#define HASH_AlgoMode_HMAC
#define HASH_HMACKeyType_LongKey
#define HASH_FLAG_BUSY
uint32_t HASH_HMACKeyType
FlagStatus HASH_GetFlagStatus(uint32_t HASH_FLAG)
Checks whether the specified HASH flag is set or not.
void HASH_GetDigest(HASH_MsgDigest *HASH_MessageDigest)
Provides the message digest result.
uint32_t Data[8]
uint32_t HASH_AlgoSelection
void HASH_Init(HASH_InitTypeDef *HASH_InitStruct)
Initializes the HASH peripheral according to the specified parameters in the HASH_InitStruct structur...
static volatile uint8_t * status
Definition: drv_i2c.c:102
ErrorStatus HMAC_SHA1(uint8_t *Key, uint32_t Keylen, uint8_t *Input, uint32_t Ilen, uint8_t Output[20])
Compute the HMAC SHA1 digest.
This file contains all the functions prototypes for the HASH firmware library.
#define __IO
Definition: core_cm0.h:198
void HASH_SetLastWordValidBitsNbr(uint16_t ValidNumber)
Configure the Number of valid bits in last word of the message.
ErrorStatus HASH_SHA1(uint8_t *Input, uint32_t Ilen, uint8_t Output[20])
Compute the HASH SHA1 digest.
void HASH_DeInit(void)
De-initializes the HASH peripheral registers to their default reset values.
#define HASH_DataType_8b
#define HASH_AlgoMode_HASH
ErrorStatus
Definition: stm32f4xx.h:711
void HASH_DataIn(uint32_t Data)
Writes data in the Data Input FIFO.
HASH message digest result structure definition.
uint32_t HASH_DataType
#define HASH_HMACKeyType_ShortKey
void HASH_StartDigest(void)
Starts the message padding and calculation of the final message.
#define HASH_AlgoSelection_SHA1
HASH Init structure definition.
#define SHA1BUSY_TIMEOUT
uint32_t HASH_AlgoMode


rosflight_firmware
Author(s): Daniel Koch , James Jackson
autogenerated on Thu Oct 24 2019 03:17:19