stm32f4xx_cryp.c
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1 
163 /* Includes ------------------------------------------------------------------*/
164 #include "stm32f4xx_cryp.h"
165 #include "stm32f4xx_rcc.h"
166 
176 /* Private typedef -----------------------------------------------------------*/
177 /* Private define ------------------------------------------------------------*/
178 #define FLAG_MASK ((uint8_t)0x20)
179 #define MAX_TIMEOUT ((uint16_t)0xFFFF)
180 
181 /* Private macro -------------------------------------------------------------*/
182 /* Private variables ---------------------------------------------------------*/
183 /* Private function prototypes -----------------------------------------------*/
184 /* Private functions ---------------------------------------------------------*/
185 
219 void CRYP_DeInit(void)
220 {
221  /* Enable CRYP reset state */
223 
224  /* Release CRYP from reset state */
226 }
227 
235 void CRYP_Init(CRYP_InitTypeDef* CRYP_InitStruct)
236 {
237  /* Check the parameters */
238  assert_param(IS_CRYP_ALGOMODE(CRYP_InitStruct->CRYP_AlgoMode));
239  assert_param(IS_CRYP_DATATYPE(CRYP_InitStruct->CRYP_DataType));
240  assert_param(IS_CRYP_ALGODIR(CRYP_InitStruct->CRYP_AlgoDir));
241 
242  /* Select Algorithm mode*/
243  CRYP->CR &= ~CRYP_CR_ALGOMODE;
244  CRYP->CR |= CRYP_InitStruct->CRYP_AlgoMode;
245 
246  /* Select dataType */
247  CRYP->CR &= ~CRYP_CR_DATATYPE;
248  CRYP->CR |= CRYP_InitStruct->CRYP_DataType;
249 
250  /* select Key size (used only with AES algorithm) */
251  if ((CRYP_InitStruct->CRYP_AlgoMode != CRYP_AlgoMode_TDES_ECB) &&
252  (CRYP_InitStruct->CRYP_AlgoMode != CRYP_AlgoMode_TDES_CBC) &&
253  (CRYP_InitStruct->CRYP_AlgoMode != CRYP_AlgoMode_DES_ECB) &&
254  (CRYP_InitStruct->CRYP_AlgoMode != CRYP_AlgoMode_DES_CBC))
255  {
256  assert_param(IS_CRYP_KEYSIZE(CRYP_InitStruct->CRYP_KeySize));
257  CRYP->CR &= ~CRYP_CR_KEYSIZE;
258  CRYP->CR |= CRYP_InitStruct->CRYP_KeySize; /* Key size and value must be
259  configured once the key has
260  been prepared */
261  }
262 
263  /* Select data Direction */
264  CRYP->CR &= ~CRYP_CR_ALGODIR;
265  CRYP->CR |= CRYP_InitStruct->CRYP_AlgoDir;
266 }
267 
274 void CRYP_StructInit(CRYP_InitTypeDef* CRYP_InitStruct)
275 {
276  /* Initialize the CRYP_AlgoDir member */
277  CRYP_InitStruct->CRYP_AlgoDir = CRYP_AlgoDir_Encrypt;
278 
279  /* initialize the CRYP_AlgoMode member */
280  CRYP_InitStruct->CRYP_AlgoMode = CRYP_AlgoMode_TDES_ECB;
281 
282  /* initialize the CRYP_DataType member */
283  CRYP_InitStruct->CRYP_DataType = CRYP_DataType_32b;
284 
285  /* Initialize the CRYP_KeySize member */
286  CRYP_InitStruct->CRYP_KeySize = CRYP_KeySize_128b;
287 }
288 
296 void CRYP_KeyInit(CRYP_KeyInitTypeDef* CRYP_KeyInitStruct)
297 {
298  /* Key Initialisation */
299  CRYP->K0LR = CRYP_KeyInitStruct->CRYP_Key0Left;
300  CRYP->K0RR = CRYP_KeyInitStruct->CRYP_Key0Right;
301  CRYP->K1LR = CRYP_KeyInitStruct->CRYP_Key1Left;
302  CRYP->K1RR = CRYP_KeyInitStruct->CRYP_Key1Right;
303  CRYP->K2LR = CRYP_KeyInitStruct->CRYP_Key2Left;
304  CRYP->K2RR = CRYP_KeyInitStruct->CRYP_Key2Right;
305  CRYP->K3LR = CRYP_KeyInitStruct->CRYP_Key3Left;
306  CRYP->K3RR = CRYP_KeyInitStruct->CRYP_Key3Right;
307 }
308 
315 void CRYP_KeyStructInit(CRYP_KeyInitTypeDef* CRYP_KeyInitStruct)
316 {
317  CRYP_KeyInitStruct->CRYP_Key0Left = 0;
318  CRYP_KeyInitStruct->CRYP_Key0Right = 0;
319  CRYP_KeyInitStruct->CRYP_Key1Left = 0;
320  CRYP_KeyInitStruct->CRYP_Key1Right = 0;
321  CRYP_KeyInitStruct->CRYP_Key2Left = 0;
322  CRYP_KeyInitStruct->CRYP_Key2Right = 0;
323  CRYP_KeyInitStruct->CRYP_Key3Left = 0;
324  CRYP_KeyInitStruct->CRYP_Key3Right = 0;
325 }
333 void CRYP_IVInit(CRYP_IVInitTypeDef* CRYP_IVInitStruct)
334 {
335  CRYP->IV0LR = CRYP_IVInitStruct->CRYP_IV0Left;
336  CRYP->IV0RR = CRYP_IVInitStruct->CRYP_IV0Right;
337  CRYP->IV1LR = CRYP_IVInitStruct->CRYP_IV1Left;
338  CRYP->IV1RR = CRYP_IVInitStruct->CRYP_IV1Right;
339 }
340 
347 void CRYP_IVStructInit(CRYP_IVInitTypeDef* CRYP_IVInitStruct)
348 {
349  CRYP_IVInitStruct->CRYP_IV0Left = 0;
350  CRYP_IVInitStruct->CRYP_IV0Right = 0;
351  CRYP_IVInitStruct->CRYP_IV1Left = 0;
352  CRYP_IVInitStruct->CRYP_IV1Right = 0;
353 }
354 
366 void CRYP_PhaseConfig(uint32_t CRYP_Phase)
367 { uint32_t tempcr = 0;
368 
369  /* Check the parameter */
370  assert_param(IS_CRYP_PHASE(CRYP_Phase));
371 
372  /* Get the CR register */
373  tempcr = CRYP->CR;
374 
375  /* Reset the phase configuration bits: GCMP_CCMPH */
376  tempcr &= (uint32_t)(~CRYP_CR_GCM_CCMPH);
377  /* Set the selected phase */
378  tempcr |= (uint32_t)CRYP_Phase;
379 
380  /* Set the CR register */
381  CRYP->CR = tempcr;
382 }
383 
391 void CRYP_FIFOFlush(void)
392 {
393  /* Reset the read and write pointers of the FIFOs */
394  CRYP->CR |= CRYP_CR_FFLUSH;
395 }
396 
403 void CRYP_Cmd(FunctionalState NewState)
404 {
405  /* Check the parameters */
407 
408  if (NewState != DISABLE)
409  {
410  /* Enable the Cryptographic processor */
411  CRYP->CR |= CRYP_CR_CRYPEN;
412  }
413  else
414  {
415  /* Disable the Cryptographic processor */
416  CRYP->CR &= ~CRYP_CR_CRYPEN;
417  }
418 }
446 void CRYP_DataIn(uint32_t Data)
447 {
448  CRYP->DR = Data;
449 }
450 
456 uint32_t CRYP_DataOut(void)
457 {
458  return CRYP->DOUT;
459 }
498  CRYP_KeyInitTypeDef* CRYP_KeyInitStruct)
499 {
500  __IO uint32_t timeout = 0;
501  uint32_t ckeckmask = 0, bitstatus;
503 
504  /* Stop DMA transfers on the IN FIFO by clearing the DIEN bit in the CRYP_DMACR */
505  CRYP->DMACR &= ~(uint32_t)CRYP_DMACR_DIEN;
506 
507  /* Wait until both the IN and OUT FIFOs are empty
508  (IFEM=1 and OFNE=0 in the CRYP_SR register) and the
509  BUSY bit is cleared. */
510 
511  if ((CRYP->CR & (uint32_t)(CRYP_CR_ALGOMODE_TDES_ECB | CRYP_CR_ALGOMODE_TDES_CBC)) != (uint32_t)0 )/* TDES */
512  {
513  ckeckmask = CRYP_SR_IFEM | CRYP_SR_BUSY ;
514  }
515  else /* AES or DES */
516  {
517  ckeckmask = CRYP_SR_IFEM | CRYP_SR_BUSY | CRYP_SR_OFNE;
518  }
519 
520  do
521  {
522  bitstatus = CRYP->SR & ckeckmask;
523  timeout++;
524  }
525  while ((timeout != MAX_TIMEOUT) && (bitstatus != CRYP_SR_IFEM));
526 
527  if ((CRYP->SR & ckeckmask) != CRYP_SR_IFEM)
528  {
529  status = ERROR;
530  }
531  else
532  {
533  /* Stop DMA transfers on the OUT FIFO by
534  - writing the DOEN bit to 0 in the CRYP_DMACR register
535  - and clear the CRYPEN bit. */
536 
537  CRYP->DMACR &= ~(uint32_t)CRYP_DMACR_DOEN;
538  CRYP->CR &= ~(uint32_t)CRYP_CR_CRYPEN;
539 
540  /* Save the current configuration (bit 19, bit[17:16] and bits [9:2] in the CRYP_CR register) */
541  CRYP_ContextSave->CR_CurrentConfig = CRYP->CR & (CRYP_CR_GCM_CCMPH |
546 
547  /* and, if not in ECB mode, the initialization vectors. */
548  CRYP_ContextSave->CRYP_IV0LR = CRYP->IV0LR;
549  CRYP_ContextSave->CRYP_IV0RR = CRYP->IV0RR;
550  CRYP_ContextSave->CRYP_IV1LR = CRYP->IV1LR;
551  CRYP_ContextSave->CRYP_IV1RR = CRYP->IV1RR;
552 
553  /* save The key value */
554  CRYP_ContextSave->CRYP_K0LR = CRYP_KeyInitStruct->CRYP_Key0Left;
555  CRYP_ContextSave->CRYP_K0RR = CRYP_KeyInitStruct->CRYP_Key0Right;
556  CRYP_ContextSave->CRYP_K1LR = CRYP_KeyInitStruct->CRYP_Key1Left;
557  CRYP_ContextSave->CRYP_K1RR = CRYP_KeyInitStruct->CRYP_Key1Right;
558  CRYP_ContextSave->CRYP_K2LR = CRYP_KeyInitStruct->CRYP_Key2Left;
559  CRYP_ContextSave->CRYP_K2RR = CRYP_KeyInitStruct->CRYP_Key2Right;
560  CRYP_ContextSave->CRYP_K3LR = CRYP_KeyInitStruct->CRYP_Key3Left;
561  CRYP_ContextSave->CRYP_K3RR = CRYP_KeyInitStruct->CRYP_Key3Right;
562 
563  /* Save the content of context swap registers */
564  CRYP_ContextSave->CRYP_CSGCMCCMR[0] = CRYP->CSGCMCCM0R;
565  CRYP_ContextSave->CRYP_CSGCMCCMR[1] = CRYP->CSGCMCCM1R;
566  CRYP_ContextSave->CRYP_CSGCMCCMR[2] = CRYP->CSGCMCCM2R;
567  CRYP_ContextSave->CRYP_CSGCMCCMR[3] = CRYP->CSGCMCCM3R;
568  CRYP_ContextSave->CRYP_CSGCMCCMR[4] = CRYP->CSGCMCCM4R;
569  CRYP_ContextSave->CRYP_CSGCMCCMR[5] = CRYP->CSGCMCCM5R;
570  CRYP_ContextSave->CRYP_CSGCMCCMR[6] = CRYP->CSGCMCCM6R;
571  CRYP_ContextSave->CRYP_CSGCMCCMR[7] = CRYP->CSGCMCCM7R;
572 
573  CRYP_ContextSave->CRYP_CSGCMR[0] = CRYP->CSGCM0R;
574  CRYP_ContextSave->CRYP_CSGCMR[1] = CRYP->CSGCM1R;
575  CRYP_ContextSave->CRYP_CSGCMR[2] = CRYP->CSGCM2R;
576  CRYP_ContextSave->CRYP_CSGCMR[3] = CRYP->CSGCM3R;
577  CRYP_ContextSave->CRYP_CSGCMR[4] = CRYP->CSGCM4R;
578  CRYP_ContextSave->CRYP_CSGCMR[5] = CRYP->CSGCM5R;
579  CRYP_ContextSave->CRYP_CSGCMR[6] = CRYP->CSGCM6R;
580  CRYP_ContextSave->CRYP_CSGCMR[7] = CRYP->CSGCM7R;
581 
582  /* When needed, save the DMA status (pointers for IN and OUT messages,
583  number of remaining bytes, etc.) */
584 
585  status = SUCCESS;
586  }
587 
588  return status;
589 }
590 
602 void CRYP_RestoreContext(CRYP_Context* CRYP_ContextRestore)
603 {
604 
605  /* Configure the processor with the saved configuration */
606  CRYP->CR = CRYP_ContextRestore->CR_CurrentConfig;
607 
608  /* restore The key value */
609  CRYP->K0LR = CRYP_ContextRestore->CRYP_K0LR;
610  CRYP->K0RR = CRYP_ContextRestore->CRYP_K0RR;
611  CRYP->K1LR = CRYP_ContextRestore->CRYP_K1LR;
612  CRYP->K1RR = CRYP_ContextRestore->CRYP_K1RR;
613  CRYP->K2LR = CRYP_ContextRestore->CRYP_K2LR;
614  CRYP->K2RR = CRYP_ContextRestore->CRYP_K2RR;
615  CRYP->K3LR = CRYP_ContextRestore->CRYP_K3LR;
616  CRYP->K3RR = CRYP_ContextRestore->CRYP_K3RR;
617 
618  /* and the initialization vectors. */
619  CRYP->IV0LR = CRYP_ContextRestore->CRYP_IV0LR;
620  CRYP->IV0RR = CRYP_ContextRestore->CRYP_IV0RR;
621  CRYP->IV1LR = CRYP_ContextRestore->CRYP_IV1LR;
622  CRYP->IV1RR = CRYP_ContextRestore->CRYP_IV1RR;
623 
624  /* Restore the content of context swap registers */
625  CRYP->CSGCMCCM0R = CRYP_ContextRestore->CRYP_CSGCMCCMR[0];
626  CRYP->CSGCMCCM1R = CRYP_ContextRestore->CRYP_CSGCMCCMR[1];
627  CRYP->CSGCMCCM2R = CRYP_ContextRestore->CRYP_CSGCMCCMR[2];
628  CRYP->CSGCMCCM3R = CRYP_ContextRestore->CRYP_CSGCMCCMR[3];
629  CRYP->CSGCMCCM4R = CRYP_ContextRestore->CRYP_CSGCMCCMR[4];
630  CRYP->CSGCMCCM5R = CRYP_ContextRestore->CRYP_CSGCMCCMR[5];
631  CRYP->CSGCMCCM6R = CRYP_ContextRestore->CRYP_CSGCMCCMR[6];
632  CRYP->CSGCMCCM7R = CRYP_ContextRestore->CRYP_CSGCMCCMR[7];
633 
634  CRYP->CSGCM0R = CRYP_ContextRestore->CRYP_CSGCMR[0];
635  CRYP->CSGCM1R = CRYP_ContextRestore->CRYP_CSGCMR[1];
636  CRYP->CSGCM2R = CRYP_ContextRestore->CRYP_CSGCMR[2];
637  CRYP->CSGCM3R = CRYP_ContextRestore->CRYP_CSGCMR[3];
638  CRYP->CSGCM4R = CRYP_ContextRestore->CRYP_CSGCMR[4];
639  CRYP->CSGCM5R = CRYP_ContextRestore->CRYP_CSGCMR[5];
640  CRYP->CSGCM6R = CRYP_ContextRestore->CRYP_CSGCMR[6];
641  CRYP->CSGCM7R = CRYP_ContextRestore->CRYP_CSGCMR[7];
642 
643  /* Enable the cryptographic processor */
644  CRYP->CR |= CRYP_CR_CRYPEN;
645 }
681 void CRYP_DMACmd(uint8_t CRYP_DMAReq, FunctionalState NewState)
682 {
683  /* Check the parameters */
684  assert_param(IS_CRYP_DMAREQ(CRYP_DMAReq));
686 
687  if (NewState != DISABLE)
688  {
689  /* Enable the selected CRYP DMA request */
690  CRYP->DMACR |= CRYP_DMAReq;
691  }
692  else
693  {
694  /* Disable the selected CRYP DMA request */
695  CRYP->DMACR &= (uint8_t)~CRYP_DMAReq;
696  }
697 }
799 void CRYP_ITConfig(uint8_t CRYP_IT, FunctionalState NewState)
800 {
801  /* Check the parameters */
804 
805  if (NewState != DISABLE)
806  {
807  /* Enable the selected CRYP interrupt */
808  CRYP->IMSCR |= CRYP_IT;
809  }
810  else
811  {
812  /* Disable the selected CRYP interrupt */
813  CRYP->IMSCR &= (uint8_t)~CRYP_IT;
814  }
815 }
816 
827 ITStatus CRYP_GetITStatus(uint8_t CRYP_IT)
828 {
829  ITStatus bitstatus = RESET;
830  /* Check the parameters */
831  assert_param(IS_CRYP_GET_IT(CRYP_IT));
832 
833  /* Check the status of the specified CRYP interrupt */
834  if ((CRYP->MISR & CRYP_IT) != (uint8_t)RESET)
835  {
836  /* CRYP_IT is set */
837  bitstatus = SET;
838  }
839  else
840  {
841  /* CRYP_IT is reset */
842  bitstatus = RESET;
843  }
844  /* Return the CRYP_IT status */
845  return bitstatus;
846 }
847 
854 {
855  FunctionalState state = DISABLE;
856 
857  if ((CRYP->CR & CRYP_CR_CRYPEN) != 0)
858  {
859  /* CRYPEN bit is set */
860  state = ENABLE;
861  }
862  else
863  {
864  /* CRYPEN bit is reset */
865  state = DISABLE;
866  }
867  return state;
868 }
869 
883 FlagStatus CRYP_GetFlagStatus(uint8_t CRYP_FLAG)
884 {
885  FlagStatus bitstatus = RESET;
886  uint32_t tempreg = 0;
887 
888  /* Check the parameters */
889  assert_param(IS_CRYP_GET_FLAG(CRYP_FLAG));
890 
891  /* check if the FLAG is in RISR register */
892  if ((CRYP_FLAG & FLAG_MASK) != 0x00)
893  {
894  tempreg = CRYP->RISR;
895  }
896  else /* The FLAG is in SR register */
897  {
898  tempreg = CRYP->SR;
899  }
900 
901 
902  /* Check the status of the specified CRYP flag */
903  if ((tempreg & CRYP_FLAG ) != (uint8_t)RESET)
904  {
905  /* CRYP_FLAG is set */
906  bitstatus = SET;
907  }
908  else
909  {
910  /* CRYP_FLAG is reset */
911  bitstatus = RESET;
912  }
913 
914  /* Return the CRYP_FLAG status */
915  return bitstatus;
916 }
917 
934 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
FlagStatus
Definition: stm32f4xx.h:706
#define CRYP_KeySize_128b
void CRYP_IVStructInit(CRYP_IVInitTypeDef *CRYP_IVInitStruct)
Fills each CRYP_IVInitStruct member with its default value.
#define CRYP_AlgoMode_TDES_ECB
uint32_t CRYP_CSGCMR[8]
void CRYP_StructInit(CRYP_InitTypeDef *CRYP_InitStruct)
Fills each CRYP_InitStruct member with its default value.
#define IS_CRYP_CONFIG_IT(IT)
void CRYP_Cmd(FunctionalState NewState)
Enables or disables the CRYP peripheral.
#define CRYP_CR_ALGOMODE
Definition: stm32f4xx.h:3878
FunctionalState
Definition: stm32f4xx.h:708
#define CRYP_AlgoMode_DES_ECB
void CRYP_RestoreContext(CRYP_Context *CRYP_ContextRestore)
Restores the CRYP peripheral Context.
#define IS_CRYP_KEYSIZE(KEYSIZE)
uint32_t CR_CurrentConfig
uint32_t CRYP_AlgoMode
#define CRYP_SR_BUSY
Definition: stm32f4xx.h:3910
#define CRYP_DMACR_DIEN
Definition: stm32f4xx.h:3912
#define IS_CRYP_GET_IT(IT)
uint32_t CRYP_IV0LR
uint32_t CRYP_DataOut(void)
Returns the last data entered into the output FIFO.
void assert_param(int val)
#define CRYP_DataType_32b
#define IS_FUNCTIONAL_STATE(STATE)
Definition: stm32f4xx.h:709
#define CRYP_AlgoMode_DES_CBC
CRYP context swapping structure definition.
static volatile uint8_t * status
Definition: drv_i2c.c:102
void CRYP_DataIn(uint32_t Data)
Writes data in the Data Input register (DIN).
#define CRYP_DMACR_DOEN
Definition: stm32f4xx.h:3913
void CRYP_IVInit(CRYP_IVInitTypeDef *CRYP_IVInitStruct)
Initializes the CRYP Initialization Vectors(IV) according to the specified parameters in the CRYP_IVI...
uint32_t CRYP_K1LR
uint32_t CRYP_IV1LR
FlagStatus CRYP_GetFlagStatus(uint8_t CRYP_FLAG)
Checks whether the specified CRYP flag is set or not.
void CRYP_FIFOFlush(void)
Flushes the IN and OUT FIFOs (that is read and write pointers of the FIFOs are reset) ...
Definition: stm32f4xx.h:706
#define CRYP
Definition: stm32f4xx.h:2145
uint32_t CRYP_DataType
#define CRYP_AlgoDir_Encrypt
enum FlagStatus ITStatus
uint32_t CRYP_K2LR
uint32_t CRYP_K1RR
uint32_t CRYP_IV0RR
#define __IO
Definition: core_cm0.h:198
#define IS_CRYP_GET_FLAG(FLAG)
#define CRYP_CR_CRYPEN
Definition: stm32f4xx.h:3898
uint32_t CRYP_KeySize
void CRYP_ITConfig(uint8_t CRYP_IT, FunctionalState NewState)
Enables or disables the specified CRYP interrupts.
uint32_t CRYP_K0LR
void CRYP_DMACmd(uint8_t CRYP_DMAReq, FunctionalState NewState)
Enables or disables the CRYP DMA interface.
ITStatus CRYP_GetITStatus(uint8_t CRYP_IT)
Checks whether the specified CRYP interrupt has occurred or not.
#define IS_CRYP_ALGODIR(ALGODIR)
#define IS_CRYP_DATATYPE(DATATYPE)
#define CRYP_CR_ALGOMODE_TDES_CBC
Definition: stm32f4xx.h:3883
ErrorStatus
Definition: stm32f4xx.h:711
uint32_t CRYP_K3LR
void CRYP_KeyStructInit(CRYP_KeyInitTypeDef *CRYP_KeyInitStruct)
Fills each CRYP_KeyInitStruct member with its default value.
void CRYP_DeInit(void)
Deinitializes the CRYP peripheral registers to their default reset values.
FunctionalState CRYP_GetCmdStatus(void)
Returns whether CRYP peripheral is enabled or disabled.
#define CRYP_CR_ALGOMODE_TDES_ECB
Definition: stm32f4xx.h:3882
#define CRYP_SR_OFNE
Definition: stm32f4xx.h:3908
#define IS_CRYP_ALGOMODE(ALGOMODE)
CRYP Key(s) structure definition.
#define CRYP_SR_IFEM
Definition: stm32f4xx.h:3906
This file contains all the functions prototypes for the Cryptographic processor(CRYP) firmware librar...
#define CRYP_CR_GCM_CCMPH
Definition: stm32f4xx.h:3900
#define IS_CRYP_DMAREQ(DMAREQ)
uint32_t CRYP_CSGCMCCMR[8]
#define IS_CRYP_PHASE(PHASE)
uint32_t CRYP_IV1RR
#define CRYP_CR_DATATYPE
Definition: stm32f4xx.h:3891
#define CRYP_CR_FFLUSH
Definition: stm32f4xx.h:3897
CRYP Initialization Vectors (IV) structure definition.
ErrorStatus CRYP_SaveContext(CRYP_Context *CRYP_ContextSave, CRYP_KeyInitTypeDef *CRYP_KeyInitStruct)
Saves the CRYP peripheral Context.
void RCC_AHB2PeriphResetCmd(uint32_t RCC_AHB2Periph, FunctionalState NewState)
Forces or releases AHB2 peripheral reset.
uint32_t CRYP_K2RR
#define CRYP_AlgoMode_TDES_CBC
uint32_t CRYP_AlgoDir
void CRYP_Init(CRYP_InitTypeDef *CRYP_InitStruct)
Initializes the CRYP peripheral according to the specified parameters in the CRYP_InitStruct.
void CRYP_KeyInit(CRYP_KeyInitTypeDef *CRYP_KeyInitStruct)
Initializes the CRYP Keys according to the specified parameters in the CRYP_KeyInitStruct.
#define MAX_TIMEOUT
uint32_t CRYP_K3RR
#define FLAG_MASK
#define CRYP_CR_ALGODIR
Definition: stm32f4xx.h:3876
void CRYP_PhaseConfig(uint32_t CRYP_Phase)
Configures the AES-CCM and AES-GCM phases.
uint32_t CRYP_K0RR
#define CRYP_CR_KEYSIZE
Definition: stm32f4xx.h:3894
CRYP Init structure definition.


rosflight_firmware
Author(s): Daniel Koch , James Jackson
autogenerated on Thu Oct 24 2019 03:17:19