stm32f10x_gpio.c
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1 
22 /* Includes ------------------------------------------------------------------*/
23 #include "stm32f10x_gpio.h"
24 #include "stm32f10x_rcc.h"
25 
47 /* ------------ RCC registers bit address in the alias region ----------------*/
48 #define AFIO_OFFSET (AFIO_BASE - PERIPH_BASE)
49 
50 /* --- EVENTCR Register -----*/
51 
52 /* Alias word address of EVOE bit */
53 #define EVCR_OFFSET (AFIO_OFFSET + 0x00)
54 #define EVOE_BitNumber ((uint8_t)0x07)
55 #define EVCR_EVOE_BB (PERIPH_BB_BASE + (EVCR_OFFSET * 32) + (EVOE_BitNumber * 4))
56 
57 
58 /* --- MAPR Register ---*/
59 /* Alias word address of MII_RMII_SEL bit */
60 #define MAPR_OFFSET (AFIO_OFFSET + 0x04)
61 #define MII_RMII_SEL_BitNumber ((u8)0x17)
62 #define MAPR_MII_RMII_SEL_BB (PERIPH_BB_BASE + (MAPR_OFFSET * 32) + (MII_RMII_SEL_BitNumber * 4))
63 
64 
65 #define EVCR_PORTPINCONFIG_MASK ((uint16_t)0xFF80)
66 #define LSB_MASK ((uint16_t)0xFFFF)
67 #define DBGAFR_POSITION_MASK ((uint32_t)0x000F0000)
68 #define DBGAFR_SWJCFG_MASK ((uint32_t)0xF0FFFFFF)
69 #define DBGAFR_LOCATION_MASK ((uint32_t)0x00200000)
70 #define DBGAFR_NUMBITS_MASK ((uint32_t)0x00100000)
71 
109 {
110  /* Check the parameters */
112 
113  if (GPIOx == GPIOA)
114  {
117  }
118  else if (GPIOx == GPIOB)
119  {
122  }
123  else if (GPIOx == GPIOC)
124  {
127  }
128  else if (GPIOx == GPIOD)
129  {
132  }
133  else if (GPIOx == GPIOE)
134  {
137  }
138  else if (GPIOx == GPIOF)
139  {
142  }
143  else
144  {
145  if (GPIOx == GPIOG)
146  {
149  }
150  }
151 }
152 
159 void GPIO_AFIODeInit(void)
160 {
163 }
164 
173 void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct)
174 {
175  uint32_t currentmode = 0x00, currentpin = 0x00, pinpos = 0x00, pos = 0x00;
176  uint32_t tmpreg = 0x00, pinmask = 0x00;
177  /* Check the parameters */
179  assert_param(IS_GPIO_MODE(GPIO_InitStruct->GPIO_Mode));
180  assert_param(IS_GPIO_PIN(GPIO_InitStruct->GPIO_Pin));
181 
182 /*---------------------------- GPIO Mode Configuration -----------------------*/
183  currentmode = ((uint32_t)GPIO_InitStruct->GPIO_Mode) & ((uint32_t)0x0F);
184  if ((((uint32_t)GPIO_InitStruct->GPIO_Mode) & ((uint32_t)0x10)) != 0x00)
185  {
186  /* Check the parameters */
187  assert_param(IS_GPIO_SPEED(GPIO_InitStruct->GPIO_Speed));
188  /* Output mode */
189  currentmode |= (uint32_t)GPIO_InitStruct->GPIO_Speed;
190  }
191 /*---------------------------- GPIO CRL Configuration ------------------------*/
192  /* Configure the eight low port pins */
193  if (((uint32_t)GPIO_InitStruct->GPIO_Pin & ((uint32_t)0x00FF)) != 0x00)
194  {
195  tmpreg = GPIOx->CRL;
196  for (pinpos = 0x00; pinpos < 0x08; pinpos++)
197  {
198  pos = ((uint32_t)0x01) << pinpos;
199  /* Get the port pins position */
200  currentpin = (GPIO_InitStruct->GPIO_Pin) & pos;
201  if (currentpin == pos)
202  {
203  pos = pinpos << 2;
204  /* Clear the corresponding low control register bits */
205  pinmask = ((uint32_t)0x0F) << pos;
206  tmpreg &= ~pinmask;
207  /* Write the mode configuration in the corresponding bits */
208  tmpreg |= (currentmode << pos);
209  /* Reset the corresponding ODR bit */
210  if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPD)
211  {
212  GPIOx->BRR = (((uint32_t)0x01) << pinpos);
213  }
214  else
215  {
216  /* Set the corresponding ODR bit */
217  if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPU)
218  {
219  GPIOx->BSRR = (((uint32_t)0x01) << pinpos);
220  }
221  }
222  }
223  }
224  GPIOx->CRL = tmpreg;
225  }
226 /*---------------------------- GPIO CRH Configuration ------------------------*/
227  /* Configure the eight high port pins */
228  if (GPIO_InitStruct->GPIO_Pin > 0x00FF)
229  {
230  tmpreg = GPIOx->CRH;
231  for (pinpos = 0x00; pinpos < 0x08; pinpos++)
232  {
233  pos = (((uint32_t)0x01) << (pinpos + 0x08));
234  /* Get the port pins position */
235  currentpin = ((GPIO_InitStruct->GPIO_Pin) & pos);
236  if (currentpin == pos)
237  {
238  pos = pinpos << 2;
239  /* Clear the corresponding high control register bits */
240  pinmask = ((uint32_t)0x0F) << pos;
241  tmpreg &= ~pinmask;
242  /* Write the mode configuration in the corresponding bits */
243  tmpreg |= (currentmode << pos);
244  /* Reset the corresponding ODR bit */
245  if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPD)
246  {
247  GPIOx->BRR = (((uint32_t)0x01) << (pinpos + 0x08));
248  }
249  /* Set the corresponding ODR bit */
250  if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPU)
251  {
252  GPIOx->BSRR = (((uint32_t)0x01) << (pinpos + 0x08));
253  }
254  }
255  }
256  GPIOx->CRH = tmpreg;
257  }
258 }
259 
266 void GPIO_StructInit(GPIO_InitTypeDef* GPIO_InitStruct)
267 {
268  /* Reset GPIO init structure parameters values */
269  GPIO_InitStruct->GPIO_Pin = GPIO_Pin_All;
270  GPIO_InitStruct->GPIO_Speed = GPIO_Speed_2MHz;
271  GPIO_InitStruct->GPIO_Mode = GPIO_Mode_IN_FLOATING;
272 }
273 
281 uint8_t GPIO_ReadInputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
282 {
283  uint8_t bitstatus = 0x00;
284 
285  /* Check the parameters */
287  assert_param(IS_GET_GPIO_PIN(GPIO_Pin));
288 
289  if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)Bit_RESET)
290  {
291  bitstatus = (uint8_t)Bit_SET;
292  }
293  else
294  {
295  bitstatus = (uint8_t)Bit_RESET;
296  }
297  return bitstatus;
298 }
299 
306 {
307  /* Check the parameters */
309 
310  return ((uint16_t)GPIOx->IDR);
311 }
312 
321 {
322  uint8_t bitstatus = 0x00;
323  /* Check the parameters */
325  assert_param(IS_GET_GPIO_PIN(GPIO_Pin));
326 
327  if ((GPIOx->ODR & GPIO_Pin) != (uint32_t)Bit_RESET)
328  {
329  bitstatus = (uint8_t)Bit_SET;
330  }
331  else
332  {
333  bitstatus = (uint8_t)Bit_RESET;
334  }
335  return bitstatus;
336 }
337 
344 {
345  /* Check the parameters */
347 
348  return ((uint16_t)GPIOx->ODR);
349 }
350 
358 void GPIO_SetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
359 {
360  /* Check the parameters */
362  assert_param(IS_GPIO_PIN(GPIO_Pin));
363 
364  GPIOx->BSRR = GPIO_Pin;
365 }
366 
374 void GPIO_ResetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
375 {
376  /* Check the parameters */
378  assert_param(IS_GPIO_PIN(GPIO_Pin));
379 
380  GPIOx->BRR = GPIO_Pin;
381 }
382 
394 void GPIO_WriteBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, BitAction BitVal)
395 {
396  /* Check the parameters */
398  assert_param(IS_GET_GPIO_PIN(GPIO_Pin));
400 
401  if (BitVal != Bit_RESET)
402  {
403  GPIOx->BSRR = GPIO_Pin;
404  }
405  else
406  {
407  GPIOx->BRR = GPIO_Pin;
408  }
409 }
410 
417 void GPIO_Write(GPIO_TypeDef* GPIOx, uint16_t PortVal)
418 {
419  /* Check the parameters */
421 
422  GPIOx->ODR = PortVal;
423 }
424 
433 {
434  uint32_t tmp = 0x00010000;
435 
436  /* Check the parameters */
438  assert_param(IS_GPIO_PIN(GPIO_Pin));
439 
440  tmp |= GPIO_Pin;
441  /* Set LCKK bit */
442  GPIOx->LCKR = tmp;
443  /* Reset LCKK bit */
444  GPIOx->LCKR = GPIO_Pin;
445  /* Set LCKK bit */
446  GPIOx->LCKR = tmp;
447  /* Read LCKK bit*/
448  tmp = GPIOx->LCKR;
449  /* Read LCKK bit*/
450  tmp = GPIOx->LCKR;
451 }
452 
462 void GPIO_EventOutputConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource)
463 {
464  uint32_t tmpreg = 0x00;
465  /* Check the parameters */
466  assert_param(IS_GPIO_EVENTOUT_PORT_SOURCE(GPIO_PortSource));
467  assert_param(IS_GPIO_PIN_SOURCE(GPIO_PinSource));
468 
469  tmpreg = AFIO->EVCR;
470  /* Clear the PORT[6:4] and PIN[3:0] bits */
471  tmpreg &= EVCR_PORTPINCONFIG_MASK;
472  tmpreg |= (uint32_t)GPIO_PortSource << 0x04;
473  tmpreg |= GPIO_PinSource;
474  AFIO->EVCR = tmpreg;
475 }
476 
484 {
485  /* Check the parameters */
487 
488  *(__IO uint32_t *) EVCR_EVOE_BB = (uint32_t)NewState;
489 }
490 
549 void GPIO_PinRemapConfig(uint32_t GPIO_Remap, FunctionalState NewState)
550 {
551  uint32_t tmp = 0x00, tmp1 = 0x00, tmpreg = 0x00, tmpmask = 0x00;
552 
553  /* Check the parameters */
554  assert_param(IS_GPIO_REMAP(GPIO_Remap));
555  assert_param(IS_FUNCTIONAL_STATE(NewState));
556 
557  if((GPIO_Remap & 0x80000000) == 0x80000000)
558  {
559  tmpreg = AFIO->MAPR2;
560  }
561  else
562  {
563  tmpreg = AFIO->MAPR;
564  }
565 
566  tmpmask = (GPIO_Remap & DBGAFR_POSITION_MASK) >> 0x10;
567  tmp = GPIO_Remap & LSB_MASK;
568 
570  {
571  tmpreg &= DBGAFR_SWJCFG_MASK;
572  AFIO->MAPR &= DBGAFR_SWJCFG_MASK;
573  }
574  else if ((GPIO_Remap & DBGAFR_NUMBITS_MASK) == DBGAFR_NUMBITS_MASK)
575  {
576  tmp1 = ((uint32_t)0x03) << tmpmask;
577  tmpreg &= ~tmp1;
578  tmpreg |= ~DBGAFR_SWJCFG_MASK;
579  }
580  else
581  {
582  tmpreg &= ~(tmp << ((GPIO_Remap >> 0x15)*0x10));
583  tmpreg |= ~DBGAFR_SWJCFG_MASK;
584  }
585 
586  if (NewState != DISABLE)
587  {
588  tmpreg |= (tmp << ((GPIO_Remap >> 0x15)*0x10));
589  }
590 
591  if((GPIO_Remap & 0x80000000) == 0x80000000)
592  {
593  AFIO->MAPR2 = tmpreg;
594  }
595  else
596  {
597  AFIO->MAPR = tmpreg;
598  }
599 }
600 
609 void GPIO_EXTILineConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource)
610 {
611  uint32_t tmp = 0x00;
612  /* Check the parameters */
613  assert_param(IS_GPIO_EXTI_PORT_SOURCE(GPIO_PortSource));
614  assert_param(IS_GPIO_PIN_SOURCE(GPIO_PinSource));
615 
616  tmp = ((uint32_t)0x0F) << (0x04 * (GPIO_PinSource & (uint8_t)0x03));
617  AFIO->EXTICR[GPIO_PinSource >> 0x02] &= ~tmp;
618  AFIO->EXTICR[GPIO_PinSource >> 0x02] |= (((uint32_t)GPIO_PortSource) << (0x04 * (GPIO_PinSource & (uint8_t)0x03)));
619 }
620 
630 void GPIO_ETH_MediaInterfaceConfig(uint32_t GPIO_ETH_MediaInterface)
631 {
632  assert_param(IS_GPIO_ETH_MEDIA_INTERFACE(GPIO_ETH_MediaInterface));
633 
634  /* Configure MII_RMII selection bit */
635  *(__IO uint32_t *) MAPR_MII_RMII_SEL_BB = GPIO_ETH_MediaInterface;
636 }
637 
650 /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
void GPIO_PinRemapConfig(uint32_t GPIO_Remap, FunctionalState NewState)
Changes the mapping of the specified pin.
#define IS_GPIO_EVENTOUT_PORT_SOURCE(PORTSOURCE)
#define RCC_APB2Periph_GPIOD
FunctionalState
Definition: stm32f4xx.h:708
__IO uint32_t ODR
Definition: stm32f4xx.h:1288
#define DBGAFR_LOCATION_MASK
void GPIO_Write(GPIO_TypeDef *GPIOx, uint16_t PortVal)
Writes data to the specified GPIO data port.
#define GPIOA
Definition: stm32f4xx.h:2110
#define IS_GPIO_REMAP(REMAP)
void GPIO_StructInit(GPIO_InitTypeDef *GPIO_InitStruct)
Fills each GPIO_InitStruct member with its default value.
#define LSB_MASK
BitAction
GPIO Bit SET and Bit RESET enumeration.
__IO uint32_t CRL
Definition: stm32f10x.h:1003
#define GPIOB
Definition: stm32f4xx.h:2111
#define GPIOG
Definition: stm32f4xx.h:2116
#define EVCR_EVOE_BB
__IO uint32_t CRH
Definition: stm32f10x.h:1004
#define RCC_APB2Periph_GPIOB
#define DBGAFR_POSITION_MASK
void assert_param(int val)
#define DBGAFR_NUMBITS_MASK
uint16_t GPIO_ReadInputData(GPIO_TypeDef *GPIOx)
Reads the specified GPIO input data port.
void GPIO_EventOutputCmd(FunctionalState NewState)
Enables or disables the Event Output.
#define GPIOC
Definition: stm32f4xx.h:2112
#define IS_FUNCTIONAL_STATE(STATE)
Definition: stm32f4xx.h:709
This file contains all the functions prototypes for the GPIO firmware library.
#define RCC_APB2Periph_GPIOG
void GPIO_EventOutputConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource)
Selects the GPIO pin used as Event output.
void GPIO_DeInit(GPIO_TypeDef *GPIOx)
Deinitializes the GPIOx peripheral registers to their default reset values.
void GPIO_ETH_MediaInterfaceConfig(uint32_t GPIO_ETH_MediaInterface)
Selects the Ethernet media interface.
void GPIO_AFIODeInit(void)
Deinitializes the Alternate Functions (remap, event control and EXTI configuration) registers to thei...
General Purpose I/O.
Definition: stm32f4xx.h:1281
void GPIO_WriteBit(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, BitAction BitVal)
Sets or clears the selected data port bit.
#define GPIOD
Definition: stm32f4xx.h:2113
#define __IO
Definition: core_cm0.h:198
uint16_t GPIO_ReadOutputData(GPIO_TypeDef *GPIOx)
Reads the specified GPIO output data port.
GPIO_Pin
Definition: drv_gpio.h:41
#define RCC_APB2Periph_AFIO
#define RCC_APB2Periph_GPIOA
void GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_InitStruct)
Initializes the GPIOx peripheral according to the specified parameters in the GPIO_InitStruct.
#define IS_GPIO_ETH_MEDIA_INTERFACE(INTERFACE)
void GPIO_EXTILineConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource)
Selects the GPIO pin used as EXTI Line.
This file contains all the functions prototypes for the RCC firmware library.
#define GPIOF
Definition: stm32f4xx.h:2115
#define RCC_APB2Periph_GPIOE
uint8_t GPIO_ReadOutputDataBit(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
Reads the specified output data port bit.
void RCC_APB2PeriphResetCmd(uint32_t RCC_APB2Periph, FunctionalState NewState)
Forces or releases High Speed APB (APB2) peripheral reset.
void GPIO_PinLockConfig(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
Locks GPIO Pins configuration registers.
#define GPIOE
Definition: stm32f4xx.h:2114
void GPIO_ResetBits(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
Clears the selected data port bits.
__IO uint32_t LCKR
Definition: stm32f4xx.h:1291
#define DBGAFR_SWJCFG_MASK
#define EVCR_PORTPINCONFIG_MASK
uint8_t GPIO_ReadInputDataBit(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
Reads the specified input port pin.
void GPIO_SetBits(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
Sets the selected data port bits.
#define RCC_APB2Periph_GPIOC
#define RCC_APB2Periph_GPIOF
__IO uint32_t BSRR
Definition: stm32f10x.h:1007
__IO uint32_t BRR
Definition: stm32f10x.h:1008
#define MAPR_MII_RMII_SEL_BB
__IO uint32_t IDR
Definition: stm32f4xx.h:1287
#define AFIO
Definition: stm32f10x.h:1406
#define IS_GPIO_EXTI_PORT_SOURCE(PORTSOURCE)


rosflight_firmware
Author(s): Daniel Koch , James Jackson
autogenerated on Thu Oct 24 2019 03:17:19