stm32f10x_cec.c
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1 
22 /* Includes ------------------------------------------------------------------*/
23 #include "stm32f10x_cec.h"
24 #include "stm32f10x_rcc.h"
25 
48 /* ------------ CEC registers bit address in the alias region ----------- */
49 #define CEC_OFFSET (CEC_BASE - PERIPH_BASE)
50 
51 /* --- CFGR Register ---*/
52 
53 /* Alias word address of PE bit */
54 #define CFGR_OFFSET (CEC_OFFSET + 0x00)
55 #define PE_BitNumber 0x00
56 #define CFGR_PE_BB (PERIPH_BB_BASE + (CFGR_OFFSET * 32) + (PE_BitNumber * 4))
57 
58 /* Alias word address of IE bit */
59 #define IE_BitNumber 0x01
60 #define CFGR_IE_BB (PERIPH_BB_BASE + (CFGR_OFFSET * 32) + (IE_BitNumber * 4))
61 
62 /* --- CSR Register ---*/
63 
64 /* Alias word address of TSOM bit */
65 #define CSR_OFFSET (CEC_OFFSET + 0x10)
66 #define TSOM_BitNumber 0x00
67 #define CSR_TSOM_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (TSOM_BitNumber * 4))
68 
69 /* Alias word address of TEOM bit */
70 #define TEOM_BitNumber 0x01
71 #define CSR_TEOM_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (TEOM_BitNumber * 4))
72 
73 #define CFGR_CLEAR_Mask (uint8_t)(0xF3) /* CFGR register Mask */
74 #define FLAG_Mask ((uint32_t)0x00FFFFFF) /* CEC FLAG mask */
75 
118 void CEC_DeInit(void)
119 {
120  /* Enable CEC reset state */
122  /* Release CEC from reset state */
124 }
125 
126 
135 void CEC_Init(CEC_InitTypeDef* CEC_InitStruct)
136 {
137  uint16_t tmpreg = 0;
138 
139  /* Check the parameters */
142 
143  /*---------------------------- CEC CFGR Configuration -----------------*/
144  /* Get the CEC CFGR value */
145  tmpreg = CEC->CFGR;
146 
147  /* Clear BTEM and BPEM bits */
148  tmpreg &= CFGR_CLEAR_Mask;
149 
150  /* Configure CEC: Bit Timing Error and Bit Period Error */
151  tmpreg |= (uint16_t)(CEC_InitStruct->CEC_BitTimingMode | CEC_InitStruct->CEC_BitPeriodMode);
152 
153  /* Write to CEC CFGR register*/
154  CEC->CFGR = tmpreg;
155 
156 }
157 
164 void CEC_Cmd(FunctionalState NewState)
165 {
166  /* Check the parameters */
168 
169  *(__IO uint32_t *) CFGR_PE_BB = (uint32_t)NewState;
170 
171  if(NewState == DISABLE)
172  {
173  /* Wait until the PE bit is cleared by hardware (Idle Line detected) */
174  while((CEC->CFGR & CEC_CFGR_PE) != (uint32_t)RESET)
175  {
176  }
177  }
178 }
179 
187 {
188  /* Check the parameters */
190 
191  *(__IO uint32_t *) CFGR_IE_BB = (uint32_t)NewState;
192 }
193 
199 void CEC_OwnAddressConfig(uint8_t CEC_OwnAddress)
200 {
201  /* Check the parameters */
202  assert_param(IS_CEC_ADDRESS(CEC_OwnAddress));
203 
204  /* Set the CEC own address */
205  CEC->OAR = CEC_OwnAddress;
206 }
207 
213 void CEC_SetPrescaler(uint16_t CEC_Prescaler)
214 {
215  /* Check the parameters */
216  assert_param(IS_CEC_PRESCALER(CEC_Prescaler));
217 
218  /* Set the Prescaler value*/
219  CEC->PRES = CEC_Prescaler;
220 }
221 
227 void CEC_SendDataByte(uint8_t Data)
228 {
229  /* Transmit Data */
230  CEC->TXD = Data ;
231 }
232 
233 
239 uint8_t CEC_ReceiveDataByte(void)
240 {
241  /* Receive Data */
242  return (uint8_t)(CEC->RXD);
243 }
244 
251 {
252  /* Starts of new message */
253  *(__IO uint32_t *) CSR_TSOM_BB = (uint32_t)0x1;
254 }
255 
263 {
264  /* Check the parameters */
266 
267  /* The data byte will be transmitted with or without an EOM bit*/
268  *(__IO uint32_t *) CSR_TEOM_BB = (uint32_t)NewState;
269 }
270 
291 FlagStatus CEC_GetFlagStatus(uint32_t CEC_FLAG)
292 {
293  FlagStatus bitstatus = RESET;
294  uint32_t cecreg = 0, cecbase = 0;
295 
296  /* Check the parameters */
297  assert_param(IS_CEC_GET_FLAG(CEC_FLAG));
298 
299  /* Get the CEC peripheral base address */
300  cecbase = (uint32_t)(CEC_BASE);
301 
302  /* Read flag register index */
303  cecreg = CEC_FLAG >> 28;
304 
305  /* Get bit[23:0] of the flag */
306  CEC_FLAG &= FLAG_Mask;
307 
308  if(cecreg != 0)
309  {
310  /* Flag in CEC ESR Register */
311  CEC_FLAG = (uint32_t)(CEC_FLAG >> 16);
312 
313  /* Get the CEC ESR register address */
314  cecbase += 0xC;
315  }
316  else
317  {
318  /* Get the CEC CSR register address */
319  cecbase += 0x10;
320  }
321 
322  if(((*(__IO uint32_t *)cecbase) & CEC_FLAG) != (uint32_t)RESET)
323  {
324  /* CEC_FLAG is set */
325  bitstatus = SET;
326  }
327  else
328  {
329  /* CEC_FLAG is reset */
330  bitstatus = RESET;
331  }
332 
333  /* Return the CEC_FLAG status */
334  return bitstatus;
335 }
336 
349 void CEC_ClearFlag(uint32_t CEC_FLAG)
350 {
351  uint32_t tmp = 0x0;
352 
353  /* Check the parameters */
354  assert_param(IS_CEC_CLEAR_FLAG(CEC_FLAG));
355 
356  tmp = CEC->CSR & 0x2;
357 
358  /* Clear the selected CEC flags */
359  CEC->CSR &= (uint32_t)(((~(uint32_t)CEC_FLAG) & 0xFFFFFFFC) | tmp);
360 }
361 
372 ITStatus CEC_GetITStatus(uint8_t CEC_IT)
373 {
374  ITStatus bitstatus = RESET;
375  uint32_t enablestatus = 0;
376 
377  /* Check the parameters */
378  assert_param(IS_CEC_GET_IT(CEC_IT));
379 
380  /* Get the CEC IT enable bit status */
381  enablestatus = (CEC->CFGR & (uint8_t)CEC_CFGR_IE) ;
382 
383  /* Check the status of the specified CEC interrupt */
384  if (((CEC->CSR & CEC_IT) != (uint32_t)RESET) && enablestatus)
385  {
386  /* CEC_IT is set */
387  bitstatus = SET;
388  }
389  else
390  {
391  /* CEC_IT is reset */
392  bitstatus = RESET;
393  }
394  /* Return the CEC_IT status */
395  return bitstatus;
396 }
397 
408 void CEC_ClearITPendingBit(uint16_t CEC_IT)
409 {
410  uint32_t tmp = 0x0;
411 
412  /* Check the parameters */
413  assert_param(IS_CEC_GET_IT(CEC_IT));
414 
415  tmp = CEC->CSR & 0x2;
416 
417  /* Clear the selected CEC interrupt pending bits */
418  CEC->CSR &= (uint32_t)(((~(uint32_t)CEC_IT) & 0xFFFFFFFC) | tmp);
419 }
420 
433 /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
FlagStatus
Definition: stm32f4xx.h:706
#define CEC_CFGR_PE
Definition: stm32f10x.h:4144
uint16_t CEC_BitPeriodMode
Definition: stm32f10x_cec.h:54
#define CEC_BASE
Definition: stm32f10x.h:1311
FunctionalState
Definition: stm32f4xx.h:708
void CEC_ITConfig(FunctionalState NewState)
Enables or disables the CEC interrupt.
#define IS_CEC_CLEAR_FLAG(FLAG)
#define CEC_CFGR_IE
Definition: stm32f10x.h:4145
#define CFGR_CLEAR_Mask
Definition: stm32f10x_cec.c:73
void CEC_OwnAddressConfig(uint8_t CEC_OwnAddress)
Defines the Own Address of the CEC device.
void CEC_Cmd(FunctionalState NewState)
Enables or disables the specified CEC peripheral.
void CEC_DeInit(void)
Deinitializes the CEC peripheral registers to their default reset values.
#define IS_CEC_ADDRESS(ADDRESS)
void assert_param(int val)
#define IS_CEC_BIT_TIMING_ERROR_MODE(MODE)
Definition: stm32f10x_cec.h:72
#define IS_FUNCTIONAL_STATE(STATE)
Definition: stm32f4xx.h:709
#define IS_CEC_GET_IT(IT)
Definition: stm32f10x_cec.h:98
#define CEC
Definition: stm32f10x.h:1405
ITStatus CEC_GetITStatus(uint8_t CEC_IT)
Checks whether the specified CEC interrupt has occurred or not.
Definition: stm32f4xx.h:706
enum FlagStatus ITStatus
void RCC_APB1PeriphResetCmd(uint32_t RCC_APB1Periph, FunctionalState NewState)
Forces or releases Low Speed APB (APB1) peripheral reset.
#define CSR_TSOM_BB
Definition: stm32f10x_cec.c:67
#define FLAG_Mask
Definition: stm32f10x_cec.c:74
#define __IO
Definition: core_cm0.h:198
uint16_t CEC_BitTimingMode
Definition: stm32f10x_cec.h:52
void CEC_StartOfMessage(void)
Starts a new message.
#define RCC_APB1Periph_CEC
#define IS_CEC_PRESCALER(PRESCALER)
void CEC_SendDataByte(uint8_t Data)
Transmits single data through the CEC peripheral.
This file contains all the functions prototypes for the CEC firmware library.
#define IS_CEC_BIT_PERIOD_ERROR_MODE(MODE)
Definition: stm32f10x_cec.h:84
void CEC_SetPrescaler(uint16_t CEC_Prescaler)
Sets the CEC prescaler value.
#define IS_CEC_GET_FLAG(FLAG)
This file contains all the functions prototypes for the RCC firmware library.
FlagStatus CEC_GetFlagStatus(uint32_t CEC_FLAG)
Gets the CEC flag status.
#define CFGR_PE_BB
Definition: stm32f10x_cec.c:56
void CEC_ClearITPendingBit(uint16_t CEC_IT)
Clears the CEC's interrupt pending bits.
void CEC_ClearFlag(uint32_t CEC_FLAG)
Clears the CEC's pending flags.
void CEC_EndOfMessageCmd(FunctionalState NewState)
Transmits message with or without an EOM bit.
#define CSR_TEOM_BB
Definition: stm32f10x_cec.c:71
void CEC_Init(CEC_InitTypeDef *CEC_InitStruct)
Initializes the CEC peripheral according to the specified parameters in the CEC_InitStruct.
#define CFGR_IE_BB
Definition: stm32f10x_cec.c:60
uint8_t CEC_ReceiveDataByte(void)
Returns the most recent received data by the CEC peripheral.
CEC Init structure definition.
Definition: stm32f10x_cec.h:50


rosflight_firmware
Author(s): Daniel Koch , James Jackson
autogenerated on Thu Oct 24 2019 03:17:19