revo_f4.h
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1 /*
2  * Copyright (c) 2017, James Jackson
3  *
4  * All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions are met:
8  *
9  * * Redistributions of source code must retain the above copyright notice, this
10  * list of conditions and the following disclaimer.
11  *
12  * * Redistributions in binary form must reproduce the above copyright notice,
13  * this list of conditions and the following disclaimer in the documentation
14  * and/or other materials provided with the distribution.
15  *
16  * * Neither the name of the copyright holder nor the names of its
17  * contributors may be used to endorse or promote products derived from
18  * this software without specific prior written permission.
19  *
20  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
23  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
24  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
26  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
27  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
28  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
29  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 #ifndef REVO_F4_H
33 #define REVO_F4_H
34 
35 #include "system.h"
36 
41 
43 #define NUM_UART 3
44 // typedef struct {
45 // USART_TypeDef* dev;
46 // GPIO_TypeDef* GPIO;
47 // uint16_t Rx_Pin;
48 // uint16_t Tx_Pin;
49 // uint8_t Rx_PinSource;
50 // uint8_t Tx_PinSource;
51 // uint8_t GPIO_AF;
52 // IRQn_Type USART_IRQn;
53 // IRQn_Type Rx_DMA_IRQn;
54 // IRQn_Type Tx_DMA_IRQn;
55 // DMA_Stream_TypeDef* Rx_DMA_Stream;
56 // DMA_Stream_TypeDef* Tx_DMA_Stream;
57 // uint32_t DMA_CHannel;
58 // uint32_t DMA_Rx_IT_Bit;
59 // uint32_t DMA_Tx_IT_Bit;
60 //} uart_hardware_struct_t;
61 #define UART1 0
62 #define UART2 1
63 #define UART3 2
66  GPIO_AF_USART1, USART1_IRQn, DMA2_Stream5_IRQn, DMA2_Stream7_IRQn, DMA2_Stream5, //main port?
69  GPIO_AF_USART2, USART2_IRQn, DMA1_Stream5_IRQn, DMA1_Stream6_IRQn, DMA1_Stream5, //Flex-IO port?
72  GPIO_AF_USART3, USART3_IRQn, DMA1_Stream1_IRQn, DMA1_Stream3_IRQn, DMA1_Stream1, //Flexi port?
74 };
75 
76 #define SBUS_UART 0
77 #define SBUS_INV_GPIO GPIOC
78 #define SBUS_INV_PIN GPIO_Pin_0
79 
81 #define NUM_SPI 3
82 // typedef struct {
83 // SPI_TypeDef* dev;
84 // GPIO_TypeDef* GPIO;
85 // uint8_t SCK_PinSource;
86 // uint16_t SCK_Pin;
87 // uint8_t MOSI_PinSource;
88 // uint16_t MOSI_Pin;
89 // uint8_t MISO_PinSource;
90 // uint16_t MISO_Pin;
91 // uint8_t GPIO_AF;
92 // IRQn_Type DMA_IRQn;
93 // DMA_Stream_TypeDef* Tx_DMA_Stream;
94 // DMA_Stream_TypeDef* Rx_DMA_Stream;
95 // uint32_t DMA_Channel;
96 // uint32_t Tx_DMA_TCIF;
97 // uint32_t Rx_DMA_TCIF;
98 //} spi_hardware_struct_t;
106 #define MPU6000_SPI 0
107 #define MPU6000_CS_GPIO GPIOA
108 #define MPU6000_CS_PIN GPIO_Pin_4
109 
110 #define FLASH_SPI 2
111 #define FLASH_CS_GPIO GPIOB
112 #define FLASH_CS_PIN GPIO_Pin_3
113 
115 #define NUM_I2C 2
117  {I2C1, 400000, I2C1_EV_IRQn, I2C1_ER_IRQn, GPIOB, GPIO_AF_I2C1, GPIO_PinSource8, GPIO_Pin_8, GPIO_PinSource9,
119  {I2C2, 100000, I2C2_EV_IRQn, I2C2_ER_IRQn, GPIOB, GPIO_AF_I2C2, GPIO_PinSource10, GPIO_Pin_10, GPIO_PinSource11,
121 #define MAG_I2C 0
122 #define BARO_I2C 0
123 #define EXTERNAL_I2C 1
124 
126 #define LED1_GPIO GPIOB
127 #define LED1_PIN GPIO_Pin_4
128 #define LED2_GPIO GPIOB
129 #define LED2_PIN GPIO_Pin_5
130 
132 #define PWM_NUM_CHANNELS 13
133 #define PWM_NUM_OUTPUTS 10
134 // typedef struct {
135 // GPIO_TypeDef* GPIO;
136 // uint16_t GPIO_Pin;
137 // uint8_t GPIO_PinSource;
138 // TIM_TypeDef* TIM;
139 // uint8_t TIM_Channel;
140 // uint8_t GIPO_AF_TIM;
141 // IRQn_Type TIM_IRQn;
142 // uint16_t TIM_IT_CC;
143 //} pwm_hardware_struct_t;
145  {
146  GPIOB,
147  GPIO_Pin_0,
149  TIM3,
151  GPIO_AF_TIM3,
152  TIM3_IRQn,
153  TIM_IT_CC3,
154  }, // PWM1
155  {
156  GPIOB,
157  GPIO_Pin_1,
159  TIM3,
161  GPIO_AF_TIM3,
162  TIM3_IRQn,
163  TIM_IT_CC4,
164  }, // PWM2
165  {
166  GPIOA,
167  GPIO_Pin_3,
169  TIM9,
171  GPIO_AF_TIM9,
172  TIM1_BRK_TIM9_IRQn,
173  TIM_IT_CC2,
174  }, // PWM3
175  {
176  GPIOA,
177  GPIO_Pin_2,
179  TIM2,
181  GPIO_AF_TIM2,
182  TIM2_IRQn,
183  TIM_IT_CC3,
184  }, // PWM4
185  {
186  GPIOA,
187  GPIO_Pin_1,
189  TIM5,
191  GPIO_AF_TIM5,
192  TIM5_IRQn,
193  TIM_IT_CC2,
194  }, // PWM5
195  {
196  GPIOA,
197  GPIO_Pin_0,
199  TIM5,
201  GPIO_AF_TIM5,
202  TIM5_IRQn,
203  TIM_IT_CC1,
204  }, // PWM6
205  {
206  GPIOC,
207  GPIO_Pin_9,
209  TIM8,
211  GPIO_AF_TIM8,
212  TIM8_CC_IRQn,
213  TIM_IT_CC4,
214  }, // RC 6 (Flexi-10)
215  {
216  GPIOC,
217  GPIO_Pin_8,
219  TIM8,
221  GPIO_AF_TIM8,
222  TIM8_CC_IRQn,
223  TIM_IT_CC3,
224  }, // RC 5 (Flexi-9)
225  {
226  GPIOC,
227  GPIO_Pin_7,
229  TIM8,
231  GPIO_AF_TIM8,
232  TIM8_CC_IRQn,
233  TIM_IT_CC2,
234  }, // RC 4 (Flexi-8)
235  {
236  GPIOC,
237  GPIO_Pin_6,
239  TIM8,
241  GPIO_AF_TIM8,
242  TIM8_CC_IRQn,
243  TIM_IT_CC1,
244  }, // RC 3 (Flexi-7)
245  {
246  GPIOB,
247  GPIO_Pin_15,
249  TIM12,
252  TIM8_BRK_TIM12_IRQn,
253  TIM_IT_CC2,
254  }, // RC2 (Flexi-6) // Note: Conflicts with PPM. Do not use if PPM is enabled. This may cause unsafe behavior
255  {
256  GPIOB,
257  GPIO_Pin_14,
259  TIM12,
262  TIM8_BRK_TIM12_IRQn,
263  TIM_IT_CC1,
264  }, // RC1 (Flexi-5) // Used for PPM RC
265  {
266  GPIOA,
267  GPIO_Pin_8,
269  TIM1,
271  GPIO_AF_TIM1,
272  TIM1_CC_IRQn,
273  TIM_IT_CC1,
274  }, // Buzzer
275 };
276 #define RC_PPM_PIN 11
277 #define PPM_RC_IQRHandler TIM8_BRK_TIM12_IRQHandler
278 
280 #define ADC_NUM 3
282  {ADC1, DMA2_Stream0, DMA_Channel_0}, // could use DMA2 streams 0 or 4, channel 0 on both
283  // Note that ADC2 conflicts with SPI1 over the DMA. Do not use both at the same time,
284  // unless you change one or the other to not use the DMA
285  // At time of this writing, SPI1 is the IMU, so don't break it
286  {ADC2, DMA2_Stream2, DMA_Channel_1}, // could use DMA2 streams 2 or 3, channel 1 on both
287  {ADC3, DMA2_Stream1, DMA_Channel_2} // could use DMA2 streams 0 or 1, channel 2 on both
288 };
289 
291  GPIO_Pin_1, ADC_Channel_11, &adc_config[0]};
292 
293 #endif // REVO_F4_H
#define ADC3
Definition: stm32f4xx.h:2085
#define TIM_IT_CC3
#define DMA_IT_TCIF5
#define DMA1_Stream6
Definition: stm32f4xx.h:2131
#define TIM_IT_CC4
#define DMA1_Stream5
Definition: stm32f4xx.h:2130
#define GPIO_AF_TIM3
AF 2 selection.
#define SPI2
Definition: stm32f4xx.h:2050
#define DMA_FLAG_TCIF4
#define TIM1
Definition: stm32f4xx.h:2078
#define DMA_Channel_0
#define SPI1
Definition: stm32f4xx.h:2087
#define TIM_Channel_3
#define GPIOA
Definition: stm32f4xx.h:2110
#define SPI3
Definition: stm32f4xx.h:2051
#define TIM3
Definition: stm32f4xx.h:2038
#define TIM12
Definition: stm32f4xx.h:2043
const ADCHardwareStruct adc_config[ADC_NUM]
Definition: revo_f4.h:281
#define TIM9
Definition: stm32f4xx.h:2091
#define GPIO_AF_TIM1
AF 1 selection.
#define TIM2
Definition: stm32f4xx.h:2037
#define TIM8
Definition: stm32f4xx.h:2079
#define DMA_FLAG_TCIF2
#define GPIOB
Definition: stm32f4xx.h:2111
#define DMA_IT_TCIF3
const BatteryMonitorHardwareStruct battery_monitor_config
Definition: revo_f4.h:290
#define GPIO_AF_TIM8
AF 3 selection.
#define ADC_Channel_12
#define DMA1_Stream3
Definition: stm32f4xx.h:2128
#define TIM_Channel_2
#define DMA_Channel_4
#define ADC2
Definition: stm32f4xx.h:2084
#define DMA_IT_TCIF1
#define DMA_IT_TCIF7
#define GPIOC
Definition: stm32f4xx.h:2112
#define TIM_Channel_4
#define DMA_FLAG_TCIF3
#define DMA2_Stream3
Definition: stm32f4xx.h:2137
#define DMA1_Stream0
Definition: stm32f4xx.h:2125
#define USART1
Definition: stm32f4xx.h:2080
#define DMA1_Stream1
Definition: stm32f4xx.h:2126
#define DMA_FLAG_TCIF0
#define DMA_Channel_3
#define GPIO_AF_SPI3
AF 6 selection.
#define NUM_UART
Definition: revo_f4.h:43
#define TIM5
Definition: stm32f4xx.h:2040
#define TIM_IT_CC1
#define DMA_Channel_1
#define DMA2_Stream7
Definition: stm32f4xx.h:2141
#define DMA_Channel_7
const uart_hardware_struct_t uart_config[NUM_UART]
Definition: revo_f4.h:64
#define TIM_Channel_1
const pwm_hardware_struct_t pwm_config[PWM_NUM_CHANNELS]
Definition: revo_f4.h:144
#define GPIO_AF_USART1
AF 7 selection.
#define ADC_NUM
Definition: revo_f4.h:280
#define DMA2_Stream2
Definition: stm32f4xx.h:2136
#define DMA2_Stream5
Definition: stm32f4xx.h:2139
#define PWM_NUM_CHANNELS
Definition: revo_f4.h:132
#define DMA1_Stream2
Definition: stm32f4xx.h:2127
#define DMA_IT_TCIF6
#define TIM_IT_CC2
#define DMA_Channel_5
#define DMA_FLAG_TCIF5
#define USART3
Definition: stm32f4xx.h:2057
#define GPIO_AF_I2C1
AF 4 selection.
#define DMA1_Stream4
Definition: stm32f4xx.h:2129
#define DMA2_Stream1
Definition: stm32f4xx.h:2135
#define I2C2
Definition: stm32f4xx.h:2061
const spi_hardware_struct_t spi_config[NUM_SPI]
Definition: revo_f4.h:99
#define NUM_I2C
Definition: revo_f4.h:115
#define GPIO_AF_SPI1
AF 5 selection.
#define ADC_Channel_11
#define I2C1
Definition: stm32f4xx.h:2060
const i2c_hardware_struct_t i2c_config[NUM_I2C]
Definition: revo_f4.h:116
#define ADC1
Definition: stm32f4xx.h:2083
#define DMA_Channel_2
#define DMA2_Stream0
Definition: stm32f4xx.h:2134
#define USART2
Definition: stm32f4xx.h:2056
#define NUM_SPI
Definition: revo_f4.h:81


rosflight_firmware
Author(s): Daniel Koch , James Jackson
autogenerated on Sat May 9 2020 03:16:53