Modules | Macros
Collaboration diagram for DMA_Exported_Constants:

Modules

 DMA_channel
 
 DMA_data_transfer_direction
 
 DMA_data_buffer_size
 
 DMA_peripheral_incremented_mode
 
 DMA_memory_incremented_mode
 
 DMA_peripheral_data_size
 
 DMA_memory_data_size
 
 DMA_circular_normal_mode
 
 DMA_priority_level
 
 DMA_fifo_direct_mode
 
 DMA_fifo_threshold_level
 
 DMA_memory_burst
 
 DMA_peripheral_burst
 
 DMA_fifo_status_level
 
 DMA_flags_definition
 
 DMA_interrupt_enable_definitions
 
 DMA_interrupts_definitions
 
 DMA_peripheral_increment_offset
 
 DMA_flow_controller_definitions
 
 DMA_memory_targets_definitions
 
 DMA_memory_to_memory
 
 DMA_interrupts_definition
 
 DMA_Buffer_Size
 

Macros

#define IS_DMA_ALL_CONTROLLER(CONTROLLER)
 
#define IS_DMA_ALL_PERIPH(PERIPH)
 
#define IS_DMA_ALL_PERIPH(PERIPH)
 
#define IS_DMA_ALL_PERIPH(PERIPH)
 

Detailed Description

Macro Definition Documentation

#define IS_DMA_ALL_CONTROLLER (   CONTROLLER)
Value:
(((CONTROLLER) == DMA1) || \
((CONTROLLER) == DMA2))
#define DMA1
Definition: stm32f4xx.h:2124
#define DMA2
Definition: stm32f4xx.h:2133

Definition at line 135 of file stm32f4xx_dma.h.

#define IS_DMA_ALL_PERIPH (   PERIPH)
Value:
(((PERIPH) == DMA1_Channel1) || \
((PERIPH) == DMA1_Channel2) || \
((PERIPH) == DMA1_Channel3) || \
((PERIPH) == DMA1_Channel4) || \
((PERIPH) == DMA1_Channel5) || \
((PERIPH) == DMA1_Channel6) || \
((PERIPH) == DMA1_Channel7) || \
((PERIPH) == DMA2_Channel1) || \
((PERIPH) == DMA2_Channel2) || \
((PERIPH) == DMA2_Channel3) || \
((PERIPH) == DMA2_Channel4) || \
((PERIPH) == DMA2_Channel5))
#define DMA1_Channel1
Definition: stm32f10x.h:1431
#define DMA2_Channel4
Definition: stm32f10x.h:1441
#define DMA1_Channel4
Definition: stm32f10x.h:1434
#define DMA1_Channel2
Definition: stm32f10x.h:1432
#define DMA1_Channel3
Definition: stm32f10x.h:1433
#define DMA2_Channel5
Definition: stm32f10x.h:1442
#define DMA1_Channel6
Definition: stm32f10x.h:1436
#define DMA2_Channel1
Definition: stm32f10x.h:1438
#define DMA1_Channel7
Definition: stm32f10x.h:1437
#define DMA2_Channel2
Definition: stm32f10x.h:1439
#define DMA1_Channel5
Definition: stm32f10x.h:1435
#define DMA2_Channel3
Definition: stm32f10x.h:1440

Definition at line 95 of file stm32f10x_dma.h.

#define IS_DMA_ALL_PERIPH (   PERIPH)
Value:
(((PERIPH) == DMA1_Channel1) || \
((PERIPH) == DMA1_Channel2) || \
((PERIPH) == DMA1_Channel3) || \
((PERIPH) == DMA1_Channel4) || \
((PERIPH) == DMA1_Channel5) || \
((PERIPH) == DMA1_Channel6) || \
((PERIPH) == DMA1_Channel7) || \
((PERIPH) == DMA2_Channel1) || \
((PERIPH) == DMA2_Channel2) || \
((PERIPH) == DMA2_Channel3) || \
((PERIPH) == DMA2_Channel4) || \
((PERIPH) == DMA2_Channel5))
#define DMA1_Channel1
Definition: stm32f10x.h:1431
#define DMA2_Channel4
Definition: stm32f10x.h:1441
#define DMA1_Channel4
Definition: stm32f10x.h:1434
#define DMA1_Channel2
Definition: stm32f10x.h:1432
#define DMA1_Channel3
Definition: stm32f10x.h:1433
#define DMA2_Channel5
Definition: stm32f10x.h:1442
#define DMA1_Channel6
Definition: stm32f10x.h:1436
#define DMA2_Channel1
Definition: stm32f10x.h:1438
#define DMA1_Channel7
Definition: stm32f10x.h:1437
#define DMA2_Channel2
Definition: stm32f10x.h:1439
#define DMA1_Channel5
Definition: stm32f10x.h:1435
#define DMA2_Channel3
Definition: stm32f10x.h:1440

Definition at line 96 of file stm32f30x_dma.h.

#define IS_DMA_ALL_PERIPH (   PERIPH)
Value:
(((PERIPH) == DMA1_Stream0) || \
((PERIPH) == DMA1_Stream1) || \
((PERIPH) == DMA1_Stream2) || \
((PERIPH) == DMA1_Stream3) || \
((PERIPH) == DMA1_Stream4) || \
((PERIPH) == DMA1_Stream5) || \
((PERIPH) == DMA1_Stream6) || \
((PERIPH) == DMA1_Stream7) || \
((PERIPH) == DMA2_Stream0) || \
((PERIPH) == DMA2_Stream1) || \
((PERIPH) == DMA2_Stream2) || \
((PERIPH) == DMA2_Stream3) || \
((PERIPH) == DMA2_Stream4) || \
((PERIPH) == DMA2_Stream5) || \
((PERIPH) == DMA2_Stream6) || \
((PERIPH) == DMA2_Stream7))
#define DMA1_Stream6
Definition: stm32f4xx.h:2131
#define DMA1_Stream5
Definition: stm32f4xx.h:2130
#define DMA1_Stream3
Definition: stm32f4xx.h:2128
#define DMA2_Stream4
Definition: stm32f4xx.h:2138
#define DMA2_Stream3
Definition: stm32f4xx.h:2137
#define DMA2_Stream6
Definition: stm32f4xx.h:2140
#define DMA1_Stream0
Definition: stm32f4xx.h:2125
#define DMA1_Stream1
Definition: stm32f4xx.h:2126
#define DMA2_Stream7
Definition: stm32f4xx.h:2141
#define DMA2_Stream2
Definition: stm32f4xx.h:2136
#define DMA2_Stream5
Definition: stm32f4xx.h:2139
#define DMA1_Stream2
Definition: stm32f4xx.h:2127
#define DMA1_Stream4
Definition: stm32f4xx.h:2129
#define DMA2_Stream1
Definition: stm32f4xx.h:2135
#define DMA1_Stream7
Definition: stm32f4xx.h:2132
#define DMA2_Stream0
Definition: stm32f4xx.h:2134

Definition at line 118 of file stm32f4xx_dma.h.



rosflight_firmware
Author(s): Daniel Koch , James Jackson
autogenerated on Sat May 9 2020 03:16:57