drv_adc.c
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1 /*
2  drv_adc.c : Driver for STM32F103CB onboard ADC
3 
4  Adapted from https://github.com/multiwii/baseflight/blob/master/src/drv_adc.c
5 
6  This file is part of BreezySTM32.
7 
8  BreezySTM32 is free software: you can redistribute it and/or modify
9  it under the terms of the GNU General Public License as published by
10  the Free Software Foundation, either version 3 of the License, or
11  (at your option) any later version.
12 
13  BreezySTM32 is distributed in the hope that it will be useful,
14  but WITHOUT ANY WARRANTY; without even the implied warranty of
15  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16  GNU General Public License for more details.
17 
18  You should have received a copy of the GNU General Public License
19  along with BreezySTM32. If not, see <http://www.gnu.org/licenses/>.
20  */
21 
22 #include <stdbool.h>
23 
24 #include "stm32f10x_conf.h"
25 
26 #include "drv_system.h"
27 #include "drv_adc.h"
28 
29 
30 typedef struct adc_config_t {
31  uint8_t adcChannel; // ADC1_INxx channel number
32  uint8_t dmaIndex; // index into DMA buffer in case of sparse channels
33 } adc_config_t;
34 
36 static volatile uint16_t adcValues[ADC_CHANNEL_MAX];
37 
38 void adcInit(bool haveADC5)
39 {
40  ADC_InitTypeDef adc;
41  DMA_InitTypeDef dma;
42  int numChannels = 1, i, rank = 1;
43 
44  // configure always-present battery index (ADC4)
46  adcConfig[ADC_BATTERY].dmaIndex = numChannels - 1;
47 
48  // optional ADC5 input
49  if (haveADC5) {
50  numChannels++;
52  adcConfig[ADC_EXTERNAL_PAD].dmaIndex = numChannels - 1;
53  }
54 
55  // ADC driver assumes all the GPIO was already placed in 'AIN' mode
57  dma.DMA_PeripheralBaseAddr = (uint32_t)&ADC1->DR;
58  dma.DMA_MemoryBaseAddr = (uint32_t)adcValues;
60  dma.DMA_BufferSize = numChannels;
68  DMA_Init(DMA1_Channel1, &dma);
70 
72  adc.ADC_ScanConvMode = numChannels > 1 ? ENABLE : DISABLE;
76  adc.ADC_NbrOfChannel = numChannels;
77  ADC_Init(ADC1, &adc);
78 
79  // Configure ADC channels. Skip if channel is zero, means can't use PA0, but OK for this situation.
80  for (i = 0; i < ADC_CHANNEL_MAX; i++)
81  if (adcConfig[i].adcChannel > 0)
84 
86 
87  // Calibrate ADC
92 
93  // Fire off ADC
95 }
96 
97 uint16_t adcGetChannel(uint8_t channel)
98 {
99  return adcValues[adcConfig[channel].dmaIndex];
100 }
#define DMA1_Channel1
Definition: stm32f10x.h:1431
#define DMA_MemoryInc_Enable
uint32_t DMA_MemoryInc
Definition: stm32f4xx_dma.h:76
uint32_t ADC_ExternalTrigConv
Definition: stm32f4xx_adc.h:68
uint16_t adcGetChannel(uint8_t channel)
Definition: drv_adc.c:97
void ADC_ResetCalibration(ADC_TypeDef *ADCx)
Resets the selected ADC calibration registers.
DMA Init structure definition.
Definition: stm32f4xx_dma.h:54
ADC Init structure definition.
Definition: stm32f4xx_adc.h:53
#define ADC_Mode_Independent
void ADC_Cmd(ADC_TypeDef *ADCx, FunctionalState NewState)
Enables or disables the specified ADC peripheral.
FunctionalState ADC_ContinuousConvMode
Definition: stm32f4xx_adc.h:61
void DMA_DeInit(DMA_Stream_TypeDef *DMAy_Streamx)
Deinitialize the DMAy Streamx registers to their default reset values.
#define DMA_PeripheralInc_Disable
FlagStatus ADC_GetCalibrationStatus(ADC_TypeDef *ADCx)
Gets the selected ADC calibration status.
static volatile uint16_t adcValues[ADC_CHANNEL_MAX]
Definition: drv_adc.c:36
uint32_t DMA_MemoryDataSize
Definition: stm32f4xx_dma.h:82
void ADC_DMACmd(ADC_TypeDef *ADCx, FunctionalState NewState)
Enables or disables the specified ADC DMA request.
#define DMA_Priority_High
void DMA_Init(DMA_Stream_TypeDef *DMAy_Streamx, DMA_InitTypeDef *DMA_InitStruct)
Initializes the DMAy Streamx according to the specified parameters in the DMA_InitStruct structure...
#define DMA_PeripheralDataSize_HalfWord
uint32_t DMA_DIR
Definition: stm32f4xx_dma.h:65
uint32_t DMA_PeripheralInc
Definition: stm32f4xx_dma.h:73
uint32_t DMA_PeripheralDataSize
Definition: stm32f4xx_dma.h:79
void adcInit(bool haveADC5)
Definition: drv_adc.c:38
#define DMA_M2M_Disable
uint32_t DMA_MemoryBaseAddr
Definition: stm32f10x_dma.h:54
#define DMA_MemoryDataSize_HalfWord
uint32_t ADC_DataAlign
Definition: stm32f4xx_adc.h:72
void DMA_Cmd(DMA_Stream_TypeDef *DMAy_Streamx, FunctionalState NewState)
Enables or disables the specified DMAy Streamx.
uint32_t DMA_PeripheralBaseAddr
Definition: stm32f4xx_dma.h:59
FlagStatus ADC_GetResetCalibrationStatus(ADC_TypeDef *ADCx)
Gets the selected ADC reset calibration registers status.
uint32_t DMA_M2M
Definition: stm32f10x_dma.h:83
#define DMA_DIR_PeripheralSRC
void ADC_SoftwareStartConvCmd(ADC_TypeDef *ADCx, FunctionalState NewState)
Enables or disables the selected ADC software start conversion .
#define ADC_Channel_4
uint32_t ADC_Mode
Definition: stm32f10x_adc.h:52
#define ADC_Channel_5
FunctionalState ADC_ScanConvMode
Definition: stm32f4xx_adc.h:57
uint8_t ADC_NbrOfChannel
Definition: stm32f10x_adc.h:71
#define DMA_MemoryInc_Disable
void ADC_StartCalibration(ADC_TypeDef *ADCx)
Starts the selected ADC calibration process.
uint32_t DMA_Mode
Definition: stm32f4xx_dma.h:85
uint8_t adcChannel
Definition: drv_adc.c:31
#define ADC_ExternalTrigConv_None
#define ADC_SampleTime_239Cycles5
uint32_t DMA_BufferSize
Definition: stm32f4xx_dma.h:69
static adc_config_t adcConfig[ADC_CHANNEL_MAX]
Definition: drv_adc.c:35
uint32_t DMA_Priority
Definition: stm32f4xx_dma.h:90
void ADC_RegularChannelConfig(ADC_TypeDef *ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime)
Configures for the selected ADC regular channel its corresponding rank in the sequencer and its sampl...
#define DMA_Mode_Circular
#define ADC_DataAlign_Right
uint8_t dmaIndex
Definition: drv_adc.c:32
struct adc_config_t adc_config_t
#define ADC1
Definition: stm32f4xx.h:2083
void ADC_Init(ADC_TypeDef *ADCx, ADC_InitTypeDef *ADC_InitStruct)
Initializes the ADCx peripheral according to the specified parameters in the ADC_InitStruct.


rosflight_firmware
Author(s): Daniel Koch , James Jackson
autogenerated on Thu Oct 24 2019 03:17:18