uart.h
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00001 #ifndef __UART_H
00002 #define __UART_H
00003 
00004 #include <inttypes.h>
00005 #include <mav_common/comm_packets.h>
00006 
00007 extern void UARTInitialize(unsigned int);
00008 extern void UARTWriteChar(unsigned char);
00009 extern unsigned char UARTReadChar(void);
00010 extern void __putchar(int);
00011 extern void UART_send(char *, unsigned char);
00012 extern void UART_send_ringbuffer(void);
00013 extern int ringbuffer(unsigned char, unsigned char*, unsigned int);
00014 
00015 void startAutoBaud(void);
00016 volatile extern char autobaud_in_progress;
00017 
00018 inline int writePacket2Ringbuffer(uint8_t descriptor, void * data, uint8_t length);
00019 extern void uart0ISR(void);
00020 
00021 extern uint16_t crc16(void *, uint16_t count, uint16_t prev_crc);
00022 extern uint16_t crc_update(uint16_t, uint8_t);
00023 
00024 #define RBREAD 0
00025 #define RBWRITE 1
00026 #define RBFREE  2 
00027 #define RINGBUFFERSIZE  384
00028 
00029 int UART0_txEmpty(void);
00030 void UART0_rxFlush(void);
00031 void UART0_txFlush(void);
00032 uint8_t UART0_writeFifo(void * data, uint32_t length);
00033 
00034 // this has to be 2^n !!!
00035 #define UART0_RX_BUFFERSIZE 512
00036 #define UART0_TX_BUFFERSIZE 512
00037 
00038 // not more than 64 different packettypes
00039 #define PACKET_INFO_SIZE 64
00040 
00041 typedef struct
00042 {
00043   uint8_t descriptor;
00044   void * data;
00045   uint8_t updated;
00046 } PacketInfo;
00047 
00048 extern volatile unsigned int UART_rxPacketCount;
00049 extern volatile unsigned int UART_rxGoodPacketCount;
00050 
00051 typedef struct
00052 {
00053   uint8_t *buffer;
00054   uint8_t inUse;
00055   uint32_t bufferSize;
00056   uint32_t readIdx;
00057   uint32_t writeIdx;
00058   uint32_t tmp;
00059   uint32_t mask;
00060 }volatile Fifo;
00061 
00062 extern short uart0_min_tx_buffer;
00063 extern short uart0_min_rx_buffer;
00064 
00065 void Fifo_initialize(Fifo * fifo, uint8_t * buffer, uint32_t bufferSize);
00066 inline uint8_t Fifo_writeByte(Fifo * fifo, uint8_t byte);
00067 inline uint8_t Fifo_writeBlock(Fifo * fifo, void *data, uint32_t length);
00068 inline uint8_t Fifo_readByte(Fifo * fifo, uint8_t * byte);
00069 inline uint16_t Fifo_availableMemory(Fifo * fifo);
00070 inline void Fifo_reset(Fifo * fifo);
00071 
00072 void parseRxFifo(void);
00073 
00074 PacketInfo* registerPacket(uint8_t descriptor, void * data);
00075 
00076 #endif //__UART_H


ccny_asctec_firmware_2
Author(s): Ivan Dryanovski, Roberto G. Valenti
autogenerated on Tue Jan 7 2014 11:04:17