00001 #ifndef SYSTEM_H_ 00002 #define SYSTEM_H_ 00003 00004 extern unsigned int processorClockFrequency(void); 00005 extern unsigned int peripheralClockFrequency(void); 00006 extern void delay(int); 00007 extern void init(void); 00008 extern void pll_init(void); 00009 extern void pll_feed(void); 00010 extern void init_timer0(void); 00011 extern void init_timer1(void); 00012 extern void init_interrupts(void); 00013 extern void init_ports(void); 00014 extern void init_spi(void); 00015 extern void init_pwm(void); 00016 extern void init_get_calibdata_from_flash(void); 00017 extern void write_calibdata_to_flash(void); 00018 extern void init_spi1(void); 00019 extern void SPI1Send(char *, unsigned int, unsigned char); 00020 extern void PWM_Init( void ); 00021 extern void SPI_get_data(unsigned int); 00022 00023 extern unsigned char CAM_Commands_received; 00024 00025 struct HL_STATUS { 00026 short battery_voltage_1; 00027 short battery_voltage_2; 00028 00029 short up_time; 00030 short flight_time; 00031 00032 int latitude; 00033 int longitude; 00034 00035 short status; 00036 short cpu_load; 00037 short yawenabled; 00038 short chksum_error; 00039 }; 00040 00041 extern struct HL_STATUS HL_Status; 00042 00043 00044 //PWM defines 00045 #define PWM_CYCLE 1200 00046 #define PWM_OFFSET 200 00047 00048 #define MR0_INT 1 << 0 00049 #define MR1_INT 1 << 1 00050 #define MR2_INT 1 << 2 00051 #define MR3_INT 1 << 3 00052 #define MR4_INT 1 << 8 00053 #define MR5_INT 1 << 9 00054 #define MR6_INT 1 << 10 00055 00056 #define TCR_CNT_EN 0x00000001 00057 #define TCR_RESET 0x00000002 00058 #define TCR_PWM_EN 0x00000008 00059 00060 #define PWMMR0I 1 << 0 00061 #define PWMMR0R 1 << 1 00062 #define PWMMR0S 1 << 2 00063 #define PWMMR1I 1 << 3 00064 #define PWMMR1R 1 << 4 00065 #define PWMMR1S 1 << 5 00066 #define PWMMR2I 1 << 6 00067 #define PWMMR2R 1 << 7 00068 #define PWMMR2S 1 << 8 00069 #define PWMMR3I 1 << 9 00070 #define PWMMR3R 1 << 10 00071 #define PWMMR3S 1 << 11 00072 #define PWMMR4I 1 << 12 00073 #define PWMMR4R 1 << 13 00074 #define PWMMR4S 1 << 14 00075 #define PWMMR5I 1 << 15 00076 #define PWMMR5R 1 << 16 00077 #define PWMMR5S 1 << 17 00078 #define PWMMR6I 1 << 18 00079 #define PWMMR6R 1 << 19 00080 #define PWMMR6S 1 << 20 00081 00082 #define PWMSEL2 1 << 2 00083 #define PWMSEL3 1 << 3 00084 #define PWMSEL4 1 << 4 00085 #define PWMSEL5 1 << 5 00086 #define PWMSEL6 1 << 6 00087 #define PWMENA1 1 << 9 00088 #define PWMENA2 1 << 10 00089 #define PWMENA3 1 << 11 00090 #define PWMENA4 1 << 12 00091 #define PWMENA5 1 << 13 00092 #define PWMENA6 1 << 14 00093 00094 #define LER0_EN 1 << 0 00095 #define LER1_EN 1 << 1 00096 #define LER2_EN 1 << 2 00097 #define LER3_EN 1 << 3 00098 #define LER4_EN 1 << 4 00099 #define LER5_EN 1 << 5 00100 #define LER6_EN 1 << 6 00101 00102 #endif /*SYSTEM_H_*/ 00103