88 #include "stm32h7xx_hal.h"
99 #ifdef HAL_HSEM_MODULE_ENABLED
103 #if defined(DUAL_CORE)
108 #ifndef HSEM_R_MASTERID
109 #define HSEM_R_MASTERID HSEM_R_COREID
112 #ifndef HSEM_RLR_MASTERID
113 #define HSEM_RLR_MASTERID HSEM_RLR_COREID
116 #ifndef HSEM_CR_MASTERID
117 #define HSEM_CR_MASTERID HSEM_CR_COREID
165 #if USE_MULTI_CORE_SHARED_CODE != 0U
201 #if USE_MULTI_CORE_SHARED_CODE != 0U
244 #if USE_MULTI_CORE_SHARED_CODE != 0U
331 #if USE_MULTI_CORE_SHARED_CODE != 0U
336 HSEM->C1IER |= SemMask;
341 HSEM->C2IER |= SemMask;
355 #if USE_MULTI_CORE_SHARED_CODE != 0U
360 HSEM->C1IER &= ~SemMask;
365 HSEM->C2IER &= ~SemMask;
379 #if USE_MULTI_CORE_SHARED_CODE != 0U
383 statusreg =
HSEM->C1MISR;
386 HSEM->C1IER &= ~((uint32_t)statusreg);
389 HSEM->C1ICR = ((uint32_t)statusreg);
394 statusreg =
HSEM->C2MISR;
397 HSEM->C2IER &= ~((uint32_t)statusreg);
400 HSEM->C2ICR = ((uint32_t)statusreg);