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stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_sai.h File Reference

Header file of SAI HAL module. More...

#include "stm32h7xx_hal_def.h"
#include "stm32h7xx_hal_sai_ex.h"
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Classes

struct  __SAI_HandleTypeDef
 
struct  SAI_FrameInitTypeDef
 
struct  SAI_InitTypeDef
 
struct  SAI_PdmInitTypeDef
 
struct  SAI_SlotInitTypeDef
 

Macros

#define __HAL_SAI_CLEAR_FLAG(__HANDLE__, __FLAG__)   ((__HANDLE__)->Instance->CLRFR = (__FLAG__))
 Clear the specified SAI pending flag. More...
 
#define __HAL_SAI_DISABLE(__HANDLE__)   ((__HANDLE__)->Instance->CR1 &= ~SAI_xCR1_SAIEN)
 Disable SAI. More...
 
#define __HAL_SAI_DISABLE_IT(__HANDLE__, __INTERRUPT__)   ((__HANDLE__)->Instance->IMR &= (~(__INTERRUPT__)))
 Disable the specified SAI interrupts. More...
 
#define __HAL_SAI_ENABLE(__HANDLE__)   ((__HANDLE__)->Instance->CR1 |= SAI_xCR1_SAIEN)
 Enable SAI. More...
 
#define __HAL_SAI_ENABLE_IT(__HANDLE__, __INTERRUPT__)   ((__HANDLE__)->Instance->IMR |= (__INTERRUPT__))
 Enable the specified SAI interrupts. More...
 
#define __HAL_SAI_GET_FLAG(__HANDLE__, __FLAG__)   ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
 Check whether the specified SAI flag is set or not. More...
 
#define __HAL_SAI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__)   ((((__HANDLE__)->Instance->IMR & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
 Check whether the specified SAI interrupt source is enabled or not. More...
 
#define __HAL_SAI_RESET_HANDLE_STATE(__HANDLE__)   ((__HANDLE__)->State = HAL_SAI_STATE_RESET)
 Reset SAI handle state. More...
 
#define HAL_SAI_ERROR_AFSDET   0x00000004U
 
#define HAL_SAI_ERROR_CNREADY   0x00000010U
 
#define HAL_SAI_ERROR_DMA   0x00000080U
 
#define HAL_SAI_ERROR_LFSDET   0x00000008U
 
#define HAL_SAI_ERROR_NONE   0x00000000U
 
#define HAL_SAI_ERROR_OVR   0x00000001U
 
#define HAL_SAI_ERROR_TIMEOUT   0x00000040U
 
#define HAL_SAI_ERROR_UDR   0x00000002U
 
#define HAL_SAI_ERROR_WCKCFG   0x00000020U
 
#define IS_SAI_AUDIO_FREQUENCY(AUDIO)
 
#define IS_SAI_BLOCK_ACTIVE_FRAME(LENGTH)   ((1U <= (LENGTH)) && ((LENGTH) <= 128U))
 
#define IS_SAI_BLOCK_CLOCK_STROBING(CLOCK)
 
#define IS_SAI_BLOCK_COMPANDING_MODE(MODE)
 
#define IS_SAI_BLOCK_DATASIZE(DATASIZE)
 
#define IS_SAI_BLOCK_FIFO_THRESHOLD(THRESHOLD)
 
#define IS_SAI_BLOCK_FIRST_BIT(BIT)
 
#define IS_SAI_BLOCK_FIRSTBIT_OFFSET(OFFSET)   ((OFFSET) <= 24U)
 
#define IS_SAI_BLOCK_FRAME_LENGTH(LENGTH)   ((8U <= (LENGTH)) && ((LENGTH) <= 256U))
 
#define IS_SAI_BLOCK_FS_DEFINITION(DEFINITION)
 
#define IS_SAI_BLOCK_FS_OFFSET(OFFSET)
 
#define IS_SAI_BLOCK_FS_POLARITY(POLARITY)
 
#define IS_SAI_BLOCK_MASTER_DIVIDER(DIVIDER)   ((DIVIDER) <= 63U)
 
#define IS_SAI_BLOCK_MCK_OUTPUT(VALUE)
 
#define IS_SAI_BLOCK_MCK_OVERSAMPLING(VALUE)
 
#define IS_SAI_BLOCK_MODE(MODE)
 
#define IS_SAI_BLOCK_MUTE_COUNTER(COUNTER)   ((COUNTER) <= 63U)
 
#define IS_SAI_BLOCK_MUTE_VALUE(VALUE)
 
#define IS_SAI_BLOCK_NODIVIDER(NODIVIDER)
 
#define IS_SAI_BLOCK_OUTPUT_DRIVE(DRIVE)
 
#define IS_SAI_BLOCK_PROTOCOL(PROTOCOL)
 
#define IS_SAI_BLOCK_SLOT_NUMBER(NUMBER)   ((1U <= (NUMBER)) && ((NUMBER) <= 16U))
 
#define IS_SAI_BLOCK_SLOT_SIZE(SIZE)
 
#define IS_SAI_BLOCK_SYNCEXT(STATE)
 
#define IS_SAI_BLOCK_SYNCHRO(SYNCHRO)
 
#define IS_SAI_BLOCK_TRISTATE_MANAGEMENT(STATE)
 
#define IS_SAI_MONO_STEREO_MODE(MODE)
 
#define IS_SAI_PDM_CLOCK_ENABLE(CLOCK)
 
#define IS_SAI_PDM_MIC_PAIRS_NUMBER(VALUE)   ((1U <= (VALUE)) && ((VALUE) <= 3U))
 
#define IS_SAI_PROTOCOL_DATASIZE(DATASIZE)
 
#define IS_SAI_SLOT_ACTIVE(ACTIVE)   ((ACTIVE) <= SAI_SLOTACTIVE_ALL)
 
#define IS_SAI_SUPPORTED_PROTOCOL(PROTOCOL)
 
#define SAI_AC97_PROTOCOL   SAI_xCR1_PRTCFG_1
 
#define SAI_ALAW_1CPL_COMPANDING   (SAI_xCR2_COMP_1 | SAI_xCR2_COMP_0)
 
#define SAI_ALAW_2CPL_COMPANDING   (SAI_xCR2_COMP_1 | SAI_xCR2_COMP_0 | SAI_xCR2_CPL)
 
#define SAI_ASYNCHRONOUS   0U
 
#define SAI_AUDIO_FREQUENCY_11K   11025U
 
#define SAI_AUDIO_FREQUENCY_16K   16000U
 
#define SAI_AUDIO_FREQUENCY_192K   192000U
 
#define SAI_AUDIO_FREQUENCY_22K   22050U
 
#define SAI_AUDIO_FREQUENCY_32K   32000U
 
#define SAI_AUDIO_FREQUENCY_44K   44100U
 
#define SAI_AUDIO_FREQUENCY_48K   48000U
 
#define SAI_AUDIO_FREQUENCY_8K   8000U
 
#define SAI_AUDIO_FREQUENCY_96K   96000U
 
#define SAI_AUDIO_FREQUENCY_MCKDIV   0U
 
#define SAI_CLOCKSTROBING_FALLINGEDGE   0U
 
#define SAI_CLOCKSTROBING_RISINGEDGE   1U
 
#define SAI_DATASIZE_10   (SAI_xCR1_DS_1 | SAI_xCR1_DS_0)
 
#define SAI_DATASIZE_16   SAI_xCR1_DS_2
 
#define SAI_DATASIZE_20   (SAI_xCR1_DS_2 | SAI_xCR1_DS_0)
 
#define SAI_DATASIZE_24   (SAI_xCR1_DS_2 | SAI_xCR1_DS_1)
 
#define SAI_DATASIZE_32   (SAI_xCR1_DS_2 | SAI_xCR1_DS_1 | SAI_xCR1_DS_0)
 
#define SAI_DATASIZE_8   SAI_xCR1_DS_1
 
#define SAI_FIFOSTATUS_1QUARTERFULL   0x00020000U
 
#define SAI_FIFOSTATUS_3QUARTERFULL   0x00040000U
 
#define SAI_FIFOSTATUS_EMPTY   0x00000000U
 
#define SAI_FIFOSTATUS_FULL   0x00050000U
 
#define SAI_FIFOSTATUS_HALFFULL   0x00030000U
 
#define SAI_FIFOSTATUS_LESS1QUARTERFULL   0x00010000U
 
#define SAI_FIFOTHRESHOLD_1QF   SAI_xCR2_FTH_0
 
#define SAI_FIFOTHRESHOLD_3QF   (SAI_xCR2_FTH_1 | SAI_xCR2_FTH_0)
 
#define SAI_FIFOTHRESHOLD_EMPTY   0x00000000U
 
#define SAI_FIFOTHRESHOLD_FULL   SAI_xCR2_FTH_2
 
#define SAI_FIFOTHRESHOLD_HF   SAI_xCR2_FTH_1
 
#define SAI_FIRSTBIT_LSB   SAI_xCR1_LSBFIRST
 
#define SAI_FIRSTBIT_MSB   0x00000000U
 
#define SAI_FLAG_AFSDET   SAI_xSR_AFSDET
 
#define SAI_FLAG_CNRDY   SAI_xSR_CNRDY
 
#define SAI_FLAG_FREQ   SAI_xSR_FREQ
 
#define SAI_FLAG_LFSDET   SAI_xSR_LFSDET
 
#define SAI_FLAG_MUTEDET   SAI_xSR_MUTEDET
 
#define SAI_FLAG_OVRUDR   SAI_xSR_OVRUDR
 
#define SAI_FLAG_WCKCFG   SAI_xSR_WCKCFG
 
#define SAI_FREE_PROTOCOL   0x00000000U
 
#define SAI_FS_ACTIVE_HIGH   SAI_xFRCR_FSPOL
 
#define SAI_FS_ACTIVE_LOW   0x00000000U
 
#define SAI_FS_BEFOREFIRSTBIT   SAI_xFRCR_FSOFF
 
#define SAI_FS_CHANNEL_IDENTIFICATION   SAI_xFRCR_FSDEF
 
#define SAI_FS_FIRSTBIT   0x00000000U
 
#define SAI_FS_STARTFRAME   0x00000000U
 
#define SAI_I2S_LSBJUSTIFIED   2U
 
#define SAI_I2S_MSBJUSTIFIED   1U
 
#define SAI_I2S_STANDARD   0U
 
#define SAI_IT_AFSDET   SAI_xIMR_AFSDETIE
 
#define SAI_IT_CNRDY   SAI_xIMR_CNRDYIE
 
#define SAI_IT_FREQ   SAI_xIMR_FREQIE
 
#define SAI_IT_LFSDET   SAI_xIMR_LFSDETIE
 
#define SAI_IT_MUTEDET   SAI_xIMR_MUTEDETIE
 
#define SAI_IT_OVRUDR   SAI_xIMR_OVRUDRIE
 
#define SAI_IT_WCKCFG   SAI_xIMR_WCKCFGIE
 
#define SAI_LAST_SENT_VALUE   SAI_xCR2_MUTEVAL
 
#define SAI_MASTERDIVIDER_DISABLE   SAI_xCR1_NODIV
 
#define SAI_MASTERDIVIDER_ENABLE   0x00000000U
 
#define SAI_MCK_OUTPUT_DISABLE   0x00000000U
 
#define SAI_MCK_OUTPUT_ENABLE   SAI_xCR1_MCKEN
 
#define SAI_MCK_OVERSAMPLING_DISABLE   0x00000000U
 
#define SAI_MCK_OVERSAMPLING_ENABLE   SAI_xCR1_OSR
 
#define SAI_MODEMASTER_RX   SAI_xCR1_MODE_0
 
#define SAI_MODEMASTER_TX   0x00000000U
 
#define SAI_MODESLAVE_RX   (SAI_xCR1_MODE_1 | SAI_xCR1_MODE_0)
 
#define SAI_MODESLAVE_TX   SAI_xCR1_MODE_1
 
#define SAI_MONOMODE   SAI_xCR1_MONO
 
#define SAI_NOCOMPANDING   0x00000000U
 
#define SAI_OUTPUT_NOTRELEASED   0x00000000U
 
#define SAI_OUTPUT_RELEASED   SAI_xCR2_TRIS
 
#define SAI_OUTPUTDRIVE_DISABLE   0x00000000U
 
#define SAI_OUTPUTDRIVE_ENABLE   SAI_xCR1_OUTDRIV
 
#define SAI_PCM_LONG   3U
 
#define SAI_PCM_SHORT   4U
 
#define SAI_PDM_CLOCK1_ENABLE   SAI_PDMCR_CKEN1
 
#define SAI_PDM_CLOCK2_ENABLE   SAI_PDMCR_CKEN2
 
#define SAI_PROTOCOL_DATASIZE_16BIT   0U
 
#define SAI_PROTOCOL_DATASIZE_16BITEXTENDED   1U
 
#define SAI_PROTOCOL_DATASIZE_24BIT   2U
 
#define SAI_PROTOCOL_DATASIZE_32BIT   3U
 
#define SAI_SLOT_NOTACTIVE   0x00000000U
 
#define SAI_SLOTACTIVE_0   0x00000001U
 
#define SAI_SLOTACTIVE_1   0x00000002U
 
#define SAI_SLOTACTIVE_10   0x00000400U
 
#define SAI_SLOTACTIVE_11   0x00000800U
 
#define SAI_SLOTACTIVE_12   0x00001000U
 
#define SAI_SLOTACTIVE_13   0x00002000U
 
#define SAI_SLOTACTIVE_14   0x00004000U
 
#define SAI_SLOTACTIVE_15   0x00008000U
 
#define SAI_SLOTACTIVE_2   0x00000004U
 
#define SAI_SLOTACTIVE_3   0x00000008U
 
#define SAI_SLOTACTIVE_4   0x00000010U
 
#define SAI_SLOTACTIVE_5   0x00000020U
 
#define SAI_SLOTACTIVE_6   0x00000040U
 
#define SAI_SLOTACTIVE_7   0x00000080U
 
#define SAI_SLOTACTIVE_8   0x00000100U
 
#define SAI_SLOTACTIVE_9   0x00000200U
 
#define SAI_SLOTACTIVE_ALL   0x0000FFFFU
 
#define SAI_SLOTSIZE_16B   SAI_xSLOTR_SLOTSZ_0
 
#define SAI_SLOTSIZE_32B   SAI_xSLOTR_SLOTSZ_1
 
#define SAI_SLOTSIZE_DATASIZE   0x00000000U
 
#define SAI_SPDIF_PROTOCOL   SAI_xCR1_PRTCFG_0
 
#define SAI_STEREOMODE   0x00000000U
 
#define SAI_SYNCEXT_DISABLE   0U
 
#define SAI_SYNCEXT_OUTBLOCKA_ENABLE   1U
 
#define SAI_SYNCEXT_OUTBLOCKB_ENABLE   2U
 
#define SAI_SYNCHRONOUS   1U
 
#define SAI_SYNCHRONOUS_EXT_SAI1   2U
 
#define SAI_ULAW_1CPL_COMPANDING   SAI_xCR2_COMP_1
 
#define SAI_ULAW_2CPL_COMPANDING   (SAI_xCR2_COMP_1 | SAI_xCR2_CPL)
 
#define SAI_ZERO_VALUE   0x00000000U
 

Typedefs

typedef struct __SAI_HandleTypeDef SAI_HandleTypeDef
 
typedef void(* SAIcallback) (void)
 SAI Callback prototype. More...
 

Enumerations

enum  HAL_SAI_StateTypeDef {
  HAL_SAI_STATE_RESET = 0x00U, HAL_SAI_STATE_READY = 0x01U, HAL_SAI_STATE_BUSY = 0x02U, HAL_SAI_STATE_BUSY_TX = 0x12U,
  HAL_SAI_STATE_BUSY_RX = 0x22U, HAL_SAI_STATE_RESET = 0x00U, HAL_SAI_STATE_READY = 0x01U, HAL_SAI_STATE_BUSY = 0x02U,
  HAL_SAI_STATE_BUSY_TX = 0x12U, HAL_SAI_STATE_BUSY_RX = 0x22U, HAL_SAI_STATE_RESET = 0x00U, HAL_SAI_STATE_READY = 0x01U,
  HAL_SAI_STATE_BUSY = 0x02U, HAL_SAI_STATE_BUSY_TX = 0x12U, HAL_SAI_STATE_BUSY_RX = 0x22U
}
 HAL State structures definition. More...
 

Functions

HAL_StatusTypeDef HAL_SAI_Abort (SAI_HandleTypeDef *hsai)
 
HAL_StatusTypeDef HAL_SAI_DeInit (SAI_HandleTypeDef *hsai)
 
HAL_StatusTypeDef HAL_SAI_DisableRxMuteMode (SAI_HandleTypeDef *hsai)
 
HAL_StatusTypeDef HAL_SAI_DisableTxMuteMode (SAI_HandleTypeDef *hsai)
 
HAL_StatusTypeDef HAL_SAI_DMAPause (SAI_HandleTypeDef *hsai)
 
HAL_StatusTypeDef HAL_SAI_DMAResume (SAI_HandleTypeDef *hsai)
 
HAL_StatusTypeDef HAL_SAI_DMAStop (SAI_HandleTypeDef *hsai)
 
HAL_StatusTypeDef HAL_SAI_EnableRxMuteMode (SAI_HandleTypeDef *hsai, SAIcallback callback, uint16_t counter)
 
HAL_StatusTypeDef HAL_SAI_EnableTxMuteMode (SAI_HandleTypeDef *hsai, uint16_t val)
 
void HAL_SAI_ErrorCallback (SAI_HandleTypeDef *hsai)
 SAI error callbacks. More...
 
uint32_t HAL_SAI_GetError (SAI_HandleTypeDef *hsai)
 
HAL_SAI_StateTypeDef HAL_SAI_GetState (SAI_HandleTypeDef *hsai)
 
HAL_StatusTypeDef HAL_SAI_Init (SAI_HandleTypeDef *hsai)
 
HAL_StatusTypeDef HAL_SAI_InitProtocol (SAI_HandleTypeDef *hsai, uint32_t protocol, uint32_t datasize, uint32_t nbslot)
 
void HAL_SAI_IRQHandler (SAI_HandleTypeDef *hsai)
 
void HAL_SAI_MspDeInit (SAI_HandleTypeDef *hsai)
 
void HAL_SAI_MspInit (SAI_HandleTypeDef *hsai)
 
HAL_StatusTypeDef HAL_SAI_Receive (SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size, uint32_t Timeout)
 
HAL_StatusTypeDef HAL_SAI_Receive_DMA (SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size)
 
HAL_StatusTypeDef HAL_SAI_Receive_IT (SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size)
 
void HAL_SAI_RxCpltCallback (SAI_HandleTypeDef *hsai)
 Reception complete callback. More...
 
void HAL_SAI_RxHalfCpltCallback (SAI_HandleTypeDef *hsai)
 Half reception complete callback. More...
 
HAL_StatusTypeDef HAL_SAI_Transmit (SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size, uint32_t Timeout)
 
HAL_StatusTypeDef HAL_SAI_Transmit_DMA (SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size)
 
HAL_StatusTypeDef HAL_SAI_Transmit_IT (SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size)
 
void HAL_SAI_TxCpltCallback (SAI_HandleTypeDef *hsai)
 Tx Transfer completed callbacks. More...
 
void HAL_SAI_TxHalfCpltCallback (SAI_HandleTypeDef *hsai)
 Tx Half Transfer completed callbacks. More...
 

Detailed Description

Header file of SAI HAL module.

Author
MCD Application Team
Attention

© Copyright (c) 2017 STMicroelectronics. All rights reserved.

This software component is licensed by ST under BSD 3-Clause license, the "License"; You may not use this file except in compliance with the License. You may obtain a copy of the License at: opensource.org/licenses/BSD-3-Clause

Definition in file stm32h747/stm32h747i-disco/CM7/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_sai.h.


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autogenerated on Fri Apr 1 2022 02:15:03