SystemZMCTargetDesc.h
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1 //===-- SystemZMCTargetDesc.h - SystemZ target descriptions -----*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 
10 /* Capstone Disassembly Engine */
11 /* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2015 */
12 
13 #ifndef CS_SYSTEMZMCTARGETDESC_H
14 #define CS_SYSTEMZMCTARGETDESC_H
15 
16 // Maps of asm register numbers to LLVM register numbers, with 0 indicating
17 // an invalid register. In principle we could use 32-bit and 64-bit register
18 // classes directly, provided that we relegated the GPR allocation order
19 // in SystemZRegisterInfo.td to an AltOrder and left the default order
20 // as %r0-%r15. It seems better to provide the same interface for
21 // all classes though.
22 extern const unsigned SystemZMC_GR32Regs[16];
23 extern const unsigned SystemZMC_GRH32Regs[16];
24 extern const unsigned SystemZMC_GR64Regs[16];
25 extern const unsigned SystemZMC_GR128Regs[16];
26 extern const unsigned SystemZMC_FP32Regs[16];
27 extern const unsigned SystemZMC_FP64Regs[16];
28 extern const unsigned SystemZMC_FP128Regs[16];
29 extern const unsigned SystemZMC_VR32Regs[32];
30 extern const unsigned SystemZMC_VR64Regs[32];
31 extern const unsigned SystemZMC_VR128Regs[32];
32 extern const unsigned SystemZMC_AR32Regs[16];
33 extern const unsigned SystemZMC_CR64Regs[16];
34 
35 // Return the 0-based number of the first architectural register that
36 // contains the given LLVM register. E.g. R1D -> 1.
37 unsigned SystemZMC_getFirstReg(unsigned Reg);
38 
39 // Defines symbolic names for SystemZ registers.
40 // This defines a mapping from register name to register number.
41 //#define GET_REGINFO_ENUM
42 //#include "SystemZGenRegisterInfo.inc"
43 
44 // Defines symbolic names for the SystemZ instructions.
45 //#define GET_INSTRINFO_ENUM
46 //#include "SystemZGenInstrInfo.inc"
47 
48 //#define GET_SUBTARGETINFO_ENUM
49 //#include "SystemZGenSubtargetInfo.inc"
50 
51 #endif
SystemZMC_CR64Regs
const unsigned SystemZMC_CR64Regs[16]
SystemZMC_getFirstReg
unsigned SystemZMC_getFirstReg(unsigned Reg)
SystemZMC_FP32Regs
const unsigned SystemZMC_FP32Regs[16]
SystemZMC_VR32Regs
const unsigned SystemZMC_VR32Regs[32]
SystemZMC_GR32Regs
const unsigned SystemZMC_GR32Regs[16]
SystemZMC_GRH32Regs
const unsigned SystemZMC_GRH32Regs[16]
SystemZMC_GR128Regs
const unsigned SystemZMC_GR128Regs[16]
SystemZMC_GR64Regs
const unsigned SystemZMC_GR64Regs[16]
Reg
Reg
Definition: X86DisassemblerDecoder.h:466
SystemZMC_VR128Regs
const unsigned SystemZMC_VR128Regs[32]
SystemZMC_FP128Regs
const unsigned SystemZMC_FP128Regs[16]
SystemZMC_AR32Regs
const unsigned SystemZMC_AR32Regs[16]
SystemZMC_VR64Regs
const unsigned SystemZMC_VR64Regs[32]
SystemZMC_FP64Regs
const unsigned SystemZMC_FP64Regs[16]

grpc
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autogenerated on Thu Mar 13 2025 03:01:28