user_board.h
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1 
8  /* This file is intended to contain definitions and configuration details for
9  * features and devices that are available on the board, e.g., frequency and
10  * startup time for an external crystal, external memory devices, LED and USART
11  * pins.
12  */
13 /*
14  * Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
15  */
16 
17 #ifndef USER_BOARD_H
18 #define USER_BOARD_H
19 
20 #include <conf_board.h>
21 #include "compiler.h"
22 //#include "system_same70.h"
23 #include "board.h"
24 //#include "conf_stdio.h" // enable/disabled printf
25 
26 
28 #define BOARD_FREQ_SLCK_XTAL (32768U)
29 #define BOARD_FREQ_SLCK_BYPASS (32768U)
30 #define BOARD_FREQ_MAINCK_XTAL (12000000U)
31 #define BOARD_FREQ_MAINCK_BYPASS (12000000U)
32 #define BOARD_FREQ_CPU 3000000 // CPU target frequency
33 
35 #define BOARD_MCK CHIP_FREQ_CPU_MAX
36 
38 // #define BOARD_OSC_STARTUP_US 15625
39 #define BOARD_OSC_STARTUP_US 13000
40 // #define BOARD_OSC_STARTUP_US 31250
41 
42 /*----------------------------------------------------------------------------*/
52 #define BOARD_NAME "IS_EVB-2"
53 
54 // #define same70xpld
56 #define same70
57 
58 #define cortexm7
59 
60 /*----------------------------------------------------------------------------*/
61 
62 
63 
66 
68 // Hardware Versions
69 // SAMS70N20B <=IMX-3.1
70 // SAME70Q20B >=IMX3.2
71 // SAME70Q20B EVB-2
72 
73 // EVB-2 Hardware Detection Pins
74 #define EVB_HDW_DETECT_0_GPIO (PIO_PC0_IDX)
75 #define EVB_HDW_DETECT_1_GPIO (PIO_PC1_IDX)
76 #define EVB_HDW_DETECT_2_GPIO (PIO_PC2_IDX)
77 
78 #define HDW_DETECT_VER_EVB_2_0_0 0
79 #define HDW_DETECT_VER_EVB_2_0_1 1
80 
81 
82 // uINS Ser0 UART
83 #define UART_INS_SER0_RXD_PIN (PIO_PA5_IDX)
84 #define UART_INS_SER0_RXD_FLAGS (IOPORT_MODE_MUX_C)
85 #define UART_INS_SER0_TXD_PIN (PIO_PA6_IDX)
86 #define UART_INS_SER0_TXD_FLAGS (IOPORT_MODE_MUX_C)
87 // uINS Ser1 UART Functionality
88 #define UART_INS_SER1_RXD_PIN (PIO_PA9_IDX)
89 #define UART_INS_SER1_RXD_FLAGS (IOPORT_MODE_MUX_A)
90 #define UART_INS_SER1_TXD_PIN (PIO_PA10_IDX)
91 #define UART_INS_SER1_TXD_FLAGS (IOPORT_MODE_MUX_A)
92 // uINS Ser1 SPI Functionality
93 #define SPI_INS_MISO_PIN (PIO_PD20_IDX)
94 #define SPI_INS_MISO_FLAGS (IOPORT_MODE_MUX_B)
95 #define SPI_INS_MOSI_PIN (PIO_PD21_IDX)
96 #define SPI_INS_MOSI_FLAGS (IOPORT_MODE_MUX_B)
97 #define SPI_INS_SCLK_PIN (PIO_PD22_IDX)
98 #define SPI_INS_SCLK_FLAGS (IOPORT_MODE_MUX_B)
99 #define SPI_INS_CS_PIN (PIO_PD12_IDX)
100 #define SPI_INS_CS_FLAGS (IOPORT_MODE_MUX_C)
101 #define SPI_INS_EN (PIO_PC20_IDX)
102 
103 // uINS Data Ready
104 #define INS_DATA_RDY_PIN_IDX (PIO_PD2_IDX)
105 #define INS_DATA_RDY_PIN_MASK (PIO_PD2)
106 #define INS_DATA_RDY_PIN_ID (ID_PIOD)
107 #define INS_DATA_RDY_PIN_PIO (PIOD)
108 
109 // uINS Reset
110 #define INS_RESET_PIN_PIN (PIO_PA2_IDX)
111 
112 // RS232/RS422/RS485
113 #define UART_SP330_RXD_PIN (PIO_PD28_IDX)
114 #define UART_SP330_RXD_FLAGS (IOPORT_MODE_MUX_A)
115 #define UART_SP330_TXD_PIN (PIO_PD30_IDX)
116 #define UART_SP330_TXD_FLAGS (IOPORT_MODE_MUX_A)
117 #define SP330_NSLEW_PIN (PIO_PA18_IDX) // Data rate limit to 250 kbps when low
118 #define SP330_NSHDN_PIN (PIO_PA19_IDX)
119 #define SP330_N485_RXEN_PIN (PIO_PA20_IDX) // RS845 enable receiver when low
120 #define SP330_NFULL_DPLX_PIN (PIO_PC18_IDX) // RS485 full duplex when low
121 #define SP330_485_N232_PIN (PIO_PD4_IDX) // RS232 low / RS485 high
122 
123 // SD Card Interface
124 #define SD_CLK_PIN (PIO_PA25_IDX)
125 #define SD_CLK_FLAGS (IOPORT_MODE_MUX_D)
126 #define SD_CMD_PIN (PIO_PA28_IDX)
127 #define SD_CMD_FLAGS (IOPORT_MODE_MUX_C)
128 #define SD_D0_PIN (PIO_PA30_IDX)
129 #define SD_D0_FLAGS (IOPORT_MODE_MUX_C)
130 #define SD_D1_PIN (PIO_PA31_IDX)
131 #define SD_D1_FLAGS (IOPORT_MODE_MUX_C)
132 #define SD_D2_PIN (PIO_PA25_IDX)
133 #define SD_D2_FLAGS (IOPORT_MODE_MUX_C)
134 #define SD_D3_PIN (PIO_PA27_IDX)
135 #define SD_D3_FLAGS (IOPORT_MODE_MUX_C)
136 #define SD_DETECT (PIO_PC16_IDX)
137 
138 // ATWINC WiFi SPI Interface
139 #define SPI_WIFI_MISO_PIN (PIO_PC26_IDX)
140 #define SPI_WIFI_MISO_FLAGS (IOPORT_MODE_MUX_C)
141 #define SPI_WIFI_MOSI_PIN (PIO_PC27_IDX)
142 #define SPI_WIFI_MOSI_FLAGS (IOPORT_MODE_MUX_C)
143 #define SPI_WIFI_SCLK_PIN (PIO_PC24_IDX)
144 #define SPI_WIFI_SCLK_FLAGS (IOPORT_MODE_MUX_C)
145 #define SPI_WIFI_CS_PIN (PIO_PC25_IDX)
146 #define SPI_WIFI_CS_FLAGS (IOPORT_MODE_MUX_C)
147 #define WIFI_RST_PIN (PIO_PC21_IDX)
148 #define WIFI_CHIPEN_PIN (PIO_PC22_IDX)
149 #define WIFI_IRQN_PIN (PIO_PC23_IDX)
150 
151 // ATWINC BTLE UART Interface
152 #define UART_BTLE_RXD_PIN (PIO_PD15_IDX)
153 #define UART_BTLE_RXD_FLAGS (IOPORT_MODE_MUX_B)
154 #define UART_BTLE_TXD_PIN (PIO_PD16_IDX)
155 #define UART_BTLE_TXD_FLAGS (IOPORT_MODE_MUX_B)
156 #define UART_BTLE_RTS_PIN (PIO_PD18_IDX)
157 #define UART_BTLE_RTS_FLAGS (IOPORT_MODE_MUX_B)
158 #define UART_BTLE_CTS_PIN (PIO_PD19_IDX)
159 #define UART_BTLE_CTS_FLAGS (IOPORT_MODE_MUX_B)
160 
161 // External Radio UART
162 #define UART_EXT_RADIO_RXD_PIN (PIO_PD25_IDX)
163 #define UART_EXT_RADIO_RXD_FLAGS (IOPORT_MODE_MUX_C | IOPORT_MODE_PULLUP)
164 #define UART_EXT_RADIO_TXD_PIN (PIO_PD26_IDX)
165 #define UART_EXT_RADIO_TXD_FLAGS (IOPORT_MODE_MUX_C)
166 #define EXT_RADIO_RST (PIO_PD7_IDX)
167 
168 // Xbee UART
169 #define UART_XBEE_RXD_PIN (PIO_PB0_IDX)
170 #define UART_XBEE_RXD_FLAGS (IOPORT_MODE_MUX_C)
171 #define UART_XBEE_TXD_PIN (PIO_PB1_IDX)
172 #define UART_XBEE_TXD_FLAGS (IOPORT_MODE_MUX_C)
173 #if 0 // Normal (EVB-2.0.1)
174 #define UART_XBEE_N_CTS_PIN (PIO_PB2_IDX)
175 #define UART_XBEE_N_CTS_FLAGS (IOPORT_MODE_MUX_C)
176 #define UART_XBEE_N_RTS_PIN (PIO_PB3_IDX)
177 #define UART_XBEE_N_RTS_FLAGS (IOPORT_MODE_MUX_C)
178 #else // temporary fix (EVB-2.0.0)
179 #define UART_XBEE_N_CTS_PIN (PIO_PB3_IDX)
180 #define UART_XBEE_N_CTS_FLAGS (IOPORT_MODE_MUX_C)
181 #define UART_XBEE_N_RTS_PIN (PIO_PB2_IDX)
182 #define UART_XBEE_N_RTS_FLAGS (IOPORT_MODE_MUX_C)
183 #endif
184 #define UART_XBEE_N_DTR_PIN (PIO_PD1_IDX)
185 #define UART_XBEE_N_DTR_FLAGS (IOPORT_MODE_MUX_D)
186 #define XBEE_SUPPLY_EN_PIN (PIO_PD17_IDX)
187 #define XBEE_VUSB_DISABLE_PIN (PIO_PC3_IDX)
188 #define XBEE_RST_PIN (PIO_PA29_IDX)
189 #define XBEE_SLEEP_RQ_PIN (PIO_PD1_IDX)
190 
191 // USB
192 #define USB_PORT_NUM EVB2_PORT_USB
193 
194 // CAN Transceiver
195 #define CAN_RXD_PIN (PIO_PC12_IDX)
196 #define CAN_RXD_FLAGS (IOPORT_MODE_MUX_C)
197 #define CAN_TXD_PIN (PIO_PC14_IDX)
198 #define CAN_TXD_FLAGS (IOPORT_MODE_MUX_C)
199 
200 // I2C Bus
201 #define I2C_0_SDA_PIN (PIO_PA3_IDX)
202 #define I2C_0_SDA_FLAGS (IOPORT_MODE_MUX_A)
203 #define I2C_0_SCL_PIN (PIO_PA4_IDX)
204 #define I2C_0_SCL_FLAGS (IOPORT_MODE_MUX_A)
205 
206 // GPS Time Pulse Input
207 #define GPS_TP_PIN (PIO_PC9_IDX)
208 
209 
210 // H8 GPIO Pins - GPIO pins are all tied to multiple SAME70 pins. Below is just one of these pins.
211 #define GPIO_1_PIN (PIO_PB4_IDX)
212 #define GPIO_2_PIN (PIO_PA16_IDX) // + PA21
213 #define GPIO_3_PIN (PIO_PA23_IDX) // + PA0 + PE3
214 #define GPIO_4_PIN (PIO_PA24_IDX) // + PA1
215 #define GPIO_5_PIN (PIO_PB13_IDX) // + PC5 + PC29
216 #define GPIO_6_PIN (PIO_PC6_IDX) // + PD0
217 #define GPIO_7_PIN (PIO_PC9_IDX)
218 #define GPIO_8_PIN (PIO_PE4_IDX) // + PD27
219 #define GPIO_9_PIN (PIO_PE0_IDX) // + PA15 + PC13
220 #define GPIO_10_PIN (PIO_PE1_IDX) // + PC15
221 // GPIO Inverted UART Control
222 #define GPIO_UART_INV_PIN (PIO_PE2_IDX)
223 
224 // GPIO UART
225 #define GPIO_H8_UART_RXD_PIN (PIO_PA21_IDX)
226 #define GPIO_H8_UART_RXD_FLAGS (IOPORT_MODE_MUX_A | IOPORT_MODE_PULLUP)
227 // #define GPIO_H8_UART_RXD_FLAGS (IOPORT_MODE_MUX_A)
228 #define GPIO_H8_UART_TXD_PIN (PIO_PB4_IDX)
229 #define GPIO_H8_UART_TXD_FLAGS (IOPORT_MODE_MUX_D)
230 
231 
232 // USB ID
233 #define M_USB_ID_PIN (PIO_PA17_IDX)
234 
235 #define LED_OFF(led) ioport_set_pin_level(led,IOPORT_PIN_LEVEL_HIGH)
236 #define LED_ON(led) ioport_set_pin_level(led,IOPORT_PIN_LEVEL_LOW)
237 #define LED_TOGGLE(led) ioport_toggle_pin_level(led)
238 // EVB - LED - Config
239 #define LED_CFG_RED_PIN (PIO_PD6_IDX)
240 #define LED_CFG_GRN_PIN (PIO_PA13_IDX)
241 #define LED_CFG_BLU_PIN (PIO_PD3_IDX)
242 #define LED_CFG_RED() { LED_ON(LED_CFG_RED_PIN); LED_OFF(LED_CFG_GRN_PIN); LED_OFF(LED_CFG_BLU_PIN); }
243 #define LED_CFG_GREEN() { LED_OFF(LED_CFG_RED_PIN); LED_ON(LED_CFG_GRN_PIN); LED_OFF(LED_CFG_BLU_PIN); }
244 #define LED_CFG_BLUE() { LED_OFF(LED_CFG_RED_PIN); LED_OFF(LED_CFG_GRN_PIN); LED_ON(LED_CFG_BLU_PIN); }
245 #define LED_CFG_CYAN() { LED_OFF(LED_CFG_RED_PIN); LED_ON(LED_CFG_GRN_PIN); LED_ON(LED_CFG_BLU_PIN); }
246 #define LED_CFG_YELLOW() { LED_ON(LED_CFG_RED_PIN); LED_ON(LED_CFG_GRN_PIN); LED_OFF(LED_CFG_BLU_PIN); }
247 #define LED_CFG_PURPLE() { LED_ON(LED_CFG_RED_PIN); LED_OFF(LED_CFG_GRN_PIN); LED_ON(LED_CFG_BLU_PIN); }
248 #define LED_CFG_WHITE() { LED_ON(LED_CFG_RED_PIN); LED_ON(LED_CFG_GRN_PIN); LED_ON(LED_CFG_BLU_PIN); }
249 #define LED_CFG_OFF() { LED_OFF(LED_CFG_RED_PIN); LED_OFF(LED_CFG_GRN_PIN); LED_OFF(LED_CFG_BLU_PIN); }
250 
251 #define LED_COLOR_RED() LED_CFG_RED();
252 #define LED_COLOR_GREEN() LED_CFG_GREEN();
253 #define LED_COLOR_BLUE() LED_CFG_BLUE();
254 #define LED_COLOR_CYAN() LED_CFG_CYAN();
255 #define LED_COLOR_YELLOW() LED_CFG_YELLOW();
256 #define LED_COLOR_PURPLE() LED_CFG_PURPLE();
257 #define LED_COLOR_WHITE() LED_CFG_WHITE();
258 
259 // EVB - LED - Logger
260 #define LED_LOG_RED_PIN (PIO_PA11_IDX)
261 #define LED_LOG_GRN_PIN (PIO_PD23_IDX)
262 #define LED_LOG_BLU_PIN (PIO_PA12_IDX)
263 #define LED_LOG_RED() { LED_ON(LED_LOG_RED_PIN); LED_OFF(LED_LOG_GRN_PIN); LED_OFF(LED_LOG_BLU_PIN); }
264 #define LED_LOG_GREEN() { LED_OFF(LED_LOG_RED_PIN); LED_ON(LED_LOG_GRN_PIN); LED_OFF(LED_LOG_BLU_PIN); }
265 #define LED_LOG_BLUE() { LED_OFF(LED_LOG_RED_PIN); LED_OFF(LED_LOG_GRN_PIN); LED_ON(LED_LOG_BLU_PIN); }
266 #define LED_LOG_CYAN() { LED_OFF(LED_LOG_RED_PIN); LED_ON(LED_LOG_GRN_PIN); LED_ON(LED_LOG_BLU_PIN); }
267 #define LED_LOG_YELLOW() { LED_ON(LED_LOG_RED_PIN); LED_ON(LED_LOG_GRN_PIN); LED_OFF(LED_LOG_BLU_PIN); }
268 #define LED_LOG_PURPLE() { LED_ON(LED_LOG_RED_PIN); LED_OFF(LED_LOG_GRN_PIN); LED_ON(LED_LOG_BLU_PIN); }
269 #define LED_LOG_WHITE() { LED_ON(LED_LOG_RED_PIN); LED_ON(LED_LOG_GRN_PIN); LED_ON(LED_LOG_BLU_PIN); }
270 #define LED_LOG_OFF() { LED_OFF(LED_LOG_RED_PIN); LED_OFF(LED_LOG_GRN_PIN); LED_OFF(LED_LOG_BLU_PIN); }
271 
272 #define LEDS_ALL_ON() { LED_ON(LED_LOG_RED_PIN); LED_ON(LED_LOG_GRN_PIN); LED_ON(LED_LOG_BLU_PIN); }
273 #define LEDS_ALL_OFF() { LED_OFF(LED_LOG_RED_PIN); LED_OFF(LED_LOG_GRN_PIN); LED_OFF(LED_LOG_BLU_PIN); }
274 #define LEDS_ALL_TOGGLE() { LED_TOGGLE(LED_LOG_RED_PIN); LED_TOGGLE(LED_LOG_GRN_PIN); LED_TOGGLE(LED_LOG_BLU_PIN); }
275 
276 
277 
278 // LED - INS Communications
279 #define LED_INS_RXD_PIN (PIO_PC8_IDX) // green
280 #define LED_INS_TXD_PIN (PIO_PC28_IDX) // red
281 // LED - Xbee Communications
282 #define LED_XBEE_RXD_PIN (PIO_PC10_IDX) // green
283 #define LED_XBEE_TXD_PIN (PIO_PC11_IDX) // red
284 // LED - Wifi Communications
285 #define LED_WIFI_RXD_PIN (PIO_PC17_IDX) // green
286 #define LED_WIFI_TXD_PIN (PIO_PD10_IDX) // red
287 
288 // Buttons
289 #define BUTTON_CFG_PIN (g_hdw_detect==0?PIO_PC5_IDX:PIO_PC3_IDX) // EVB 2.0.0 = PC5, all others are PC3
290 #define BUTTON_CFG_FLAGS (IOPORT_MODE_PULLUP | IOPORT_MODE_DEBOUNCE)
291 #define BUTTON_CFG_SENSE (IOPORT_SENSE_LEVEL_LOW)
292 #define BUTTON_LOG_PIN (g_hdw_detect==0?PIO_PC6_IDX:PIO_PC7_IDX) // EVB 2.0.0 = PC6, all others are PC7
293 #define BUTTON_LOG_FLAGS (IOPORT_MODE_PULLUP | IOPORT_MODE_DEBOUNCE)
294 #define BUTTON_LOG_SENSE (IOPORT_SENSE_LEVEL_LOW)
295 
296 #define JTAG_TMS_SWDIO_PIN (PIO_PB6_IDX)
297 #define JTAG_TCK_SWCLK_PIN (PIO_PB7_IDX)
298 #define JTAG_TDO_SWO_PIN (PIO_PB5_IDX)
299 #define JTAG_TDI_PIN (PIO_PB4_IDX)
300 
301 
302 // ioport helper macros below acquired from same70_xplained/init.c
303 #ifndef ioport_set_port_peripheral_mode
304 #define ioport_set_port_peripheral_mode(port, masks, mode) \
305  do {\
306  ioport_set_port_mode(port, masks, mode);\
307  ioport_disable_port(port, masks);\
308  } while (0)
309 #endif // ioport_set_port_peripheral_mode
310 
311 #ifndef ioport_set_pin_peripheral_mode
312 #define ioport_set_pin_peripheral_mode(pin, mode) \
313  do {\
314  ioport_set_pin_mode(pin, mode);\
315  ioport_disable_pin(pin);\
316  } while (0)
317 #endif // ioport_set_pin_peripheral_mode
318 
319 // The following "ioport_enable_pin(pin);" line is necessary to allow tristate. (whj)
320 #ifndef ioport_set_pin_input_mode
321 #define ioport_set_pin_input_mode(pin, mode, sense) \
322  do {\
323  ioport_enable_pin(pin);\
324  ioport_set_pin_dir(pin, IOPORT_DIR_INPUT);\
325  ioport_set_pin_mode(pin, mode);\
326  ioport_set_pin_sense_mode(pin, (ioport_sense)sense);\
327  } while (0)
328 #endif // ioport_set_pin_input_mode
329 
330 #ifndef ioport_set_pin_output_mode
331 #define ioport_set_pin_output_mode(pin, level) \
332  do {\
333  ioport_enable_pin(pin);\
334  ioport_set_pin_level(pin, level);\
335  ioport_set_pin_dir(pin, IOPORT_DIR_OUTPUT);\
336  } while (0)
337 #endif // ioport_set_pin_output_mode
338 
341 // START OF same70_xplained.h defaults
344 
345 // #define CONSOLE_UART (USART1)
346 // #define CONSOLE_UART_ID (ID_USART1)
347 // /** USART1 pins definitions, PA21,PB4. */
348 // #define USART1_RXD_GPIO (PIO_PA21_IDX)
349 // #define USART1_RXD_FLAGS (IOPORT_MODE_MUX_A | IOPORT_MODE_PULLUP)
350 // #define USART1_TXD_GPIO (PIO_PB4_IDX)
351 // #define USART1_TXD_FLAGS (IOPORT_MODE_MUX_D)
352 
353 // /** USART0 pins definitions, PB0,PB1. */
354 // #define USART0_RXD_GPIO (PIO_PB0_IDX
355 // #define USART0_RXD_FLAGS (IOPORT_MODE_MUX_C | IOPORT_MODE_PULLUP)
356 // #define USART0_TXD_GPIO (PIO_PB1_IDX)
357 // #define USART0_TXD_FLAGS (IOPORT_MODE_MUX_C)
358 
359 #define PIN_USART0_SCK_IDX (PIO_PB13_IDX)
360 #define PIN_USART0_SCK_FLAGS (IOPORT_MODE_MUX_C)
361 
363 #define PIN_USART0_CTS_IDX (PIO_PB2_IDX)
364 #define PIN_USART0_CTS_FLAGS (IOPORT_MODE_MUX_C)
365 
367 #define PIN_USART0_RTS_IDX (PIO_PB3_IDX)
368 #define PIN_USART0_RTS_FLAGS (IOPORT_MODE_MUX_C)
369 
372 #define SD_MMC_HSMCI_MEM_CNT 1
373 #define SD_MMC_HSMCI_SLOT_0_SIZE 4
374 
375 #define PIN_HSMCI_MCCDA_GPIO (PIO_PA28_IDX)
376 #define PIN_HSMCI_MCCDA_FLAGS (IOPORT_MODE_MUX_C)
377 
378 #define PIN_HSMCI_MCCK_GPIO (PIO_PA25_IDX)
379 #define PIN_HSMCI_MCCK_FLAGS (IOPORT_MODE_MUX_D)
380 
381 #define PIN_HSMCI_MCDA0_GPIO (PIO_PA30_IDX)
382 #define PIN_HSMCI_MCDA0_FLAGS (IOPORT_MODE_MUX_C)
383 
384 #define PIN_HSMCI_MCDA1_GPIO (PIO_PA31_IDX)
385 #define PIN_HSMCI_MCDA1_FLAGS (IOPORT_MODE_MUX_C)
386 
387 #define PIN_HSMCI_MCDA2_GPIO (PIO_PA26_IDX)
388 #define PIN_HSMCI_MCDA2_FLAGS (IOPORT_MODE_MUX_C)
389 
390 #define PIN_HSMCI_MCDA3_GPIO (PIO_PA27_IDX)
391 #define PIN_HSMCI_MCDA3_FLAGS (IOPORT_MODE_MUX_C)
392 
394 #define PIN_HSMCI_CD {PIO_PC16, PIOD, ID_PIOD, PIO_INPUT, PIO_PULLUP}
395 #define SD_MMC_0_CD_GPIO (PIO_PC16_IDX)
396 #define SD_MMC_0_CD_PIO_ID ID_PIOD
397 #define SD_MMC_0_CD_FLAGS (IOPORT_MODE_PULLUP)
398 #define SD_MMC_0_CD_DETECT_VALUE 0
399 
400 
402 
403 // #define SW0_PIN (PIO_PA11_IDX)
404 // #define SW0_ACTIVE (IOPORT_PIN_LEVEL_LOW)
405 // #define SW0_INACTIVE (!SW0_ACTIVE)
406 // #define SW0_SUPC_INPUT 2
407 
412 // #define PIN_SW0 {PIO_PA11, PIOA, ID_PIOA, PIO_INPUT, PIO_PULLUP | PIO_DEBOUNCE | PIO_IT_RISE_EDGE}
413 // #define PIN_SW0_MASK PIO_PA11
414 // #define PIN_SW0_PIO PIOA
415 // #define PIN_SW0_ID ID_PIOA
416 // #define PIN_SW0_TYPE PIO_INPUT
417 // #define PIN_SW0_ATTR (PIO_PULLUP | PIO_DEBOUNCE | PIO_IT_RISE_EDGE)
419 
427 // #define LED_0_NAME "LED0 (yellow)"
428 // #define LED_0_PIN LED0_GPIO
429 // #define LED_0_ACTIVE LED0_ACTIVE_LEVEL
430 // #define LED_0_INACTIVE LED0_INACTIVE_LEVEL
431 
432 // #define PIN_LED_0 {PIO_PC8, PIOC, ID_PIOC, PIO_OUTPUT_1, PIO_DEFAULT}
433 // #define PIN_LED_0_MASK PIO_PC8
434 // #define PIN_LED_0_PIO PIOC
435 // #define PIN_LED_0_ID ID_PIOC
436 // #define PIN_LED_0_TYPE PIO_OUTPUT_1
437 // #define PIN_LED_0_ATTR PIO_DEFAULT
439 
440 /* TC-- Timer Count */
441 // #define PIN_TC0_TIOA0 (PIO_PA0_IDX)
442 // #define PIN_TC0_TIOA0_MUX (IOPORT_MODE_MUX_B)
443 // #define PIN_TC0_TIOA0_FLAGS (IOPORT_MODE_MUX_B)
444 //
445 // #define PIN_TC0_TIOA0_PIO PIOA
446 // #define PIN_TC0_TIOA0_MASK PIO_PA0
447 // #define PIN_TC0_TIOA0_ID ID_PIOA
448 // #define PIN_TC0_TIOA0_TYPE PIO_PERIPH_B
449 // #define PIN_TC0_TIOA0_ATTR PIO_DEFAULT
450 //
451 // #define PIN_TC3_TIOA11 (PIO_PD21_IDX)
452 // #define PIN_TC3_TIOA11_MUX (IOPORT_MODE_MUX_C)
453 // #define PIN_TC3_TIOA11_FLAGS (IOPORT_MODE_MUX_C)
454 //
455 // #define PIN_TC3_TIOA11_PIO PIOD
456 // #define PIN_TC3_TIOA11_MASK PIO_PD21
457 // #define PIN_TC3_TIOA11_ID ID_PIOD
458 // #define PIN_TC3_TIOA11_TYPE PIO_PERIPH_C
459 // #define PIN_TC3_TIOA11_ATTR PIO_DEFAULT
460 //
461 // //! Number of on-board LEDs
462 // #define BOARD_NUM_OF_LED 1
463 
468 // #define BUTTON_0_NAME "SW0"
469 // #define BUTTON_0_PIN SW0_PIN
470 // #define BUTTON_0_ACTIVE SW0_ACTIVE
471 // #define BUTTON_0_INACTIVE SW0_INACTIVE
472 // #define BUTTON_0_SUPC_INPUT SW0_SUPC_INPUT
473 // #define GPIO_PUSH_BUTTON_0 BUTTON_0_PIN
474 //
475 // #define PUSHBUTTON_1_NAME "SW0"
476 // #define PUSHBUTTON_1_WKUP_LINE (2)
477 // #define PUSHBUTTON_1_WKUP_FSTT (PMC_FSMR_FSTT2)
478 // #define GPIO_PUSH_BUTTON_1 (PIO_PA11_IDX)
479 // #define GPIO_PUSH_BUTTON_1_FLAGS (IOPORT_MODE_PULLUP | IOPORT_MODE_DEBOUNCE)
480 // #define GPIO_PUSH_BUTTON_1_SENSE (IOPORT_SENSE_RISING)
481 //
482 // #define PIN_PUSHBUTTON_1 {PIO_PA11, PIOA, ID_PIOA, PIO_INPUT, \
483 // PIO_PULLUP | PIO_DEBOUNCE | PIO_IT_RISE_EDGE}
484 // #define PIN_PUSHBUTTON_1_MASK PIO_PA11
485 // #define PIN_PUSHBUTTON_1_PIO PIOA
486 // #define PIN_PUSHBUTTON_1_ID ID_PIOA
487 // #define PIN_PUSHBUTTON_1_TYPE PIO_INPUT
488 // #define PIN_PUSHBUTTON_1_ATTR (PIO_PULLUP | PIO_DEBOUNCE | PIO_IT_RISE_EDGE)
489 // #define PIN_PUSHBUTTON_1_IRQn PIOA_IRQn
490 //
491 // /** List of all push button definitions. */
492 // #define PINS_PUSHBUTTONS {PIN_PUSHBUTTON_1}
493 
494 // //! \name Extension header #1 pin definitions
495 // //@{
496 // #define EXT1_PIN_3 PIO_PC31_IDX
497 // #define EXT1_PIN_4 PIO_PA19_IDX
498 // #define EXT1_PIN_5 PIO_PB3_IDX
499 // #define EXT1_PIN_6 PIO_PB2_IDX
500 // #define EXT1_PIN_7 PIO_PA0_IDX
501 // #define EXT1_PIN_8 PIO_PC30_IDX
502 // #define EXT1_PIN_9 PIO_PD28_IDX
503 // #define EXT1_PIN_10 PIO_PC17_IDX
504 // #define EXT1_PIN_11 PIO_PA3_IDX
505 // #define EXT1_PIN_12 PIO_PA4_IDX
506 // #define EXT1_PIN_13 PIO_PB0_IDX
507 // #define EXT1_PIN_14 PIO_PB1_IDX
508 // #define EXT1_PIN_15 PIO_PD25_IDX
509 // #define EXT1_PIN_16 PIO_PD21_IDX
510 // #define EXT1_PIN_17 PIO_PD20_IDX
511 // #define EXT1_PIN_18 PIO_PD22_IDX
512 // //@}
513 //
514 // //! \name Extension header #1 pin definitions by function
515 // //@{
516 // #define EXT1_PIN_ADC_0 EXT1_PIN_3
517 // #define EXT1_PIN_ADC_1 EXT1_PIN_4
518 // #define EXT1_PIN_GPIO_0 EXT1_PIN_5
519 // #define EXT1_PIN_GPIO_1 EXT1_PIN_6
520 // #define EXT1_PIN_PWM_0 EXT1_PIN_7
521 // #define EXT1_PIN_PWM_1 EXT1_PIN_8
522 // #define EXT1_PIN_IRQ EXT1_PIN_9
523 // #define EXT1_PIN_TWI_SDA EXT1_PIN_11
524 // #define EXT1_PIN_TWI_SCL EXT1_PIN_12
525 // #define EXT1_PIN_UART_RX EXT1_PIN_13
526 // #define EXT1_PIN_UART_TX EXT1_PIN_14
527 // #define EXT1_PIN_SPI_SS_1 EXT1_PIN_10
528 // #define EXT1_PIN_SPI_SS_0 EXT1_PIN_15
529 // #define EXT1_PIN_SPI_MOSI EXT1_PIN_16
530 // #define EXT1_PIN_SPI_MISO EXT1_PIN_17
531 // #define EXT1_PIN_SPI_SCK EXT1_PIN_18
532 // //@}
533 //
534 // //! \name Extension header #2 pin definitions
535 // //@{
536 // #define EXT2_PIN_3 PIO_PD30_IDX
537 // #define EXT2_PIN_4 PIO_PC13_IDX
538 // #define EXT2_PIN_5 PIO_PA6_IDX
539 // #define EXT2_PIN_6 PIO_PD11_IDX
540 // #define EXT2_PIN_7 PIO_PC19_IDX
541 // #define EXT2_PIN_8 PIO_PD26_IDX
542 // #define EXT2_PIN_9 PIO_PA2_IDX
543 // #define EXT2_PIN_10 PIO_PA24_IDX
544 // #define EXT2_PIN_11 PIO_PA3_IDX
545 // #define EXT2_PIN_12 PIO_PA4_IDX
546 // #define EXT2_PIN_13 PIO_PA21_IDX
547 // #define EXT2_PIN_14 PIO_PB4_IDX
548 // #define EXT2_PIN_15 PIO_PD27_IDX
549 // #define EXT2_PIN_16 PIO_PD21_IDX
550 // #define EXT2_PIN_17 PIO_PD20_IDX
551 // #define EXT2_PIN_18 PIO_PD22_IDX
552 // //@}
553 //
554 // //! \name Extension header #2 pin definitions by function
555 // //@{
556 // #define EXT2_PIN_ADC_0 EXT2_PIN_3
557 // #define EXT2_PIN_ADC_1 EXT2_PIN_4
558 // #define EXT2_PIN_GPIO_0 EXT2_PIN_5
559 // #define EXT2_PIN_GPIO_1 EXT2_PIN_6
560 // #define EXT2_PIN_PWM_0 EXT2_PIN_7
561 // #define EXT2_PIN_PWM_1 EXT2_PIN_8
562 // #define EXT2_PIN_IRQ EXT2_PIN_9
563 // #define EXT2_PIN_TWI_SDA EXT2_PIN_11
564 // #define EXT2_PIN_TWI_SCL EXT2_PIN_12
565 // #define EXT2_PIN_UART_RX EXT2_PIN_13
566 // #define EXT2_PIN_UART_TX EXT2_PIN_14
567 // #define EXT2_PIN_SPI_SS_1 EXT2_PIN_10
568 // #define EXT2_PIN_SPI_SS_0 EXT2_PIN_15
569 // #define EXT2_PIN_SPI_MOSI EXT2_PIN_16
570 // #define EXT2_PIN_SPI_MISO EXT2_PIN_17
571 // #define EXT2_PIN_SPI_SCK EXT2_PIN_18
572 // //@}
573 
574 // /** PCK0 pin definition (PA6) */
575 // #define PIN_PCK0 (PIO_PA6_IDX)
576 // #define PIN_PCK0_MUX (IOPORT_MODE_MUX_B)
577 // #define PIN_PCK0_FLAGS (IOPORT_MODE_MUX_B)
578 // #define PIN_PCK0_PORT IOPORT_PIOA
579 // #define PIN_PCK0_MASK PIO_PA6B_PCK0
580 // #define PIN_PCK0_PIO PIOA
581 // #define PIN_PCK0_ID ID_PIOA
582 // #define PIN_PCK0_TYPE PIO_PERIPH_B
583 // #define PIN_PCK0_ATTR PIO_DEFAULT
584 //
585 //
586 // /** TWI0 pins definition */
587 // #define TWIHS0_DATA_GPIO PIO_PA3_IDX
588 // #define TWIHS0_DATA_FLAGS (IOPORT_MODE_MUX_A)
589 // #define TWIHS0_CLK_GPIO PIO_PA4_IDX
590 // #define TWIHS0_CLK_FLAGS (IOPORT_MODE_MUX_A)
591 //
592 // /** SPI0 pins definition */
593 // #define SPI0_MISO_GPIO PIO_PD20_IDX
594 // #define SPI0_MISO_FLAGS (IOPORT_MODE_MUX_B)
595 // #define SPI0_MOSI_GPIO PIO_PD21_IDX
596 // #define SPI0_MOSI_FLAGS (IOPORT_MODE_MUX_B)
597 // #define SPI0_NPCS0_GPIO PIO_PB2_IDX
598 // #define SPI0_NPCS0_FLAGS (IOPORT_MODE_MUX_D)
599 // #define SPI0_NPCS1_GPIO PIO_PD25_IDX
600 // #define SPI0_NPCS1_FLAGS (IOPORT_MODE_MUX_B)
601 // #define SPI0_NPCS2_GPIO PIO_PD12_IDX
602 // #define SPI0_NPCS2_FLAGS (IOPORT_MODE_MUX_C)
603 // #define SPI0_NPCS3_GPIO PIO_PD27_IDX
604 // #define SPI0_NPCS3_FLAGS (IOPORT_MODE_MUX_B)
605 // #define SPI0_SPCK_GPIO PIO_PD22_IDX
606 // #define SPI0_SPCK_FLAGS (IOPORT_MODE_MUX_B)
607 
608 // /** QSPI pins definition */
609 // #define QSPI_QSCK_GPIO PIO_PA14_IDX
610 // #define QSPI_QSCK_FLAGS (IOPORT_MODE_MUX_A)
611 // #define QSPI_QCS_GPIO PIO_PA11_IDX
612 // #define QSPI_QCS_FLAGS (IOPORT_MODE_MUX_A)
613 // #define QSPI_QIO0_GPIO PIO_PA13_IDX
614 // #define QSPI_QIO0_FLAGS (IOPORT_MODE_MUX_A)
615 // #define QSPI_QIO1_GPIO PIO_PA12_IDX
616 // #define QSPI_QIO1_FLAGS (IOPORT_MODE_MUX_A)
617 // #define QSPI_QIO2_GPIO PIO_PA17_IDX
618 // #define QSPI_QIO2_FLAGS (IOPORT_MODE_MUX_A)
619 // #define QSPI_QIO3_GPIO PIO_PD31_IDX
620 // #define QSPI_QIO3_FLAGS (IOPORT_MODE_MUX_A)
621 
622 // /** AFEC channel for potentiometer */
623 // #define AFEC_CHANNEL_POTENTIOMETER AFEC_CHANNEL_0
624 //
625 // #define MCAN_MODULE MCAN1
626 /*----------------------------------------------------------------------------*/
644 // /** CAN0 transceiver PIN RS. */
645 // #define PIN_CAN0_TR_RS_IDX PIO_PE0_IDX
646 // #define PIN_CAN0_TR_RS_FLAGS IOPORT_DIR_OUTPUT
647 //
648 // /** CAN0 transceiver PIN EN. */
649 // #define PIN_CAN0_TR_EN_IDX PIO_PE1_IDX
650 // #define PIN_CAN0_TR_EN_FLAGS IOPORT_DIR_OUTPUT
651 //
652 // /** CAN0 PIN RX. */
653 // #define PIN_CAN0_RX_IDX PIO_PB3_IDX
654 // #define PIN_CAN0_RX_FLAGS IOPORT_MODE_MUX_A
655 //
656 // /** CAN0 PIN TX. */
657 // #define PIN_CAN0_TX_IDX PIO_PB2_IDX
658 // #define PIN_CAN0_TX_FLAGS IOPORT_MODE_MUX_A
659 //
660 // /** CAN1 transceiver PIN RS. */
661 // #define PIN_CAN1_TR_RS_IDX PIO_PE2_IDX
662 // #define PIN_CAN1_TR_RS_FLAGS IOPORT_DIR_OUTPUT
663 //
664 // /** CAN1 transceiver PIN EN. */
665 // #define PIN_CAN1_TR_EN_IDX PIO_PE3_IDX
666 // #define PIN_CAN1_TR_EN_FLAGS IOPORT_DIR_OUTPUT
667 //
668 // /** CAN1 PIN RX. */
669 // #define PIN_CAN1_RX_IDX PIO_PC12_IDX
670 // #define PIN_CAN1_RX_FLAGS IOPORT_MODE_MUX_C
671 //
672 // /** CAN1 PIN TX. */
673 // #define PIN_CAN1_TX_IDX PIO_PC14_IDX
674 // #define PIN_CAN1_TX_FLAGS IOPORT_MODE_MUX_C
675 //
676 // /** PWM LED0 pin definitions. */
677 // #define PIN_PWM_LED0_GPIO PIO_PA23_IDX
678 // #define PIN_PWM_LED0_FLAGS (IOPORT_MODE_MUX_B)
679 // #define PIN_PWM_LED0_CHANNEL PWM_CHANNEL_0
680 //
681 // /** PWM LED1 pin definitions. */
682 // #define PIN_PWM_LED1_GPIO PIO_PA24_IDX
683 // #define PIN_PWM_LED1_FLAGS (IOPORT_MODE_MUX_B)
684 // #define PIN_PWM_LED1_CHANNEL PWM_CHANNEL_1
685 
686 /*----------------------------------------------------------------------------*/
687 // /** GMAC HW configurations */
688 // #define BOARD_GMAC_PHY_ADDR 0
689 //
690 // #define PIN_GMAC_RESET_MASK PIO_PC10
691 // #define PIN_GMAC_RESET_PIO PIOC
692 // #define PIN_GMAC_INT_MASK PIO_PA14
693 // #define PIN_GMAC_INT_PIO PIOA
694 // #define PIN_GMAC_PERIPH PIO_PERIPH_A
695 // #define PIN_GMAC_PIO PIOD
696 // #define PIN_GMAC_MASK (PIO_PD0A_GTXCK | PIO_PD1A_GTXEN | PIO_PD2A_GTX0 | \
697 // PIO_PD3A_GTX1 | PIO_PD4A_GRXDV | PIO_PD5A_GRX0 | \
698 // PIO_PD6A_GRX1 | PIO_PD7A_GRXER | PIO_PD8A_GMDC | \
699 // PIO_PD9A_GMDIO)
700 //
701 // /** Board configuration of the AT24MAC EEPROM */
702 // #define BOARD_AT24MAC_TWIHS TWIHS0
703 // //#define BOARD_AT24MAC_ADDRESS (0xBE >> 1)
704 // #define BOARD_AT24MAC_TWIHS_CLK (400000UL)
705 // #define BOARD_AT24MAC_PAGE_SIZE 16
706 // #define BOARD_AT24MAC_TWIHS_INSTANCE TWIHS0
707 // #define BOARD_AT24MAC_ADDRESS (0xAE >> 1)
708 // #define BOARD_CLK_TWIHS_EEPROM PIO_PA4
709 
710 // /** EBI pins configuration for LCD */
711 // /** LCD reset pin */
712 // #define PIN_EBI_RESET_MASK PIO_PC13
713 // #define PIN_EBI_RESET_PIO PIOC
714 // #define PIN_EBI_RESET_TYPE PIO_OUTPUT_1
715 // #define PIN_EBI_RESET_ATTRI PIO_DEFAULT
716 //
717 // /** LCD command/data select pin */
718 // #define PIN_EBI_CDS_MASK PIO_PC30
719 // #define PIN_EBI_CDS_PIO PIOC
720 // #define PIN_EBI_CDS_TYPE PIO_OUTPUT_1
721 // #define PIN_EBI_CDS_ATTRI PIO_DEFAULT
722 //
723 // /** LCD data pin */
724 // #define PIN_EBI_DATAL_MASK 0xFF
725 // #define PIN_EBI_DATAL_PIO PIOC
726 // #define PIN_EBI_DATAL_TYPE PIO_PERIPH_A
727 // #define PIN_EBI_DATAL_ATTRI PIO_PULLUP
728 //
729 // #define PIN_EBI_DATAH_0_MASK 0x3F
730 // #define PIN_EBI_DATAH_0_PIO PIOE
731 // #define PIN_EBI_DATAH_0_TYPE PIO_PERIPH_A
732 // #define PIN_EBI_DATAH_0_ATTRI PIO_PULLUP
733 //
734 // #define PIN_EBI_DATAH_1_MASK (PIO_PA15A_D14|PIO_PA16A_D15)
735 // #define PIN_EBI_DATAH_1_PIO PIOA
736 // #define PIN_EBI_DATAH_1_TYPE PIO_PERIPH_A
737 // #define PIN_EBI_DATAH_1_ATTRI PIO_PULLUP
738 //
739 // /** LCD WE pin */
740 // #define PIN_EBI_NWE_MASK PIO_PC8A_NWE
741 // #define PIN_EBI_NWE_PIO PIOC
742 // #define PIN_EBI_NWE_TYPE PIO_PERIPH_A
743 // #define PIN_EBI_NWE_ATTRI PIO_PULLUP
744 //
745 // /** LCD RD pin */
746 // #define PIN_EBI_NRD_MASK PIO_PC11A_NRD
747 // #define PIN_EBI_NRD_PIO PIOC
748 // #define PIN_EBI_NRD_TYPE PIO_PERIPH_A
749 // #define PIN_EBI_NRD_ATTRI PIO_PULLUP
750 //
751 // /** LCD CS pin (NCS3) */
752 // #define PIN_EBI_CS_MASK PIO_PD19A_NCS3
753 // #define PIN_EBI_CS_PIO PIOD
754 // #define PIN_EBI_CS_TYPE PIO_PERIPH_A
755 // #define PIN_EBI_CS_ATTRI PIO_PULLUP
756 //
757 // /** Back-light pin definition. */
758 // #define PIN_EBI_BACKLIGHT_MASK PIO_PC9B_TIOB7
759 // #define PIN_EBI_BACKLIGHT_PIO PIOC
760 // #define PIN_EBI_BACKLIGHT_TYPE PIO_PERIPH_B
761 // #define PIN_EBI_BACKLIGHT_ATTRI PIO_DEFAULT
762 
763 // /*! \name GPIO Connections of VBUS monitoring
764 // */
765 // //! @{
766 // #define USB_VBUS_FLAGS (PIO_INPUT | PIO_PULLUP)
767 // #define USB_VBUS_PIN PIO_PC9_IDX /* As IO pin input */
768 // #define USB_VBUS_PIN_IRQn ( PIOC_IRQn)
769 // #define USB_VBUS_PIO_ID ID_PIOC
770 // #define USB_VBUS_PIO_MASK PIO_PC9
771 // //! @}
772 //
773 // /*! \name GPIO Connections of ID detecting
774 // */
775 // //! @{
776 // #define USB_ID_FLAGS (PIO_INPUT | PIO_PULLUP)
777 // #define USB_ID_PIN PIO_PC16_IDX /* As IO pin input */
778 // #define USB_ID_PIN_IRQn (PIOC_IRQn)
779 // #define USB_ID_PIO_ID ID_PIOC
780 // #define USB_ID_PIO_MASK PIO_PC16
781 // //! @}
782 
783 // /** WM8904 Slave address */
784 // #define WM8904_SLAVE_ADDRESS (0x34 >> 1)
785 //
786 // /** TWI interface for WM8904 */
787 // #define WM8904_TWIHS TWIHS0
788 //
789 // /** WM8904 pins definition */
790 // #define WM8904_TK_PIO PIO_PB1_IDX
791 // #define WM8904_TK_FLAGS PIO_PERIPH_D
792 // #define WM8904_TF_PIO PIO_PB0_IDX
793 // #define WM8904_TF_FLAGS PIO_PERIPH_D
794 // #define WM8904_TD_PIO PIO_PD26_IDX
795 // #define WM8904_TD_FLAGS PIO_PERIPH_B
796 // #define WM8904_RK_PIO PIO_PA22_IDX
797 // #define WM8904_RK_FLAGS PIO_PERIPH_A
798 // #define WM8904_RF_PIO PIO_PD24_IDX
799 // #define WM8904_RF_FLAGS PIO_PERIPH_B
800 // #define WM8904_RD_PIO PIO_PA10_IDX
801 // #define WM8904_RD_FLAGS PIO_PERIPH_C
802 // #define WM8904_PCK2_PIO PIO_PA18_IDX
803 // #define WM8904_PCK2_FLAGS PIO_PERIPH_B
804 
805 // /** Board SDRAM size for MT48LC16M16A2 */
806 // #define BOARD_SDRAM_SIZE (2 * 1024 * 1024)
807 //
808 // /** Address for transferring command bytes to the SDRAM. */
809 // #define BOARD_SDRAM_ADDR 0x70000000
810 //
811 // /** SDRAM pins definitions */
812 // #define SDRAM_BA0_PIO PIO_PA20_IDX
813 // #define SDRAM_SDCK_PIO PIO_PD23_IDX
814 // #define SDRAM_SDCKE_PIO PIO_PD14_IDX
815 // #define SDRAM_SDCS_PIO PIO_PC15_IDX
816 // #define SDRAM_RAS_PIO PIO_PD16_IDX
817 // #define SDRAM_CAS_PIO PIO_PD17_IDX
818 // #define SDRAM_SDWE_PIO PIO_PD29_IDX
819 // #define SDRAM_NBS0_PIO PIO_PC18_IDX
820 // #define SDRAM_NBS1_PIO PIO_PD15_IDX
821 // #define SDRAM_A2_PIO PIO_PC20_IDX
822 // #define SDRAM_A3_PIO PIO_PC21_IDX
823 // #define SDRAM_A4_PIO PIO_PC22_IDX
824 // #define SDRAM_A5_PIO PIO_PC23_IDX
825 // #define SDRAM_A6_PIO PIO_PC24_IDX
826 // #define SDRAM_A7_PIO PIO_PC25_IDX
827 // #define SDRAM_A8_PIO PIO_PC26_IDX
828 // #define SDRAM_A9_PIO PIO_PC27_IDX
829 // #define SDRAM_A10_PIO PIO_PC28_IDX
830 // #define SDRAM_A11_PIO PIO_PC29_IDX
831 // #define SDRAM_SDA10_PIO PIO_PD13_IDX
832 // #define SDRAM_D0_PIO PIO_PC0_IDX
833 // #define SDRAM_D1_PIO PIO_PC1_IDX
834 // #define SDRAM_D2_PIO PIO_PC2_IDX
835 // #define SDRAM_D3_PIO PIO_PC3_IDX
836 // #define SDRAM_D4_PIO PIO_PC4_IDX
837 // #define SDRAM_D5_PIO PIO_PC5_IDX
838 // #define SDRAM_D6_PIO PIO_PC6_IDX
839 // #define SDRAM_D7_PIO PIO_PC7_IDX
840 // #define SDRAM_D8_PIO PIO_PE0_IDX
841 // #define SDRAM_D9_PIO PIO_PE1_IDX
842 // #define SDRAM_D10_PIO PIO_PE2_IDX
843 // #define SDRAM_D11_PIO PIO_PE3_IDX
844 // #define SDRAM_D12_PIO PIO_PE4_IDX
845 // #define SDRAM_D13_PIO PIO_PE5_IDX
846 // #define SDRAM_D14_PIO PIO_PA15_IDX
847 // #define SDRAM_D15_PIO PIO_PA16_IDX
848 //
849 // #define SDRAM_BA0_FLAGS PIO_PERIPH_C
850 // #define SDRAM_SDCK_FLAGS PIO_PERIPH_C
851 // #define SDRAM_SDCKE_FLAGS PIO_PERIPH_C
852 // #define SDRAM_SDCS_FLAGS PIO_PERIPH_A
853 // #define SDRAM_RAS_FLAGS PIO_PERIPH_C
854 // #define SDRAM_CAS_FLAGS PIO_PERIPH_C
855 // #define SDRAM_SDWE_FLAGS PIO_PERIPH_C
856 // #define SDRAM_NBS0_FLAGS PIO_PERIPH_A
857 // #define SDRAM_NBS1_FLAGS PIO_PERIPH_C
858 // #define SDRAM_A_FLAGS PIO_PERIPH_A
859 // #define SDRAM_SDA10_FLAGS PIO_PERIPH_C
860 // #define SDRAM_D_FLAGS PIO_PERIPH_A
861 
862 // /** LCD SPI configuration */
863 // #define BOARD_ILI9488_SPI SPI0
864 // #define BOARD_ILI9488_SPI_IRQN SPI0_IRQn
865 // #define BOARD_ILI9488_SPI_NPCS 3
866 //
867 // /** LCD SPI pins definition */
868 // #define LCD_SPI_MISO_PIO PIO_PD20_IDX
869 // #define LCD_SPI_MISO_FLAGS (PIO_PERIPH_B | PIO_DEFAULT)
870 // #define LCD_SPI_MOSI_PIO PIO_PD21_IDX
871 // #define LCD_SPI_MOSI_FLAGS (PIO_PERIPH_B | PIO_DEFAULT)
872 // #define LCD_SPI_SPCK_PIO PIO_PD22_IDX
873 // #define LCD_SPI_SPCK_FLAGS (PIO_PERIPH_B | PIO_DEFAULT)
874 // #define LCD_SPI_NPCS_PIO PIO_PD27_IDX
875 // #define LCD_SPI_NPCS_FLAGS (PIO_PERIPH_B | PIO_DEFAULT)
876 //
877 // #define LCD_SPI_RESET_PIO PIO_PA24_IDX
878 // #define LCD_SPI_RESET_FLAGS (PIO_OUTPUT_1 | PIO_DEFAULT)
879 // #define LCD_SPI_CDS_PIO PIO_PA6_IDX
880 // #define LCD_SPI_CDS_FLAGS (PIO_OUTPUT_1 | PIO_DEFAULT)
881 // #define LCD_SPI_BACKLIGHT_PIO PIO_PC19_IDX
882 // #define LCD_SPI_BACKLIGHT_FLAGS (PIO_OUTPUT_1 | PIO_DEFAULT)
883 
884 
885 // /** TWI interface for maXTouch XPRO */
886 // #define MAXTOUCH_XPRO_TWIHS TWIHS0
887 //
888 // #define MAXTOUCH_XPRO_CHG_PIO PIO_PA2_IDX
889 //
890 // /** BNO055 external interrupt pin definition */
891 // #define PIN_BNO055_EXT_INIERRUPT {PIO_PD28, PIOD, ID_PIOD, PIO_INPUT, \
892 // PIO_DEFAULT | PIO_IT_RISE_EDGE}
893 // #define PIN_BNO055_EXT_INIERRUPT_MASK PIO_PD28
894 // #define PIN_BNO055_EXT_INIERRUPT_PIO PIOD
895 // #define PIN_BNO055_EXT_INIERRUPT_ID ID_PIOD
896 // #define PIN_BNO055_EXT_INIERRUPT_TYPE PIO_INPUT
897 // #define PIN_BNO055_EXT_INIERRUPT_ATTR (PIO_DEFAULT | PIO_IT_RISE_EDGE)
898 // #define PIN_BNO055_EXT_INIERRUPT_IRQn PIOD_IRQn
899 //
900 // #define BOARD_BNO055_TWIHS TWIHS0
901 // #define BOARD_BNO055_ID_TWIHS ID_TWIHS0
902 //
903 // /** TWIHS ID for simulated EEPROM application to use */
904 // #define BOARD_AT30TSE_ID_TWIHS ID_TWIHS0
905 // /** TWIHS Base for simulated TWI EEPROM application to use */
906 // #define BOARD_AT30TSE_TWIHS TWIHS0
907 
908 /*----------------------------------------------------------------------------*/
909 #endif // USER_BOARD_H
compiler.h
Commonly used includes, types and macros.
conf_board.h
Board configuration.
board.h
Standard board header file.

inertial_sense_ros
Author(s):
autogenerated on Sun Feb 28 2021 03:17:58