pioc.h
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1 
31 /*
32  * Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
33  */
34 
35 #ifndef _SAME70_PIOC_INSTANCE_
36 #define _SAME70_PIOC_INSTANCE_
37 
38 /* ========== Register definition for PIOC peripheral ========== */
39 #if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
40  #define REG_PIOC_PER (0x400E1200U)
41  #define REG_PIOC_PDR (0x400E1204U)
42  #define REG_PIOC_PSR (0x400E1208U)
43  #define REG_PIOC_OER (0x400E1210U)
44  #define REG_PIOC_ODR (0x400E1214U)
45  #define REG_PIOC_OSR (0x400E1218U)
46  #define REG_PIOC_IFER (0x400E1220U)
47  #define REG_PIOC_IFDR (0x400E1224U)
48  #define REG_PIOC_IFSR (0x400E1228U)
49  #define REG_PIOC_SODR (0x400E1230U)
50  #define REG_PIOC_CODR (0x400E1234U)
51  #define REG_PIOC_ODSR (0x400E1238U)
52  #define REG_PIOC_PDSR (0x400E123CU)
53  #define REG_PIOC_IER (0x400E1240U)
54  #define REG_PIOC_IDR (0x400E1244U)
55  #define REG_PIOC_IMR (0x400E1248U)
56  #define REG_PIOC_ISR (0x400E124CU)
57  #define REG_PIOC_MDER (0x400E1250U)
58  #define REG_PIOC_MDDR (0x400E1254U)
59  #define REG_PIOC_MDSR (0x400E1258U)
60  #define REG_PIOC_PUDR (0x400E1260U)
61  #define REG_PIOC_PUER (0x400E1264U)
62  #define REG_PIOC_PUSR (0x400E1268U)
63  #define REG_PIOC_ABCDSR (0x400E1270U)
64  #define REG_PIOC_IFSCDR (0x400E1280U)
65  #define REG_PIOC_IFSCER (0x400E1284U)
66  #define REG_PIOC_IFSCSR (0x400E1288U)
67  #define REG_PIOC_SCDR (0x400E128CU)
68  #define REG_PIOC_PPDDR (0x400E1290U)
69  #define REG_PIOC_PPDER (0x400E1294U)
70  #define REG_PIOC_PPDSR (0x400E1298U)
71  #define REG_PIOC_OWER (0x400E12A0U)
72  #define REG_PIOC_OWDR (0x400E12A4U)
73  #define REG_PIOC_OWSR (0x400E12A8U)
74  #define REG_PIOC_AIMER (0x400E12B0U)
75  #define REG_PIOC_AIMDR (0x400E12B4U)
76  #define REG_PIOC_AIMMR (0x400E12B8U)
77  #define REG_PIOC_ESR (0x400E12C0U)
78  #define REG_PIOC_LSR (0x400E12C4U)
79  #define REG_PIOC_ELSR (0x400E12C8U)
80  #define REG_PIOC_FELLSR (0x400E12D0U)
81  #define REG_PIOC_REHLSR (0x400E12D4U)
82  #define REG_PIOC_FRLHSR (0x400E12D8U)
83  #define REG_PIOC_LOCKSR (0x400E12E0U)
84  #define REG_PIOC_WPMR (0x400E12E4U)
85  #define REG_PIOC_WPSR (0x400E12E8U)
86  #define REG_PIOC_VERSION (0x400E12FCU)
87  #define REG_PIOC_SCHMITT (0x400E1300U)
88  #define REG_PIOC_DRIVER (0x400E1318U)
89  #define REG_PIOC_KER (0x400E1320U)
90  #define REG_PIOC_KRCR (0x400E1324U)
91  #define REG_PIOC_KDR (0x400E1328U)
92  #define REG_PIOC_KIER (0x400E1330U)
93  #define REG_PIOC_KIDR (0x400E1334U)
94  #define REG_PIOC_KIMR (0x400E1338U)
95  #define REG_PIOC_KSR (0x400E133CU)
96  #define REG_PIOC_KKPR (0x400E1340U)
97  #define REG_PIOC_KKRR (0x400E1344U)
98  #define REG_PIOC_PCMR (0x400E1350U)
99  #define REG_PIOC_PCIER (0x400E1354U)
100  #define REG_PIOC_PCIDR (0x400E1358U)
101  #define REG_PIOC_PCIMR (0x400E135CU)
102  #define REG_PIOC_PCISR (0x400E1360U)
103  #define REG_PIOC_PCRHR (0x400E1364U)
104 #else
105  #define REG_PIOC_PER (*(__O uint32_t*)0x400E1200U)
106  #define REG_PIOC_PDR (*(__O uint32_t*)0x400E1204U)
107  #define REG_PIOC_PSR (*(__I uint32_t*)0x400E1208U)
108  #define REG_PIOC_OER (*(__O uint32_t*)0x400E1210U)
109  #define REG_PIOC_ODR (*(__O uint32_t*)0x400E1214U)
110  #define REG_PIOC_OSR (*(__I uint32_t*)0x400E1218U)
111  #define REG_PIOC_IFER (*(__O uint32_t*)0x400E1220U)
112  #define REG_PIOC_IFDR (*(__O uint32_t*)0x400E1224U)
113  #define REG_PIOC_IFSR (*(__I uint32_t*)0x400E1228U)
114  #define REG_PIOC_SODR (*(__O uint32_t*)0x400E1230U)
115  #define REG_PIOC_CODR (*(__O uint32_t*)0x400E1234U)
116  #define REG_PIOC_ODSR (*(__IO uint32_t*)0x400E1238U)
117  #define REG_PIOC_PDSR (*(__I uint32_t*)0x400E123CU)
118  #define REG_PIOC_IER (*(__O uint32_t*)0x400E1240U)
119  #define REG_PIOC_IDR (*(__O uint32_t*)0x400E1244U)
120  #define REG_PIOC_IMR (*(__I uint32_t*)0x400E1248U)
121  #define REG_PIOC_ISR (*(__I uint32_t*)0x400E124CU)
122  #define REG_PIOC_MDER (*(__O uint32_t*)0x400E1250U)
123  #define REG_PIOC_MDDR (*(__O uint32_t*)0x400E1254U)
124  #define REG_PIOC_MDSR (*(__I uint32_t*)0x400E1258U)
125  #define REG_PIOC_PUDR (*(__O uint32_t*)0x400E1260U)
126  #define REG_PIOC_PUER (*(__O uint32_t*)0x400E1264U)
127  #define REG_PIOC_PUSR (*(__I uint32_t*)0x400E1268U)
128  #define REG_PIOC_ABCDSR (*(__IO uint32_t*)0x400E1270U)
129  #define REG_PIOC_IFSCDR (*(__O uint32_t*)0x400E1280U)
130  #define REG_PIOC_IFSCER (*(__O uint32_t*)0x400E1284U)
131  #define REG_PIOC_IFSCSR (*(__I uint32_t*)0x400E1288U)
132  #define REG_PIOC_SCDR (*(__IO uint32_t*)0x400E128CU)
133  #define REG_PIOC_PPDDR (*(__O uint32_t*)0x400E1290U)
134  #define REG_PIOC_PPDER (*(__O uint32_t*)0x400E1294U)
135  #define REG_PIOC_PPDSR (*(__I uint32_t*)0x400E1298U)
136  #define REG_PIOC_OWER (*(__O uint32_t*)0x400E12A0U)
137  #define REG_PIOC_OWDR (*(__O uint32_t*)0x400E12A4U)
138  #define REG_PIOC_OWSR (*(__I uint32_t*)0x400E12A8U)
139  #define REG_PIOC_AIMER (*(__O uint32_t*)0x400E12B0U)
140  #define REG_PIOC_AIMDR (*(__O uint32_t*)0x400E12B4U)
141  #define REG_PIOC_AIMMR (*(__I uint32_t*)0x400E12B8U)
142  #define REG_PIOC_ESR (*(__O uint32_t*)0x400E12C0U)
143  #define REG_PIOC_LSR (*(__O uint32_t*)0x400E12C4U)
144  #define REG_PIOC_ELSR (*(__I uint32_t*)0x400E12C8U)
145  #define REG_PIOC_FELLSR (*(__O uint32_t*)0x400E12D0U)
146  #define REG_PIOC_REHLSR (*(__O uint32_t*)0x400E12D4U)
147  #define REG_PIOC_FRLHSR (*(__I uint32_t*)0x400E12D8U)
148  #define REG_PIOC_LOCKSR (*(__I uint32_t*)0x400E12E0U)
149  #define REG_PIOC_WPMR (*(__IO uint32_t*)0x400E12E4U)
150  #define REG_PIOC_WPSR (*(__I uint32_t*)0x400E12E8U)
151  #define REG_PIOC_VERSION (*(__I uint32_t*)0x400E12FCU)
152  #define REG_PIOC_SCHMITT (*(__IO uint32_t*)0x400E1300U)
153  #define REG_PIOC_DRIVER (*(__IO uint32_t*)0x400E1318U)
154  #define REG_PIOC_KER (*(__IO uint32_t*)0x400E1320U)
155  #define REG_PIOC_KRCR (*(__IO uint32_t*)0x400E1324U)
156  #define REG_PIOC_KDR (*(__IO uint32_t*)0x400E1328U)
157  #define REG_PIOC_KIER (*(__O uint32_t*)0x400E1330U)
158  #define REG_PIOC_KIDR (*(__O uint32_t*)0x400E1334U)
159  #define REG_PIOC_KIMR (*(__I uint32_t*)0x400E1338U)
160  #define REG_PIOC_KSR (*(__I uint32_t*)0x400E133CU)
161  #define REG_PIOC_KKPR (*(__I uint32_t*)0x400E1340U)
162  #define REG_PIOC_KKRR (*(__I uint32_t*)0x400E1344U)
163  #define REG_PIOC_PCMR (*(__IO uint32_t*)0x400E1350U)
164  #define REG_PIOC_PCIER (*(__O uint32_t*)0x400E1354U)
165  #define REG_PIOC_PCIDR (*(__O uint32_t*)0x400E1358U)
166  #define REG_PIOC_PCIMR (*(__I uint32_t*)0x400E135CU)
167  #define REG_PIOC_PCISR (*(__I uint32_t*)0x400E1360U)
168  #define REG_PIOC_PCRHR (*(__I uint32_t*)0x400E1364U)
169 #endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
170 
171 #endif /* _SAME70_PIOC_INSTANCE_ */


inertial_sense_ros
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autogenerated on Sun Feb 28 2021 03:17:58