instance/supc.h
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1 
31 /*
32  * Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
33  */
34 
35 #ifndef _SAME70_SUPC_INSTANCE_
36 #define _SAME70_SUPC_INSTANCE_
37 
38 /* ========== Register definition for SUPC peripheral ========== */
39 #if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
40  #define REG_SUPC_CR (0x400E1810U)
41  #define REG_SUPC_SMMR (0x400E1814U)
42  #define REG_SUPC_MR (0x400E1818U)
43  #define REG_SUPC_WUMR (0x400E181CU)
44  #define REG_SUPC_WUIR (0x400E1820U)
45  #define REG_SUPC_SR (0x400E1824U)
46  #define REG_SYSC_VERSION (0x400E190CU)
47 #else
48  #define REG_SUPC_CR (*(__O uint32_t*)0x400E1810U)
49  #define REG_SUPC_SMMR (*(__IO uint32_t*)0x400E1814U)
50  #define REG_SUPC_MR (*(__IO uint32_t*)0x400E1818U)
51  #define REG_SUPC_WUMR (*(__IO uint32_t*)0x400E181CU)
52  #define REG_SUPC_WUIR (*(__IO uint32_t*)0x400E1820U)
53  #define REG_SUPC_SR (*(__I uint32_t*)0x400E1824U)
54  #define REG_SYSC_VERSION (*(__I uint32_t*)0x400E190CU)
55 #endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
56 
57 #endif /* _SAME70_SUPC_INSTANCE_ */


inertial_sense_ros
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autogenerated on Sun Feb 28 2021 03:17:58