stm32f7xx_hal_dfsdm.h
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1 
20 /* Define to prevent recursive inclusion -------------------------------------*/
21 #ifndef __STM32F7xx_HAL_DFSDM_H
22 #define __STM32F7xx_HAL_DFSDM_H
23 
24 #ifdef __cplusplus
25  extern "C" {
26 #endif
27 
28 #if defined (STM32F765xx) || defined (STM32F767xx) || defined (STM32F769xx) || defined (STM32F777xx) || defined (STM32F779xx)
29 /* Includes ------------------------------------------------------------------*/
30 #include "stm32f7xx_hal_def.h"
31 
40 /* Exported types ------------------------------------------------------------*/
48 typedef enum
49 {
50  HAL_DFSDM_CHANNEL_STATE_RESET = 0x00U,
51  HAL_DFSDM_CHANNEL_STATE_READY = 0x01U,
52  HAL_DFSDM_CHANNEL_STATE_ERROR = 0xFFU
53 }HAL_DFSDM_Channel_StateTypeDef;
54 
58 typedef struct
59 {
60  FunctionalState Activation;
61  uint32_t Selection;
63  uint32_t Divider;
65 }DFSDM_Channel_OutputClockTypeDef;
66 
70 typedef struct
71 {
72  uint32_t Multiplexer;
74  uint32_t DataPacking;
76  uint32_t Pins;
78 }DFSDM_Channel_InputTypeDef;
79 
83 typedef struct
84 {
85  uint32_t Type;
87  uint32_t SpiClock;
89 }DFSDM_Channel_SerialInterfaceTypeDef;
90 
94 typedef struct
95 {
96  uint32_t FilterOrder;
98  uint32_t Oversampling;
100 }DFSDM_Channel_AwdTypeDef;
101 
105 typedef struct
106 {
107  DFSDM_Channel_OutputClockTypeDef OutputClock;
108  DFSDM_Channel_InputTypeDef Input;
109  DFSDM_Channel_SerialInterfaceTypeDef SerialInterface;
110  DFSDM_Channel_AwdTypeDef Awd;
111  int32_t Offset;
113  uint32_t RightBitShift;
115 }DFSDM_Channel_InitTypeDef;
116 
120 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
121 typedef struct __DFSDM_Channel_HandleTypeDef
122 #else
123 typedef struct
124 #endif /* USE_HAL_DFSDM_REGISTER_CALLBACKS */
125 {
126  DFSDM_Channel_TypeDef *Instance;
127  DFSDM_Channel_InitTypeDef Init;
128  HAL_DFSDM_Channel_StateTypeDef State;
129 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
130  void (*CkabCallback) (struct __DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
131  void (*ScdCallback) (struct __DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
132  void (*MspInitCallback) (struct __DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
133  void (*MspDeInitCallback) (struct __DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
134 #endif
135 }DFSDM_Channel_HandleTypeDef;
136 
137 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
138 
141 typedef enum
142 {
143  HAL_DFSDM_CHANNEL_CKAB_CB_ID = 0x00U,
144  HAL_DFSDM_CHANNEL_SCD_CB_ID = 0x01U,
145  HAL_DFSDM_CHANNEL_MSPINIT_CB_ID = 0x02U,
146  HAL_DFSDM_CHANNEL_MSPDEINIT_CB_ID = 0x03U
147 }HAL_DFSDM_Channel_CallbackIDTypeDef;
148 
152 typedef void (*pDFSDM_Channel_CallbackTypeDef)(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
153 #endif
154 
157 typedef enum
158 {
159  HAL_DFSDM_FILTER_STATE_RESET = 0x00U,
160  HAL_DFSDM_FILTER_STATE_READY = 0x01U,
161  HAL_DFSDM_FILTER_STATE_REG = 0x02U,
162  HAL_DFSDM_FILTER_STATE_INJ = 0x03U,
163  HAL_DFSDM_FILTER_STATE_REG_INJ = 0x04U,
164  HAL_DFSDM_FILTER_STATE_ERROR = 0xFFU
165 }HAL_DFSDM_Filter_StateTypeDef;
166 
170 typedef struct
171 {
172  uint32_t Trigger;
174  FunctionalState FastMode;
175  FunctionalState DmaMode;
176 }DFSDM_Filter_RegularParamTypeDef;
177 
181 typedef struct
182 {
183  uint32_t Trigger;
185  FunctionalState ScanMode;
186  FunctionalState DmaMode;
187  uint32_t ExtTrigger;
189  uint32_t ExtTriggerEdge;
191 }DFSDM_Filter_InjectedParamTypeDef;
192 
196 typedef struct
197 {
198  uint32_t SincOrder;
200  uint32_t Oversampling;
202  uint32_t IntOversampling;
204 }DFSDM_Filter_FilterParamTypeDef;
205 
209 typedef struct
210 {
211  DFSDM_Filter_RegularParamTypeDef RegularParam;
212  DFSDM_Filter_InjectedParamTypeDef InjectedParam;
213  DFSDM_Filter_FilterParamTypeDef FilterParam;
214 }DFSDM_Filter_InitTypeDef;
215 
219 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
220 typedef struct __DFSDM_Filter_HandleTypeDef
221 #else
222 typedef struct
223 #endif /* USE_HAL_DFSDM_REGISTER_CALLBACKS */
224 {
225  DFSDM_Filter_TypeDef *Instance;
226  DFSDM_Filter_InitTypeDef Init;
227  DMA_HandleTypeDef *hdmaReg;
228  DMA_HandleTypeDef *hdmaInj;
229  uint32_t RegularContMode;
230  uint32_t RegularTrigger;
231  uint32_t InjectedTrigger;
232  uint32_t ExtTriggerEdge;
233  FunctionalState InjectedScanMode;
234  uint32_t InjectedChannelsNbr;
235  uint32_t InjConvRemaining;
236  HAL_DFSDM_Filter_StateTypeDef State;
237  uint32_t ErrorCode;
238 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
239  void (*AwdCallback) (struct __DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
240  uint32_t Channel, uint32_t Threshold);
241  void (*RegConvCpltCallback) (struct __DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
242  void (*RegConvHalfCpltCallback) (struct __DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
243  void (*InjConvCpltCallback) (struct __DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
244  void (*InjConvHalfCpltCallback) (struct __DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
245  void (*ErrorCallback) (struct __DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
246  void (*MspInitCallback) (struct __DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
247  void (*MspDeInitCallback) (struct __DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
248 #endif
249 }DFSDM_Filter_HandleTypeDef;
250 
254 typedef struct
255 {
256  uint32_t DataSource;
258  uint32_t Channel;
260  int32_t HighThreshold;
262  int32_t LowThreshold;
264  uint32_t HighBreakSignal;
266  uint32_t LowBreakSignal;
268 }DFSDM_Filter_AwdParamTypeDef;
269 
270 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
271 
274 typedef enum
275 {
276  HAL_DFSDM_FILTER_REGCONV_COMPLETE_CB_ID = 0x00U,
277  HAL_DFSDM_FILTER_REGCONV_HALFCOMPLETE_CB_ID = 0x01U,
278  HAL_DFSDM_FILTER_INJCONV_COMPLETE_CB_ID = 0x02U,
279  HAL_DFSDM_FILTER_INJCONV_HALFCOMPLETE_CB_ID = 0x03U,
280  HAL_DFSDM_FILTER_ERROR_CB_ID = 0x04U,
281  HAL_DFSDM_FILTER_MSPINIT_CB_ID = 0x05U,
282  HAL_DFSDM_FILTER_MSPDEINIT_CB_ID = 0x06U
283 }HAL_DFSDM_Filter_CallbackIDTypeDef;
284 
288 typedef void (*pDFSDM_Filter_CallbackTypeDef)(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
289 typedef void (*pDFSDM_Filter_AwdCallbackTypeDef)(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t Channel, uint32_t Threshold);
290 #endif
291 
294 /* End of exported types -----------------------------------------------------*/
295 
296 /* Exported constants --------------------------------------------------------*/
304 #define DFSDM_CHANNEL_OUTPUT_CLOCK_SYSTEM ((uint32_t)0x00000000U)
305 #define DFSDM_CHANNEL_OUTPUT_CLOCK_AUDIO DFSDM_CHCFGR1_CKOUTSRC
313 #define DFSDM_CHANNEL_EXTERNAL_INPUTS ((uint32_t)0x00000000U)
314 #define DFSDM_CHANNEL_INTERNAL_REGISTER DFSDM_CHCFGR1_DATMPX_1
322 #define DFSDM_CHANNEL_STANDARD_MODE ((uint32_t)0x00000000U)
323 #define DFSDM_CHANNEL_INTERLEAVED_MODE DFSDM_CHCFGR1_DATPACK_0
324 #define DFSDM_CHANNEL_DUAL_MODE DFSDM_CHCFGR1_DATPACK_1
332 #define DFSDM_CHANNEL_SAME_CHANNEL_PINS ((uint32_t)0x00000000U)
333 #define DFSDM_CHANNEL_FOLLOWING_CHANNEL_PINS DFSDM_CHCFGR1_CHINSEL
341 #define DFSDM_CHANNEL_SPI_RISING ((uint32_t)0x00000000U)
342 #define DFSDM_CHANNEL_SPI_FALLING DFSDM_CHCFGR1_SITP_0
343 #define DFSDM_CHANNEL_MANCHESTER_RISING DFSDM_CHCFGR1_SITP_1
344 #define DFSDM_CHANNEL_MANCHESTER_FALLING DFSDM_CHCFGR1_SITP
352 #define DFSDM_CHANNEL_SPI_CLOCK_EXTERNAL ((uint32_t)0x00000000U)
353 #define DFSDM_CHANNEL_SPI_CLOCK_INTERNAL DFSDM_CHCFGR1_SPICKSEL_0
354 #define DFSDM_CHANNEL_SPI_CLOCK_INTERNAL_DIV2_FALLING DFSDM_CHCFGR1_SPICKSEL_1
355 #define DFSDM_CHANNEL_SPI_CLOCK_INTERNAL_DIV2_RISING DFSDM_CHCFGR1_SPICKSEL
363 #define DFSDM_CHANNEL_FASTSINC_ORDER ((uint32_t)0x00000000U)
364 #define DFSDM_CHANNEL_SINC1_ORDER DFSDM_CHAWSCDR_AWFORD_0
365 #define DFSDM_CHANNEL_SINC2_ORDER DFSDM_CHAWSCDR_AWFORD_1
366 #define DFSDM_CHANNEL_SINC3_ORDER DFSDM_CHAWSCDR_AWFORD
374 #define DFSDM_FILTER_SW_TRIGGER ((uint32_t)0x00000000U)
375 #define DFSDM_FILTER_SYNC_TRIGGER ((uint32_t)0x00000001U)
376 #define DFSDM_FILTER_EXT_TRIGGER ((uint32_t)0x00000002U)
384 #define DFSDM_FILTER_EXT_TRIG_TIM1_TRGO ((uint32_t)0x00000000U)
385 #define DFSDM_FILTER_EXT_TRIG_TIM1_TRGO2 DFSDM_FLTCR1_JEXTSEL_0
386 #define DFSDM_FILTER_EXT_TRIG_TIM8_TRGO DFSDM_FLTCR1_JEXTSEL_1
387 #define DFSDM_FILTER_EXT_TRIG_TIM8_TRGO2 (DFSDM_FLTCR1_JEXTSEL_0 | DFSDM_FLTCR1_JEXTSEL_1)
388 #define DFSDM_FILTER_EXT_TRIG_TIM3_TRGO DFSDM_FLTCR1_JEXTSEL_2
389 #define DFSDM_FILTER_EXT_TRIG_TIM4_TRGO (DFSDM_FLTCR1_JEXTSEL_0 | DFSDM_FLTCR1_JEXTSEL_2)
390 #define DFSDM_FILTER_EXT_TRIG_TIM10_OC1 (DFSDM_FLTCR1_JEXTSEL_1 | DFSDM_FLTCR1_JEXTSEL_2)
391 #define DFSDM_FILTER_EXT_TRIG_TIM6_TRGO (DFSDM_FLTCR1_JEXTSEL_0 | DFSDM_FLTCR1_JEXTSEL_1 | \
392  DFSDM_FLTCR1_JEXTSEL_2)
393 #define DFSDM_FILTER_EXT_TRIG_TIM7_TRGO DFSDM_FLTCR1_JEXTSEL_3
394 #define DFSDM_FILTER_EXT_TRIG_EXTI11 (DFSDM_FLTCR1_JEXTSEL_3 | DFSDM_FLTCR1_JEXTSEL_4)
395 #define DFSDM_FILTER_EXT_TRIG_EXTI15 (DFSDM_FLTCR1_JEXTSEL_0 | DFSDM_FLTCR1_JEXTSEL_3 | \
396  DFSDM_FLTCR1_JEXTSEL_4)
397 #define DFSDM_FILTER_EXT_TRIG_LPTIM1_OUT (DFSDM_FLTCR1_JEXTSEL_1 | DFSDM_FLTCR1_JEXTSEL_3 | \
398  DFSDM_FLTCR1_JEXTSEL_4)
406 #define DFSDM_FILTER_EXT_TRIG_RISING_EDGE DFSDM_FLTCR1_JEXTEN_0
407 #define DFSDM_FILTER_EXT_TRIG_FALLING_EDGE DFSDM_FLTCR1_JEXTEN_1
408 #define DFSDM_FILTER_EXT_TRIG_BOTH_EDGES DFSDM_FLTCR1_JEXTEN
416 #define DFSDM_FILTER_FASTSINC_ORDER ((uint32_t)0x00000000U)
417 #define DFSDM_FILTER_SINC1_ORDER DFSDM_FLTFCR_FORD_0
418 #define DFSDM_FILTER_SINC2_ORDER DFSDM_FLTFCR_FORD_1
419 #define DFSDM_FILTER_SINC3_ORDER (DFSDM_FLTFCR_FORD_0 | DFSDM_FLTFCR_FORD_1)
420 #define DFSDM_FILTER_SINC4_ORDER DFSDM_FLTFCR_FORD_2
421 #define DFSDM_FILTER_SINC5_ORDER (DFSDM_FLTFCR_FORD_0 | DFSDM_FLTFCR_FORD_2)
429 #define DFSDM_FILTER_AWD_FILTER_DATA ((uint32_t)0x00000000U)
430 #define DFSDM_FILTER_AWD_CHANNEL_DATA DFSDM_FLTCR1_AWFSEL
438 #define DFSDM_FILTER_ERROR_NONE ((uint32_t)0x00000000U)
439 #define DFSDM_FILTER_ERROR_REGULAR_OVERRUN ((uint32_t)0x00000001U)
440 #define DFSDM_FILTER_ERROR_INJECTED_OVERRUN ((uint32_t)0x00000002U)
441 #define DFSDM_FILTER_ERROR_DMA ((uint32_t)0x00000003U)
442 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
443 #define DFSDM_FILTER_ERROR_INVALID_CALLBACK ((uint32_t)0x00000004U)
444 #endif
445 
452 #define DFSDM_NO_BREAK_SIGNAL ((uint32_t)0x00000000U)
453 #define DFSDM_BREAK_SIGNAL_0 ((uint32_t)0x00000001U)
454 #define DFSDM_BREAK_SIGNAL_1 ((uint32_t)0x00000002U)
455 #define DFSDM_BREAK_SIGNAL_2 ((uint32_t)0x00000004U)
456 #define DFSDM_BREAK_SIGNAL_3 ((uint32_t)0x00000008U)
464 /* DFSDM Channels ------------------------------------------------------------*/
465 /* The DFSDM channels are defined as follows:
466  - in 16-bit LSB the channel mask is set
467  - in 16-bit MSB the channel number is set
468  e.g. for channel 5 definition:
469  - the channel mask is 0x00000020 (bit 5 is set)
470  - the channel number 5 is 0x00050000
471  --> Consequently, channel 5 definition is 0x00000020 | 0x00050000 = 0x00050020 */
472 #define DFSDM_CHANNEL_0 ((uint32_t)0x00000001U)
473 #define DFSDM_CHANNEL_1 ((uint32_t)0x00010002U)
474 #define DFSDM_CHANNEL_2 ((uint32_t)0x00020004U)
475 #define DFSDM_CHANNEL_3 ((uint32_t)0x00030008U)
476 #define DFSDM_CHANNEL_4 ((uint32_t)0x00040010U)
477 #define DFSDM_CHANNEL_5 ((uint32_t)0x00050020U)
478 #define DFSDM_CHANNEL_6 ((uint32_t)0x00060040U)
479 #define DFSDM_CHANNEL_7 ((uint32_t)0x00070080U)
480 
487 #define DFSDM_CONTINUOUS_CONV_OFF ((uint32_t)0x00000000U)
488 #define DFSDM_CONTINUOUS_CONV_ON ((uint32_t)0x00000001U)
496 #define DFSDM_AWD_HIGH_THRESHOLD ((uint32_t)0x00000000U)
497 #define DFSDM_AWD_LOW_THRESHOLD ((uint32_t)0x00000001U)
505 /* End of exported constants -------------------------------------------------*/
506 
507 /* Exported macros -----------------------------------------------------------*/
516 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
517 #define __HAL_DFSDM_CHANNEL_RESET_HANDLE_STATE(__HANDLE__) do{ \
518  (__HANDLE__)->State = HAL_DFSDM_CHANNEL_STATE_RESET; \
519  (__HANDLE__)->MspInitCallback = NULL; \
520  (__HANDLE__)->MspDeInitCallback = NULL; \
521  } while(0)
522 #else
523 #define __HAL_DFSDM_CHANNEL_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DFSDM_CHANNEL_STATE_RESET)
524 #endif
525 
530 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
531 #define __HAL_DFSDM_FILTER_RESET_HANDLE_STATE(__HANDLE__) do{ \
532  (__HANDLE__)->State = HAL_DFSDM_FILTER_STATE_RESET; \
533  (__HANDLE__)->MspInitCallback = NULL; \
534  (__HANDLE__)->MspDeInitCallback = NULL; \
535  } while(0)
536 #else
537 #define __HAL_DFSDM_FILTER_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DFSDM_FILTER_STATE_RESET)
538 #endif
539 
543 /* End of exported macros ----------------------------------------------------*/
544 
545 /* Exported functions --------------------------------------------------------*/
553 /* Channel initialization and de-initialization functions *********************/
554 HAL_StatusTypeDef HAL_DFSDM_ChannelInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
555 HAL_StatusTypeDef HAL_DFSDM_ChannelDeInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
556 void HAL_DFSDM_ChannelMspInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
557 void HAL_DFSDM_ChannelMspDeInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
558 
559 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
560 /* Channel callbacks register/unregister functions ****************************/
561 HAL_StatusTypeDef HAL_DFSDM_Channel_RegisterCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
562  HAL_DFSDM_Channel_CallbackIDTypeDef CallbackID,
563  pDFSDM_Channel_CallbackTypeDef pCallback);
564 HAL_StatusTypeDef HAL_DFSDM_Channel_UnRegisterCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
565  HAL_DFSDM_Channel_CallbackIDTypeDef CallbackID);
566 #endif
567 
574 /* Channel operation functions ************************************************/
575 HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStart(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
576 HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStart_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
577 HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStop(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
578 HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStop_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
579 
580 HAL_StatusTypeDef HAL_DFSDM_ChannelScdStart(DFSDM_Channel_HandleTypeDef *hdfsdm_channel, uint32_t Threshold, uint32_t BreakSignal);
581 HAL_StatusTypeDef HAL_DFSDM_ChannelScdStart_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel, uint32_t Threshold, uint32_t BreakSignal);
582 HAL_StatusTypeDef HAL_DFSDM_ChannelScdStop(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
583 HAL_StatusTypeDef HAL_DFSDM_ChannelScdStop_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
584 
585 int16_t HAL_DFSDM_ChannelGetAwdValue(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
586 HAL_StatusTypeDef HAL_DFSDM_ChannelModifyOffset(DFSDM_Channel_HandleTypeDef *hdfsdm_channel, int32_t Offset);
587 
588 HAL_StatusTypeDef HAL_DFSDM_ChannelPollForCkab(DFSDM_Channel_HandleTypeDef *hdfsdm_channel, uint32_t Timeout);
589 HAL_StatusTypeDef HAL_DFSDM_ChannelPollForScd(DFSDM_Channel_HandleTypeDef *hdfsdm_channel, uint32_t Timeout);
590 
591 void HAL_DFSDM_ChannelCkabCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
592 void HAL_DFSDM_ChannelScdCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
600 /* Channel state function *****************************************************/
601 HAL_DFSDM_Channel_StateTypeDef HAL_DFSDM_ChannelGetState(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
609 /* Filter initialization and de-initialization functions *********************/
610 HAL_StatusTypeDef HAL_DFSDM_FilterInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
611 HAL_StatusTypeDef HAL_DFSDM_FilterDeInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
612 void HAL_DFSDM_FilterMspInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
613 void HAL_DFSDM_FilterMspDeInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
614 
615 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
616 /* Filter callbacks register/unregister functions ****************************/
617 HAL_StatusTypeDef HAL_DFSDM_Filter_RegisterCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
618  HAL_DFSDM_Filter_CallbackIDTypeDef CallbackID,
619  pDFSDM_Filter_CallbackTypeDef pCallback);
620 HAL_StatusTypeDef HAL_DFSDM_Filter_UnRegisterCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
621  HAL_DFSDM_Filter_CallbackIDTypeDef CallbackID);
622 HAL_StatusTypeDef HAL_DFSDM_Filter_RegisterAwdCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
623  pDFSDM_Filter_AwdCallbackTypeDef pCallback);
624 HAL_StatusTypeDef HAL_DFSDM_Filter_UnRegisterAwdCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
625 #endif
626 
633 /* Filter control functions *********************/
634 HAL_StatusTypeDef HAL_DFSDM_FilterConfigRegChannel(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
635  uint32_t Channel,
636  uint32_t ContinuousMode);
637 HAL_StatusTypeDef HAL_DFSDM_FilterConfigInjChannel(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
638  uint32_t Channel);
646 /* Filter operation functions *********************/
647 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
648 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
649 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, int32_t *pData, uint32_t Length);
650 HAL_StatusTypeDef HAL_DFSDM_FilterRegularMsbStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, int16_t *pData, uint32_t Length);
651 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
652 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
653 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
654 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
655 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
656 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, int32_t *pData, uint32_t Length);
657 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedMsbStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, int16_t *pData, uint32_t Length);
658 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
659 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
660 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
661 HAL_StatusTypeDef HAL_DFSDM_FilterAwdStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
662  DFSDM_Filter_AwdParamTypeDef* awdParam);
663 HAL_StatusTypeDef HAL_DFSDM_FilterAwdStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
664 HAL_StatusTypeDef HAL_DFSDM_FilterExdStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t Channel);
665 HAL_StatusTypeDef HAL_DFSDM_FilterExdStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
666 
667 int32_t HAL_DFSDM_FilterGetRegularValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t* Channel);
668 int32_t HAL_DFSDM_FilterGetInjectedValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t* Channel);
669 int32_t HAL_DFSDM_FilterGetExdMaxValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t* Channel);
670 int32_t HAL_DFSDM_FilterGetExdMinValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t* Channel);
671 uint32_t HAL_DFSDM_FilterGetConvTimeValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
672 
673 void HAL_DFSDM_IRQHandler(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
674 
675 HAL_StatusTypeDef HAL_DFSDM_FilterPollForRegConversion(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t Timeout);
676 HAL_StatusTypeDef HAL_DFSDM_FilterPollForInjConversion(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t Timeout);
677 
678 void HAL_DFSDM_FilterRegConvCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
679 void HAL_DFSDM_FilterRegConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
680 void HAL_DFSDM_FilterInjConvCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
681 void HAL_DFSDM_FilterInjConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
682 void HAL_DFSDM_FilterAwdCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t Channel, uint32_t Threshold);
683 void HAL_DFSDM_FilterErrorCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
691 /* Filter state functions *****************************************************/
692 HAL_DFSDM_Filter_StateTypeDef HAL_DFSDM_FilterGetState(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
693 uint32_t HAL_DFSDM_FilterGetError(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
701 /* End of exported functions -------------------------------------------------*/
702 
703 /* Private macros ------------------------------------------------------------*/
707 #define IS_DFSDM_CHANNEL_OUTPUT_CLOCK(CLOCK) (((CLOCK) == DFSDM_CHANNEL_OUTPUT_CLOCK_SYSTEM) || \
708  ((CLOCK) == DFSDM_CHANNEL_OUTPUT_CLOCK_AUDIO))
709 #define IS_DFSDM_CHANNEL_OUTPUT_CLOCK_DIVIDER(DIVIDER) ((2 <= (DIVIDER)) && ((DIVIDER) <= 256))
710 #define IS_DFSDM_CHANNEL_INPUT(INPUT) (((INPUT) == DFSDM_CHANNEL_EXTERNAL_INPUTS) || \
711  ((INPUT) == DFSDM_CHANNEL_INTERNAL_REGISTER))
712 #define IS_DFSDM_CHANNEL_DATA_PACKING(MODE) (((MODE) == DFSDM_CHANNEL_STANDARD_MODE) || \
713  ((MODE) == DFSDM_CHANNEL_INTERLEAVED_MODE) || \
714  ((MODE) == DFSDM_CHANNEL_DUAL_MODE))
715 #define IS_DFSDM_CHANNEL_INPUT_PINS(PINS) (((PINS) == DFSDM_CHANNEL_SAME_CHANNEL_PINS) || \
716  ((PINS) == DFSDM_CHANNEL_FOLLOWING_CHANNEL_PINS))
717 #define IS_DFSDM_CHANNEL_SERIAL_INTERFACE_TYPE(MODE) (((MODE) == DFSDM_CHANNEL_SPI_RISING) || \
718  ((MODE) == DFSDM_CHANNEL_SPI_FALLING) || \
719  ((MODE) == DFSDM_CHANNEL_MANCHESTER_RISING) || \
720  ((MODE) == DFSDM_CHANNEL_MANCHESTER_FALLING))
721 #define IS_DFSDM_CHANNEL_SPI_CLOCK(TYPE) (((TYPE) == DFSDM_CHANNEL_SPI_CLOCK_EXTERNAL) || \
722  ((TYPE) == DFSDM_CHANNEL_SPI_CLOCK_INTERNAL) || \
723  ((TYPE) == DFSDM_CHANNEL_SPI_CLOCK_INTERNAL_DIV2_FALLING) || \
724  ((TYPE) == DFSDM_CHANNEL_SPI_CLOCK_INTERNAL_DIV2_RISING))
725 #define IS_DFSDM_CHANNEL_FILTER_ORDER(ORDER) (((ORDER) == DFSDM_CHANNEL_FASTSINC_ORDER) || \
726  ((ORDER) == DFSDM_CHANNEL_SINC1_ORDER) || \
727  ((ORDER) == DFSDM_CHANNEL_SINC2_ORDER) || \
728  ((ORDER) == DFSDM_CHANNEL_SINC3_ORDER))
729 #define IS_DFSDM_CHANNEL_FILTER_OVS_RATIO(RATIO) ((1 <= (RATIO)) && ((RATIO) <= 32))
730 #define IS_DFSDM_CHANNEL_OFFSET(VALUE) ((-8388608 <= (VALUE)) && ((VALUE) <= 8388607))
731 #define IS_DFSDM_CHANNEL_RIGHT_BIT_SHIFT(VALUE) ((VALUE) <= 0x1F)
732 #define IS_DFSDM_CHANNEL_SCD_THRESHOLD(VALUE) ((VALUE) <= 0xFF)
733 #define IS_DFSDM_FILTER_REG_TRIGGER(TRIG) (((TRIG) == DFSDM_FILTER_SW_TRIGGER) || \
734  ((TRIG) == DFSDM_FILTER_SYNC_TRIGGER))
735 #define IS_DFSDM_FILTER_INJ_TRIGGER(TRIG) (((TRIG) == DFSDM_FILTER_SW_TRIGGER) || \
736  ((TRIG) == DFSDM_FILTER_SYNC_TRIGGER) || \
737  ((TRIG) == DFSDM_FILTER_EXT_TRIGGER))
738 #define IS_DFSDM_FILTER_EXT_TRIG(TRIG) (((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM1_TRGO) || \
739  ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM1_TRGO2)|| \
740  ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM8_TRGO) || \
741  ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM8_TRGO2)|| \
742  ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM3_TRGO) || \
743  ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM4_TRGO) || \
744  ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM10_OC1) || \
745  ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM6_TRGO) || \
746  ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM7_TRGO) || \
747  ((TRIG) == DFSDM_FILTER_EXT_TRIG_EXTI11) || \
748  ((TRIG) == DFSDM_FILTER_EXT_TRIG_EXTI15) ||\
749  ((TRIG) == DFSDM_FILTER_EXT_TRIG_LPTIM1_OUT))
750 #define IS_DFSDM_FILTER_EXT_TRIG_EDGE(EDGE) (((EDGE) == DFSDM_FILTER_EXT_TRIG_RISING_EDGE) || \
751  ((EDGE) == DFSDM_FILTER_EXT_TRIG_FALLING_EDGE) || \
752  ((EDGE) == DFSDM_FILTER_EXT_TRIG_BOTH_EDGES))
753 #define IS_DFSDM_FILTER_SINC_ORDER(ORDER) (((ORDER) == DFSDM_FILTER_FASTSINC_ORDER) || \
754  ((ORDER) == DFSDM_FILTER_SINC1_ORDER) || \
755  ((ORDER) == DFSDM_FILTER_SINC2_ORDER) || \
756  ((ORDER) == DFSDM_FILTER_SINC3_ORDER) || \
757  ((ORDER) == DFSDM_FILTER_SINC4_ORDER) || \
758  ((ORDER) == DFSDM_FILTER_SINC5_ORDER))
759 #define IS_DFSDM_FILTER_OVS_RATIO(RATIO) ((1 <= (RATIO)) && ((RATIO) <= 1024))
760 #define IS_DFSDM_FILTER_INTEGRATOR_OVS_RATIO(RATIO) ((1 <= (RATIO)) && ((RATIO) <= 256))
761 #define IS_DFSDM_FILTER_AWD_DATA_SOURCE(DATA) (((DATA) == DFSDM_FILTER_AWD_FILTER_DATA) || \
762  ((DATA) == DFSDM_FILTER_AWD_CHANNEL_DATA))
763 #define IS_DFSDM_FILTER_AWD_THRESHOLD(VALUE) ((-8388608 <= (VALUE)) && ((VALUE) <= 8388607))
764 #define IS_DFSDM_BREAK_SIGNALS(VALUE) ((VALUE) <= 0xFU)
765 #define IS_DFSDM_REGULAR_CHANNEL(CHANNEL) (((CHANNEL) == DFSDM_CHANNEL_0) || \
766  ((CHANNEL) == DFSDM_CHANNEL_1) || \
767  ((CHANNEL) == DFSDM_CHANNEL_2) || \
768  ((CHANNEL) == DFSDM_CHANNEL_3) || \
769  ((CHANNEL) == DFSDM_CHANNEL_4) || \
770  ((CHANNEL) == DFSDM_CHANNEL_5) || \
771  ((CHANNEL) == DFSDM_CHANNEL_6) || \
772  ((CHANNEL) == DFSDM_CHANNEL_7))
773 #define IS_DFSDM_INJECTED_CHANNEL(CHANNEL) (((CHANNEL) != 0) && ((CHANNEL) <= 0x000F00FFU))
774 #define IS_DFSDM_CONTINUOUS_MODE(MODE) (((MODE) == DFSDM_CONTINUOUS_CONV_OFF) || \
775  ((MODE) == DFSDM_CONTINUOUS_CONV_ON))
776 
779 /* End of private macros -----------------------------------------------------*/
780 
788 #endif /* STM32F765xx || STM32F767xx || STM32F769xx || STM32F777xx || STM32F779xx */
789 #ifdef __cplusplus
790 }
791 #endif
792 
793 #endif /* __STM32F7xx_HAL_DFSDM_H */
794 
795 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
HAL_DFSDM_FilterPollForInjConversion
HAL_StatusTypeDef HAL_DFSDM_FilterPollForInjConversion(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t Timeout)
Init
napi_value Init(napi_env env, napi_value exports)
Definition: porcupine/demo/c/pvrecorder/node/pv_recorder_napi.c:197
HAL_StatusTypeDef
HAL_StatusTypeDef
HAL Status structures definition
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:40
DFSDM_Filter_InitTypeDef
DFSDM filter init structure definition.
Definition: stm32h7xx_hal_dfsdm.h:209
__DMA_HandleTypeDef
DMA handle Structure definition.
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:139
HAL_DFSDM_FilterGetExdMaxValue
int32_t HAL_DFSDM_FilterGetExdMaxValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t *Channel)
HAL_DFSDM_FilterDeInit
HAL_StatusTypeDef HAL_DFSDM_FilterDeInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
HAL_DFSDM_FilterInit
HAL_StatusTypeDef HAL_DFSDM_FilterInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
HAL_DFSDM_FILTER_STATE_REG
@ HAL_DFSDM_FILTER_STATE_REG
Definition: stm32h7xx_hal_dfsdm.h:161
HAL_DFSDM_FILTER_STATE_REG_INJ
@ HAL_DFSDM_FILTER_STATE_REG_INJ
Definition: stm32h7xx_hal_dfsdm.h:163
HAL_DFSDM_ChannelCkabStart_IT
HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStart_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
DFSDM_Filter_RegularParamTypeDef
DFSDM filter regular conversion parameters structure definition.
Definition: stm32h7xx_hal_dfsdm.h:170
HAL_DFSDM_ChannelScdCallback
void HAL_DFSDM_ChannelScdCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
HAL_DFSDM_FilterRegularStart_IT
HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
HAL_DFSDM_FilterGetState
HAL_DFSDM_Filter_StateTypeDef HAL_DFSDM_FilterGetState(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
HAL_DFSDM_ChannelGetState
HAL_DFSDM_Channel_StateTypeDef HAL_DFSDM_ChannelGetState(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
DFSDM_Channel_OutputClockTypeDef
DFSDM channel output clock structure definition.
Definition: stm32h7xx_hal_dfsdm.h:57
HAL_DFSDM_ChannelMspInit
void HAL_DFSDM_ChannelMspInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
DFSDM_Channel MSP Initialization This function configures the hardware resources used in this example...
Definition: stm32h7xx_hal_msp.c:207
HAL_DFSDM_ChannelGetAwdValue
int16_t HAL_DFSDM_ChannelGetAwdValue(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
HAL_DFSDM_ChannelModifyOffset
HAL_StatusTypeDef HAL_DFSDM_ChannelModifyOffset(DFSDM_Channel_HandleTypeDef *hdfsdm_channel, int32_t Offset)
HAL_DFSDM_FILTER_STATE_INJ
@ HAL_DFSDM_FILTER_STATE_INJ
Definition: stm32h7xx_hal_dfsdm.h:162
HAL_DFSDM_ChannelScdStop
HAL_StatusTypeDef HAL_DFSDM_ChannelScdStop(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
HAL_DFSDM_FilterMspDeInit
void HAL_DFSDM_FilterMspDeInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
DFSDM_Filter MSP De-Initialization This function freeze the hardware resources used in this example.
Definition: stm32h7xx_hal_msp.c:257
HAL_DFSDM_FilterInjectedStart_DMA
HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, int32_t *pData, uint32_t Length)
HAL_DFSDM_FilterGetInjectedValue
int32_t HAL_DFSDM_FilterGetInjectedValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t *Channel)
HAL_DFSDM_FilterPollForRegConversion
HAL_StatusTypeDef HAL_DFSDM_FilterPollForRegConversion(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t Timeout)
HAL_DFSDM_ChannelPollForCkab
HAL_StatusTypeDef HAL_DFSDM_ChannelPollForCkab(DFSDM_Channel_HandleTypeDef *hdfsdm_channel, uint32_t Timeout)
HAL_DFSDM_FilterInjConvHalfCpltCallback
void HAL_DFSDM_FilterInjConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
HAL_DFSDM_FilterRegularMsbStart_DMA
HAL_StatusTypeDef HAL_DFSDM_FilterRegularMsbStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, int16_t *pData, uint32_t Length)
HAL_DFSDM_Channel_StateTypeDef
HAL_DFSDM_Channel_StateTypeDef
HAL DFSDM Channel states definition.
Definition: stm32h7xx_hal_dfsdm.h:47
HAL_DFSDM_FilterRegularStop_DMA
HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
DFSDM_Filter_HandleTypeDef
DFSDM filter handle structure definition.
Definition: stm32h7xx_hal_dfsdm.h:222
HAL_DFSDM_FilterRegularStop_IT
HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
HAL_DFSDM_FilterInjectedStop_IT
HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
DFSDM_Channel_SerialInterfaceTypeDef
DFSDM channel serial interface structure definition.
Definition: stm32h7xx_hal_dfsdm.h:82
HAL_DFSDM_FilterAwdStop_IT
HAL_StatusTypeDef HAL_DFSDM_FilterAwdStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
HAL_DFSDM_ChannelCkabStop_IT
HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStop_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
HAL_DFSDM_FilterRegularStart_DMA
HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, int32_t *pData, uint32_t Length)
HAL_DFSDM_FilterRegularStart
HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
HAL_DFSDM_FilterGetExdMinValue
int32_t HAL_DFSDM_FilterGetExdMinValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t *Channel)
HAL_DFSDM_FilterGetError
uint32_t HAL_DFSDM_FilterGetError(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
HAL_DFSDM_ChannelScdStop_IT
HAL_StatusTypeDef HAL_DFSDM_ChannelScdStop_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
DFSDM_Channel_TypeDef
DFSDM channel configuration registers.
Definition: stm32f769xx.h:374
HAL_DFSDM_ChannelMspDeInit
void HAL_DFSDM_ChannelMspDeInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
DFSDM_Channel MSP De-Initialization This function freeze the hardware resources used in this example.
Definition: stm32h7xx_hal_msp.c:290
HAL_DFSDM_FilterGetConvTimeValue
uint32_t HAL_DFSDM_FilterGetConvTimeValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
HAL_DFSDM_ChannelDeInit
HAL_StatusTypeDef HAL_DFSDM_ChannelDeInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
DFSDM_Channel_InitTypeDef
DFSDM channel init structure definition.
Definition: stm32h7xx_hal_dfsdm.h:104
HAL_DFSDM_FilterRegConvCpltCallback
void HAL_DFSDM_FilterRegConvCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
Regular conversion complete callback.
Definition: stm32f769i_discovery_audio.c:1441
HAL_DFSDM_ChannelInit
HAL_StatusTypeDef HAL_DFSDM_ChannelInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
DFSDM_Filter_AwdParamTypeDef
DFSDM filter analog watchdog parameters structure definition.
Definition: stm32h7xx_hal_dfsdm.h:254
HAL_DFSDM_FilterMspInit
void HAL_DFSDM_FilterMspInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
DFSDM_Filter MSP Initialization This function configures the hardware resources used in this example.
Definition: stm32h7xx_hal_msp.c:133
HAL_DFSDM_ChannelCkabCallback
void HAL_DFSDM_ChannelCkabCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
HAL_DFSDM_FilterRegConvHalfCpltCallback
void HAL_DFSDM_FilterRegConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
Half regular conversion complete callback.
Definition: stm32f769i_discovery_audio.c:1517
HAL_DFSDM_IRQHandler
void HAL_DFSDM_IRQHandler(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
HAL_DFSDM_CHANNEL_STATE_READY
@ HAL_DFSDM_CHANNEL_STATE_READY
Definition: stm32h7xx_hal_dfsdm.h:50
HAL_DFSDM_FilterInjectedMsbStart_DMA
HAL_StatusTypeDef HAL_DFSDM_FilterInjectedMsbStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, int16_t *pData, uint32_t Length)
HAL_DFSDM_FilterErrorCallback
void HAL_DFSDM_FilterErrorCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
DFSDM_Channel_InputTypeDef
DFSDM channel input structure definition.
Definition: stm32h7xx_hal_dfsdm.h:69
HAL_DFSDM_FilterInjectedStart
HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
DFSDM_Channel_HandleTypeDef
DFSDM channel handle structure definition.
Definition: stm32h7xx_hal_dfsdm.h:122
HAL_DFSDM_CHANNEL_STATE_ERROR
@ HAL_DFSDM_CHANNEL_STATE_ERROR
Definition: stm32h7xx_hal_dfsdm.h:51
HAL_DFSDM_FilterInjectedStart_IT
HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
HAL_DFSDM_FilterConfigRegChannel
HAL_StatusTypeDef HAL_DFSDM_FilterConfigRegChannel(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t Channel, uint32_t ContinuousMode)
DFSDM_Filter_InjectedParamTypeDef
DFSDM filter injected conversion parameters structure definition.
Definition: stm32h7xx_hal_dfsdm.h:181
HAL_DFSDM_ChannelScdStart
HAL_StatusTypeDef HAL_DFSDM_ChannelScdStart(DFSDM_Channel_HandleTypeDef *hdfsdm_channel, uint32_t Threshold, uint32_t BreakSignal)
HAL_DFSDM_FilterInjectedStop_DMA
HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
HAL_DFSDM_FilterExdStart
HAL_StatusTypeDef HAL_DFSDM_FilterExdStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t Channel)
HAL_DFSDM_FilterInjConvCpltCallback
void HAL_DFSDM_FilterInjConvCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
stm32f7xx_hal_def.h
This file contains HAL common defines, enumeration, macros and structures definitions.
DFSDM_Filter_TypeDef
DFSDM module registers.
Definition: stm32f769xx.h:352
Input
Input
HAL_DFSDM_FilterRegularStop
HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
HAL_DFSDM_FilterConfigInjChannel
HAL_StatusTypeDef HAL_DFSDM_FilterConfigInjChannel(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t Channel)
HAL_DFSDM_Filter_StateTypeDef
HAL_DFSDM_Filter_StateTypeDef
HAL DFSDM Filter states definition.
Definition: stm32h7xx_hal_dfsdm.h:157
HAL_DFSDM_FilterInjectedStop
HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
HAL_DFSDM_FilterGetRegularValue
int32_t HAL_DFSDM_FilterGetRegularValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t *Channel)
DFSDM_Filter_FilterParamTypeDef
DFSDM filter parameters structure definition.
Definition: stm32h7xx_hal_dfsdm.h:196
HAL_DFSDM_FilterExdStop
HAL_StatusTypeDef HAL_DFSDM_FilterExdStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
HAL_DFSDM_FILTER_STATE_READY
@ HAL_DFSDM_FILTER_STATE_READY
Definition: stm32h7xx_hal_dfsdm.h:160
HAL_DFSDM_ChannelScdStart_IT
HAL_StatusTypeDef HAL_DFSDM_ChannelScdStart_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel, uint32_t Threshold, uint32_t BreakSignal)
HAL_DFSDM_ChannelCkabStop
HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStop(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
HAL_DFSDM_FilterAwdStart_IT
HAL_StatusTypeDef HAL_DFSDM_FilterAwdStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, DFSDM_Filter_AwdParamTypeDef *awdParam)
HAL_DFSDM_FILTER_STATE_RESET
@ HAL_DFSDM_FILTER_STATE_RESET
Definition: stm32h7xx_hal_dfsdm.h:159
HAL_DFSDM_FILTER_STATE_ERROR
@ HAL_DFSDM_FILTER_STATE_ERROR
Definition: stm32h7xx_hal_dfsdm.h:164
HAL_DFSDM_ChannelPollForScd
HAL_StatusTypeDef HAL_DFSDM_ChannelPollForScd(DFSDM_Channel_HandleTypeDef *hdfsdm_channel, uint32_t Timeout)
HAL_DFSDM_FilterAwdCallback
void HAL_DFSDM_FilterAwdCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t Channel, uint32_t Threshold)
DFSDM_Channel_AwdTypeDef
DFSDM channel analog watchdog structure definition.
Definition: stm32h7xx_hal_dfsdm.h:93
HAL_DFSDM_CHANNEL_STATE_RESET
@ HAL_DFSDM_CHANNEL_STATE_RESET
Definition: stm32h7xx_hal_dfsdm.h:49
HAL_DFSDM_ChannelCkabStart
HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStart(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
FunctionalState
FunctionalState
Definition: stm32f407/stm32f407g-disc1/Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:191

picovoice_driver
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autogenerated on Fri Apr 1 2022 02:14:53