xccmem.h
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00001 /* GCC macros for XC-cube primitives for XC-cube shared memory model.
00002    version 0.10
00003    Copyright (C) 2001 Masahiro Yasugi.
00004 
00005    Supported platform:
00006    __i386__
00007    __alpha__
00008    __sparc_v9__
00009    _POWER _ARCH_PPC
00010    __mips__
00011 
00012    GCC compilation options:
00013    for UltraSparc:  -mcpu=ultrasparc
00014    for PowerPC:     -mcpu=powerpc
00015    */
00016 
00017 #ifndef XCCMEM_H
00018 #define XCCMEM_H
00019 
00020 /*
00021  * assertion
00022  */
00023 
00024 #define XCC_ASSERT(cond,msg) ({char msg[(cond)?1:(-1)]; 0;})
00025 
00026 /*
00027  * Tools for instructions 
00028  */
00029 
00030 typedef int xcc_DItype __attribute__ ((mode (DI)));
00031 typedef int xcc_SItype __attribute__ ((mode (SI)));
00032 typedef int xcc_HItype __attribute__ ((mode (HI)));
00033 typedef int xcc_QItype __attribute__ ((mode (QI)));
00034 
00035 typedef float xcc_SFtype __attribute__ ((mode (SF)));
00036 typedef float xcc_DFtype __attribute__ ((mode (DF)));
00037 
00038 #define FORCE_TYPE(TP,x) \
00039 ({ union { TP x1; typeof(x) x2; } _u ; _u.x2 = (x); _u.x1; })
00040 
00041 /*
00042  * Instructions
00043  */
00044 
00045 #ifdef __i386__
00046 
00047 /* lock add $0,(%esp) とどっちが速い? */
00048 #define xcc_slbar_VOID() do{\
00049   xcc_SItype _tmp1, _tmp2;\
00050   __asm__("xchgl %1,%0": "=m"(_tmp1), "=r"(_tmp2) :: "memory");\
00051 }while(0)
00052 
00053 
00054 #define xcc_rawcas_DI(loc,ov,nv) __xcc_rawcas_DI((loc),(ov),(nv))
00055 extern __inline__ int
00056 __xcc_rawcas_DI(xcc_DItype *loc, xcc_DItype ov, xcc_DItype nv){
00057   int s = 0; 
00058   union { xcc_DItype v; xcc_SItype w2[2]; } u;
00059   u.v = nv;
00060   __asm__ __volatile__("lock; cmpxchg8b %0\n"
00061                        "        jz 1f\n"
00062                        "        inc %1\n"
00063                        "1:"
00064                        : "=m"(*loc), "=r"(s), "=A"(ov)
00065                        : "m" (*loc), "1"(s), "2"(ov),
00066                        "b"(u.w2[0]), "c"(u.w2[1]) : "cc");
00067   return s;
00068 }
00069 
00070 #define xcc_rawcas_SI(loc,ov,nv) __xcc_rawcas_SI((loc),(ov),(nv))
00071 extern __inline__ int
00072 __xcc_rawcas_SI(xcc_SItype *loc, xcc_SItype ov, xcc_SItype nv){
00073   int s = 0; 
00074   __asm__ __volatile__("lock; cmpxchgl %6,%0\n"
00075                        "        jz 1f\n"
00076                        "        inc %1\n"
00077                        "1:"
00078                        : "=m"(*loc), "=r"(s), "=a"(ov)
00079                        : "m"(*loc), "1"(s), "2"(ov), "q"(nv) : "cc");
00080   return s;
00081 }
00082 
00083 #define xcc_rawcas_HI(loc,ov,nv) __xcc_rawcas_HI((loc),(ov),(nv))
00084 extern __inline__ int
00085 __xcc_rawcas_HI(xcc_HItype *loc, xcc_HItype ov, xcc_HItype nv){
00086   int s = 0; 
00087   __asm__ __volatile__("lock; cmpxchgw %6,%0\n"
00088                        "        jz 1f\n"
00089                        "        inc %1\n"
00090                        "1:"
00091                        : "=m"(*loc), "=r"(s), "=a"(ov)
00092                        : "m"(*loc), "1"(s), "2"(ov), "q"(nv) : "cc");
00093   return s;
00094 }
00095 
00096 #define xcc_cas_HI(loc,ov,nv) __xcc_cas_HI((loc),(ov),(nv))
00097 extern __inline__ int
00098 __xcc_cas_HI(xcc_HItype *loc, xcc_HItype ov, xcc_HItype nv){
00099   return (*loc != ov) || xcc_rawcas_HI(loc,ov,nv);
00100 }
00101 
00102 
00103 #define xcc_rawcas_QI(loc,ov,nv) __xcc_rawcas_QI((loc),(ov),(nv))
00104 extern __inline__ int
00105 __xcc_rawcas_QI(xcc_QItype *loc, xcc_QItype ov, xcc_QItype nv){
00106   int s = 0; 
00107   __asm__ __volatile__("lock; cmpxchgb %6,%0\n"
00108                        "        jz 1f\n"
00109                        "        inc %1\n"
00110                        "1:"
00111                        : "=m"(*loc), "=r"(s), "=a"(ov)
00112                        : "m"(*loc), "1"(s), "2"(ov), "q"(nv) : "cc");
00113   return s;
00114 }
00115 
00116 #define xcc_cas_QI(loc,ov,nv) __xcc_cas_QI((loc),(ov),(nv))
00117 extern __inline__ int
00118 __xcc_cas_QI(xcc_QItype *loc, xcc_QItype ov, xcc_QItype nv){
00119   return (*loc != ov) || xcc_rawcas_QI(loc,ov,nv);
00120 }
00121 
00122 #define xcc_atomic_swap_DI(loc,v) __xcc_atomic_swap_DI((loc),(v))
00123 extern __inline__ xcc_DItype
00124 __xcc_atomic_swap_DI(xcc_DItype *loc, xcc_DItype val){ 
00125   __asm__ __volatile__("movl %%eax,%%ebx\n"
00126                        "        movl %%edx,%%ecx\n"
00127                        "        lock\n"
00128                        "        cmpxchg8b %0\n"
00129                        "1:      lock\n"
00130                        "        cmpxchg8b %0\n"
00131                        "        jnz 1b"
00132                        : "=m"(*loc), "=A"(val) : "m"(*loc), "1"(val)
00133                        : "ecx", "ebx", "cc");
00134   return val;
00135 }
00136 
00137 /* lock 必要?? */
00138 #define xcc_atomic_swap_SI(loc,v) __xcc_atomic_swap_SI((loc),(v))
00139 extern __inline__ xcc_SItype
00140 __xcc_atomic_swap_SI(xcc_SItype *loc, xcc_SItype val){ 
00141   __asm__ __volatile__("xchgl %1,%0"
00142                        : "=m"(*loc), "=r"(val) : "m"(*loc), "1"(val));
00143   return val;
00144 }
00145 
00146 
00147 #define xcc_atomic_swap_HI(loc,v) __xcc_atomic_swap_HI((loc),(v))
00148 extern __inline__ xcc_HItype
00149 __xcc_atomic_swap_HI(xcc_HItype *loc, xcc_HItype val){ 
00150   __asm__ __volatile__("xchgw %1,%0"
00151                        : "=m"(*loc), "=r"(val) : "m"(*loc), "1"(val));
00152   return val;
00153 }
00154 
00155 #define xcc_atomic_swap_QI(loc,v) __xcc_atomic_swap_QI((loc),(v))
00156 extern __inline__ xcc_QItype
00157 __xcc_atomic_swap_QI(xcc_QItype *loc, xcc_QItype val){
00158   __asm__ __volatile__("xchgb %1,%0"
00159                        : "=m"(*loc), "=r"(val) : "m"(*loc), "1"(val));
00160   return val;
00161 }
00162 
00163 #define xcc_atomic_write_DI(loc,v) __xcc_atomic_write_DI((loc),(v))
00164 extern __inline__ void
00165 __xcc_atomic_write_DI(xcc_DItype *loc, xcc_DItype val){
00166   xcc_DItype tmp;
00167   __asm__ __volatile__("movl %%eax,%%ebx\n"
00168                        "        movl %%edx,%%ecx\n"
00169                        "        lock\n"
00170                        "        cmpxchg8b %0\n"
00171                        "1:      lock\n"
00172                        "        cmpxchg8b %0\n"
00173                        "        jnz 1b"
00174                        : "=m"(*loc), "=A"(tmp) : "A"(val)
00175                        : "ecx", "ebx", "cc");
00176 }
00177 
00178 #define xcc_atomic_read_DI(loc) __xcc_atomic_read_DI(loc)
00179 extern __inline__ xcc_DItype
00180 __xcc_atomic_read_DI(xcc_DItype *loc){
00181   xcc_DItype val;
00182   __asm__ __volatile__("movl %%eax,%%ebx\n"
00183                        "        movl %%edx,%%ecx\n"
00184                        "        lock\n"
00185                        "        cmpxchg8b %1"
00186                        : "=A"(val) : "m"(*loc)
00187                        : "ecx", "ebx", "cc", "memory");
00188   return val;
00189 }
00190 
00191 #endif /* __i386__ */
00192 
00193 #ifdef __alpha__
00194 /* __alpha_ev4__ __alpha_ev5__ __alpha_ev6__ */
00195 
00196 #define xcc_aabar_VOID() __asm__ __volatile__("mb":::"memory")
00197 
00198 #define xcc_rawcas_DI(loc,ov,nv) xcc_cas_DI((loc),(ov),(nv))
00199 #define xcc_cas_DI(loc,ov,nv) __xcc_cas_DI((loc),(ov),(nv))
00200 extern __inline__ int
00201 __xcc_cas_DI(xcc_DItype *loc, xcc_DItype ov, xcc_DItype nv){
00202   int cmp;
00203   xcc_DItype tmp;
00204   __asm__ __volatile__("ldq_l %0,%5\n"
00205                        "        cmpeq %0,%3,%1\n"
00206                        "        beq %1,1f\n"
00207                        "        mov %4,%1\n"
00208                        "        stq_c %1,%2\n"
00209                        "1:"
00210                        : "=&r"(tmp),"=&r"(cmp),"=m"(*loc)
00211                        : "r"(ov),"r"(nv),"m"(*loc));
00212   return !cmp; 
00213 }
00214 
00215 #define xcc_rawcas_SI(loc,ov,nv) xcc_cas_SI((loc),(ov),(nv))
00216 #define xcc_cas_SI(loc,ov,nv) __xcc_cas_SI((loc),(ov),(nv))
00217 extern __inline__ int
00218 __xcc_cas_SI(xcc_SItype *loc, xcc_SItype ov, xcc_SItype nv){
00219   int cmp;
00220   xcc_SItype tmp;
00221   __asm__ __volatile__("ldl_l %0,%5\n"
00222                        "        cmpeq %0,%3,%1\n"
00223                        "        beq %1,1f\n"
00224                        "        mov %4,%1\n"
00225                        "        stl_c %1,%2\n"
00226                        "1:"
00227                        : "=&r"(tmp),"=&r"(cmp),"=m"(*loc)
00228                        : "rI"(ov),"rI"(nv),"m"(*loc));
00229   return !cmp; 
00230 }
00231 
00232 #define xcc_atomic_write_HI(loc,v) __xcc_atomic_write_HI((loc),(v))
00233 extern __inline__ void
00234 __xcc_atomic_write_HI(xcc_HItype *loc, xcc_HItype val){
00235   xcc_DItype _tmp1, _tmp2, *_tmpa, *_tmpb;
00236   __asm__ __volatile__("lda     %3,%0\n"
00237                        "        bic     %3,7,%4\n"
00238                        "        inswl   %6,%3,%2\n"
00239                        "1:      ldq_l   %1,0(%4)\n"
00240                        "        mskwl   %1,%3,%1\n"
00241                        "        bis     %1,%2,%1\n"
00242                        "        stq_c   %1,0(%4)\n"
00243                        "        bne     %1,1b"
00244                        : "=m"(*loc),"=r"(_tmp1),"=r"(_tmp2),
00245                        "=&r"(_tmpa),"=&r"(_tmpb)
00246                        : "m"(*loc), "r"(val)); 
00247 }
00248 
00249 
00250 #define xcc_atomic_write_QI(loc,v) __xcc_atomic_write_QI((loc),(v))
00251 extern __inline__ void
00252 __xcc_atomic_write_QI(xcc_QItype *loc, xcc_QItype val){
00253   xcc_DItype _tmp1, _tmp2, *_tmpa, *_tmpb;
00254   __asm__ __volatile__("lda     %3,%0\n"
00255                        "        bic     %3,7,%4\n"
00256                        "        insbl   %6,%3,%2\n"
00257                        "1:      ldq_l   %1,0(%4)\n"
00258                        "        mskbl   %1,%3,%1\n"
00259                        "        bis     %1,%2,%1\n"
00260                        "        stq_c   %1,0(%4)\n"
00261                        "        bne     %1,1b"
00262                        : "=m"(*loc),"=r"(_tmp1),"=r"(_tmp2),
00263                        "=&r"(_tmpa),"=&r"(_tmpb)
00264                        : "m"(*loc), "r"(val)); 
00265 }
00266 
00267 #endif /* __alpha__ */
00268 
00269 #ifdef __sparc_v9__
00270 #ifndef __arch64__
00271 
00272 #define xcc_slbar_VOID() __asm__("membar #StoreLoad"::: "memory")
00273 
00274 #define xcc_rawcas_DI(loc,ov,nv) __xcc_rawcas_DI((loc),(ov),(nv))
00275 extern __inline__ int
00276 __xcc_rawcas_DI(xcc_DItype *loc, xcc_DItype ov, xcc_DItype nv){
00277   xcc_DItype tmpa, tmpb, ovm=ov, nvm=nv;
00278   __asm__ __volatile__("ldx %6,%2\n"
00279                        "        ldx %7,%3\n"
00280                        "        casx [%5],%3,%2\n"
00281                        "        stx %2,%1"
00282                        : "=m"(*loc),"=m"(nvm),"=&r"(tmpa),"=&r"(tmpb)
00283                        : "m"(*loc),"r"(loc),"m"(nvm),"m"(ovm) : "cc");
00284   nv = nvm;
00285   return (nv != ov);
00286 }
00287 
00288 #define xcc_rawcas_SI(loc,ov,nv) __xcc_rawcas_SI((loc),(ov),(nv))
00289 extern __inline__ int
00290 __xcc_rawcas_SI(xcc_SItype *loc, xcc_SItype ov, xcc_SItype nv){
00291   __asm__ __volatile__("cas [%3],%5,%1"
00292                        : "=m"(*loc),"=&r"(nv)
00293                        : "m"(*loc),"r"(loc),"1"(nv),"r"(ov) : "cc");
00294   return (nv != ov);
00295 }
00296 
00297 #endif /* not __arch64__ */
00298 #endif /* __sparc_v9__ */
00299 
00300 #ifdef _POWER
00301 #ifdef _ARCH_PPC
00302 
00303 #define xcc_aabar_VOID() __asm__ __volatile__("sync":::"memory")
00304 #define xcc_isync_VOID() __asm__ __volatile__("isync":::"memory")
00305 #define xcc_ssbar_VOID() __asm__ __volatile__("eieio":::"memory")
00306 
00307 #define xcc_rawcas_DI(loc,ov,nv) xcc_cas_SI((loc),(ov),(nv))
00308 #define xcc_cas_DI(loc,ov,nv) XCC_ASSERT(0,_64bit_cas_not_support)
00309 #define xcc_atomic_swap_DI(loc,v) XCC_ASSERT(0,_64bit_cas_not_support)
00310 #define xcc_cas_DF(loc,ov,nv) XCC_ASSERT(0,_64bit_cas_not_support)
00311 #define xcc_atomic_swap_DF(loc,v) XCC_ASSERT(0,_64bit_cas_not_support)
00312 
00313 #define xcc_rawcas_SI(loc,ov,nv) xcc_cas_SI((loc),(ov),(nv))
00314 #define xcc_cas_SI(loc,ov,nv) __xcc_cas_SI((loc),(ov),(nv))
00315 extern __inline__ int
00316 __xcc_cas_SI(xcc_SItype *loc, xcc_SItype ov, xcc_SItype nv){
00317   int cmp = 1;
00318   xcc_SItype tmp;
00319   __asm__ __volatile__("lwarx %2,0,%4\n"
00320                        "        cmpw %6,%2\n"
00321                        "        bne- 1f\n"
00322                        "        stwcx. %5,0,%4\n"
00323                        "        bne- 1f\n"
00324                        "        li %1,0\n"
00325                        "1:"
00326                        : "=m"(*loc),"=r"(cmp),"=&r"(tmp)
00327                        : "m"(*loc),"r"(loc),"r"(nv),"r"(ov),"1"(cmp) : "cc");
00328   return cmp; 
00329 }
00330 
00331 #endif /* _ARCH_PPC */
00332 #endif /* _POWER */
00333 
00334 #ifdef __mips__
00335 
00336 #define xcc_rawcas_DI(loc,ov,nv) xcc_cas_DI((loc),(ov),(nv))
00337 #define xcc_cas_DI(loc,ov,nv) __xcc_cas_DI((loc),(ov),(nv))
00338 extern __inline__ int
00339 __xcc_cas_DI(xcc_DItype *loc, xcc_DItype ov, xcc_DItype nv){
00340   int cmp;
00341   xcc_DItype tmp;
00342   __asm__ __volatile__(".set    noreorder\n"
00343                        "        lld %0,%5\n"
00344                        "        bne %0,%3,1f\n"
00345                        "        or %1,$0,$0\n"
00346                        "        or %1,%4,$0\n"
00347                        "        scd %1,%2\n"
00348                        "1:\n"
00349                        "        .set    reorder"
00350                        : "=&r"(tmp),"=&r"(cmp),"=m"(*loc)
00351                        : "r"(ov),"r"(nv),"m"(*loc));
00352   return !cmp; 
00353 }
00354 
00355 #define xcc_rawcas_SI(loc,ov,nv) xcc_cas_SI((loc),(ov),(nv))
00356 #define xcc_cas_SI(loc,ov,nv) __xcc_cas_SI((loc),(ov),(nv))
00357 extern __inline__ int
00358 __xcc_cas_SI(xcc_SItype *loc, xcc_SItype ov, xcc_SItype nv){
00359   int cmp;
00360   xcc_SItype tmp;
00361   __asm__ __volatile__(".set    noreorder\n"
00362                        "        ll %0,%5\n"
00363                        "        bne %0,%3,1f\n"
00364                        "        or %1,$0,$0\n"
00365                        "        or %1,%4,$0\n"
00366                        "        sc %1,%2\n"
00367                        "1:\n"
00368                        "        .set    reorder"
00369                        : "=&r"(tmp),"=&r"(cmp),"=m"(*loc)
00370                        : "r"(ov),"r"(nv),"m"(*loc));
00371   return !cmp; 
00372 }
00373 
00374 #endif /* __mips__ */
00375 
00376 /*
00377  * Common inst. and common emulations
00378  */
00379 
00380 #ifndef xcc_nnbar_VOID
00381 #define xcc_nnbar_VOID() __asm__ __volatile__("":::"memory")
00382 #endif
00383 
00384 #ifndef xcc_cas_DI
00385 #define xcc_cas_DI(loc,ov,nv) __xcc_cas_DI((loc),(ov),(nv))
00386 extern __inline__ int
00387 __xcc_cas_DI(xcc_DItype *loc, xcc_DItype ov, xcc_DItype nv){
00388   return (*loc != ov) || xcc_rawcas_DI(loc,ov,nv);
00389 }
00390 #endif
00391 
00392 #ifndef xcc_cas_SI
00393 #define xcc_cas_SI(loc,ov,nv) __xcc_cas_SI((loc),(ov),(nv))
00394 extern __inline__ int
00395 __xcc_cas_SI(xcc_SItype *loc, xcc_SItype ov, xcc_SItype nv){
00396   return (*loc != ov) || xcc_rawcas_SI(loc,ov,nv);
00397 }
00398 #endif
00399 
00400 #ifndef xcc_cas_HI
00401 #define xcc_cas_HI(loc,ov,nv) __xcc_cas_HI((loc),(ov),(nv))
00402 extern __inline__ int
00403 __xcc_cas_HI(xcc_HItype *loc, xcc_HItype ov, xcc_HItype nv){
00404   int ofs = (loc - (xcc_HItype *)(xcc_SItype *)0) & 1;
00405   xcc_SItype *p = (xcc_SItype *)(loc - ofs), uov = *p;  
00406   union { xcc_SItype v; xcc_HItype s[2]; } unv;
00407   unv.v = uov;
00408   if(unv.s[ofs] != ov) return 1;
00409   unv.s[ofs] = nv;
00410   return xcc_rawcas_SI(p,uov,unv.v);
00411 }
00412 #endif
00413 
00414 #ifndef xcc_cas_QI
00415 #define xcc_cas_QI(loc,ov,nv) __xcc_cas_QI((loc),(ov),(nv))
00416 extern __inline__ int
00417 __xcc_cas_QI(xcc_QItype *loc, xcc_QItype ov, xcc_QItype nv){
00418   int ofs = (loc - (xcc_QItype *)(xcc_SItype *)0) & 3;
00419   xcc_SItype *p = (xcc_SItype *)(loc - ofs), uov = *p;  
00420   union { xcc_SItype v; xcc_QItype c[4]; } unv;
00421   unv.v = uov;
00422   if(unv.c[ofs] != ov) return 1;
00423   unv.c[ofs] = nv;
00424   return xcc_rawcas_SI(p,uov,unv.v);
00425 }
00426 #endif
00427 
00428 #ifndef xcc_cas_DF
00429 #define xcc_cas_DF(loc,ov,nv) __xcc_cas_DF((loc),(ov),(nv))
00430 extern __inline__ int
00431 __xcc_cas_DF(xcc_DFtype *loc, xcc_DFtype ov, xcc_DFtype nv){
00432   return xcc_cas_DI((xcc_DItype *)loc,
00433                     FORCE_TYPE(xcc_DItype,ov),
00434                     FORCE_TYPE(xcc_DItype,nv));
00435 }
00436 #endif
00437 
00438 #ifndef xcc_cas_SF
00439 #define xcc_cas_SF(loc,ov,nv) __xcc_cas_SF((loc),(ov),(nv))
00440 extern __inline__ int
00441 __xcc_cas_SF(xcc_SFtype *loc, xcc_SFtype ov, xcc_SFtype nv){
00442   return xcc_cas_SI((xcc_SItype *)loc,
00443                     FORCE_TYPE(xcc_SItype,ov),
00444                     FORCE_TYPE(xcc_SItype,nv));
00445 }
00446 #endif
00447 
00448 #ifndef xcc_atomic_swap_DI
00449 #define xcc_atomic_swap_DI(loc,v) __xcc_atomic_swap_DI((loc),(v))
00450 extern __inline__ xcc_DItype
00451 __xcc_atomic_swap_DI(xcc_DItype *loc, xcc_DItype val){
00452   xcc_DItype ov;
00453   do{ ov = *loc; }while(xcc_rawcas_DI(loc,ov,val));
00454   return ov;
00455 }
00456 #endif
00457 
00458 #ifndef xcc_atomic_swap_SI
00459 #define xcc_atomic_swap_SI(loc,v) __xcc_atomic_swap_SI((loc),(v))
00460 extern __inline__ xcc_SItype
00461 __xcc_atomic_swap_SI(xcc_SItype *loc, xcc_SItype val){
00462   xcc_SItype ov;
00463   do{ ov = *loc; }while(xcc_rawcas_SI(loc,ov,val));
00464   return ov;
00465 }
00466 #endif
00467 
00468 #ifndef xcc_atomic_swap_HI
00469 #define xcc_atomic_swap_HI(loc,v) __xcc_atomic_swap_HI((loc),(v))
00470 extern __inline__ xcc_HItype
00471 __xcc_atomic_swap_HI(xcc_HItype *loc, xcc_HItype val){
00472   int ofs = (loc- (xcc_HItype *)(xcc_SItype *)0) & 1;
00473   xcc_SItype *p = (xcc_SItype *)(loc - ofs), uov;
00474   union { xcc_SItype v; xcc_HItype s[2]; } unv;
00475   do{ unv.v = uov = *p; unv.s[ofs] = val; 
00476   }while(xcc_rawcas_SI(p,uov,unv.v));
00477   unv.v = uov; return unv.s[ofs];
00478 }
00479 #endif
00480 
00481 #ifndef xcc_atomic_swap_QI
00482 #define xcc_atomic_swap_QI(loc,v) __xcc_atomic_swap_QI((loc),(v))
00483 extern __inline__ xcc_QItype
00484 __xcc_atomic_swap_QI(xcc_QItype *loc, xcc_QItype val){
00485   int ofs = (loc- (xcc_QItype *)(xcc_SItype *)0) & 3;
00486   xcc_SItype *p = (xcc_SItype *)(loc - ofs), uov;
00487   union { xcc_SItype v; xcc_QItype c[4]; } unv;
00488   do{ unv.v = uov = *p ; unv.c[ofs] = val;
00489   }while(xcc_rawcas_SI(p,uov,unv.v));
00490   unv.v = uov; return unv.c[ofs];
00491 }
00492 #endif
00493 
00494 #ifndef xcc_atomic_swap_DF
00495 #define xcc_atomic_swap_DF(loc,v) __xcc_atomic_swap_DF((loc),(v))
00496 extern __inline__ xcc_DFtype
00497 __xcc_atomic_swap_DF(xcc_DFtype *loc, xcc_DFtype val){
00498   return FORCE_TYPE(xcc_DFtype,
00499                     xcc_atomic_swap_DI((xcc_DItype *)(loc),
00500                                        FORCE_TYPE(xcc_DItype,val)));
00501 }
00502 #endif
00503 
00504 #ifndef xcc_atomic_swap_SF
00505 #define xcc_atomic_swap_SF(loc,v) __xcc_atomic_swap_SF((loc),(v))
00506 extern __inline__ xcc_SFtype
00507 __xcc_atomic_swap_SF(xcc_SFtype *loc, xcc_SFtype val){
00508   return FORCE_TYPE(xcc_SFtype,
00509                     xcc_atomic_swap_SI((xcc_SItype *)(loc),
00510                                        FORCE_TYPE(xcc_SItype,val)));
00511 }
00512 #endif
00513 
00514 /* end of Instructions */
00515 
00516 /* *//* *//* *//* *//* */
00517 
00518 /*
00519  * data mapping
00520  */
00521 
00522 #ifdef __i386__
00523 
00524 #define xcc_atomic_read_long_long(loc)\
00525 (sizeof(*(loc))==8 ? xcc_atomic_read_DI((xcc_DItype *)(loc)) :\
00526  XCC_ASSERT((sizeof(*(loc))==8), atomic_read_long_long))
00527 
00528 #define xcc_atomic_write_long_long(loc,v)\
00529 do{ if(sizeof(*(loc))==8) xcc_atomic_write_DI((xcc_DItype *)(loc),(v)); \
00530 else XCC_ASSERT((sizeof(*(loc))==8), atomic_write_long_long); }while(0)
00531 
00532 #define xcc_slbar() xcc_slbar_VOID()
00533 #define xcc_sabar() xcc_slbar_VOID()
00534 #define xcc_albar() xcc_slbar_VOID()
00535 #define xcc_aabar() xcc_slbar_VOID()
00536 
00537 #define xcc_start_access_after_lock() xcc_nnbar_VOID()
00538 #define xcc_start_read_after_lock()  xcc_nnbar_VOID()
00539 #define xcc_start_write_after_lock()  xcc_nnbar_VOID()
00540 
00541 #endif /* __i386__ */
00542 
00543 #ifdef __alpha__
00544 /* __alpha_ev4__ __alpha_ev5__ __alpha_ev6__ */
00545 
00546 #define xcc_atomic_write_char(loc,v)\
00547 do{ if(sizeof(*(loc))==1) xcc_atomic_write_QI((xcc_QItype *)(loc),(v)); \
00548 else XCC_ASSERT((sizeof(*(loc))==1), atomic_write_char); }while(0)
00549 
00550 #define xcc_atomic_write_short(loc,v)\
00551 do{ if(sizeof(*(loc))==2) xcc_atomic_write_HI((xcc_HItype *)(loc),(v)); \
00552 else XCC_ASSERT((sizeof(*(loc))==2), atomic_write_short); }while(0)
00553 
00554 #define xcc_defaultbar_VOID() xcc_aabar_VOID()
00555 
00556 #define XCC_LONG_TYPE_SIZE 8
00557 #define XCC_PTR_TYPE_SIZE 8
00558 
00559 #endif /* __alpha__ */
00560 
00561 #ifdef __sparc_v9__
00562 #ifndef __arch64__
00563 /*  -mcpu=ultrasparc */
00564 
00565 /* assuming TSO */
00566 #define xcc_slbar() xcc_slbar_VOID()
00567 #define xcc_sabar() xcc_slbar_VOID()
00568 #define xcc_albar() xcc_slbar_VOID()
00569 #define xcc_aabar() xcc_slbar_VOID()
00570 
00571 #define xcc_start_access_after_lock() xcc_nnbar_VOID()
00572 #define xcc_start_read_after_lock()  xcc_nnbar_VOID()
00573 #define xcc_start_write_after_lock()  xcc_nnbar_VOID()
00574 
00575 #endif /* ! __arch64__ */
00576 #endif /* __sparc_v9__ */
00577 
00578 #ifdef _POWER
00579 #ifdef _ARCH_PPC
00580 /*  -mcpu=powerpc */
00581 
00582 #define xcc_atomic_read_long_long(loc) XCC_ASSERT(0, atomic_read_long_long)
00583 #define xcc_atomic_write_long_long(loc,v)\
00584 do{ XCC_ASSERT((sizeof(*(loc))==8), atomic_write_long_long); }while(0)
00585 #define xcc_atomic_swap_long_long(loc,v) XCC_ASSERT(0, atomic_swap_long_long)
00586 #define xcc_cas_long_long(loc,ov,nv) XCC_ASSERT(0, cas_long_long)
00587 #define xcc_atomic_swap_double(loc,v) XCC_ASSERT(0, atomic_swap_double)
00588 #define xcc_cas_double(loc,ov,nv) XCC_ASSERT(0, cas_double)
00589 
00590 #define xcc_defaultbar_VOID() xcc_aabar_VOID()
00591 #define xcc_ssbar() xcc_ssbar_VOID()
00592 #define xcc_start_access_after_lock() xcc_isync_VOID()
00593 #define xcc_start_read_after_lock()  xcc_isync_VOID()
00594 #define xcc_start_write_after_lock()  xcc_isync_VOID()
00595 
00596 #endif /* _ARCH_PPC */
00597 #endif /* _POWER */
00598 
00599 #ifdef __mips__
00600 
00601 #define XCC_INT_TYPE_SIZE (_MIPS_SZINT/8)
00602 #define XCC_LONG_TYPE_SIZE (_MIPS_SZLONG/8)
00603 #define XCC_PTR_TYPE_SIZE (_MIPS_SZPTR/8)
00604 
00605 #endif /* __mips__ */
00606 
00607 /*
00608  * Common data mapping and/or common (usual) GNUC case
00609  */
00610 
00611 #ifndef XCC_CHAR_TYPE_SIZE
00612 #define XCC_CHAR_TYPE_SIZE 1
00613 #endif
00614 #ifndef XCC_SHORT_TYPE_SIZE
00615 #define XCC_SHORT_TYPE_SIZE 2
00616 #endif
00617 #ifndef XCC_INT_TYPE_SIZE
00618 #define XCC_INT_TYPE_SIZE 4
00619 #endif
00620 #ifndef XCC_LONG_TYPE_SIZE
00621 #define XCC_LONG_TYPE_SIZE 4
00622 #endif
00623 #ifndef XCC_LONG_LONG_TYPE_SIZE
00624 #define XCC_LONG_LONG_TYPE_SIZE 8
00625 #endif
00626 #ifndef XCC_FLOAT_TYPE_SIZE
00627 #define XCC_FLOAT_TYPE_SIZE 4
00628 #endif
00629 #ifndef XCC_DOUBLE_TYPE_SIZE
00630 #define XCC_DOUBLE_TYPE_SIZE 8
00631 #endif
00632 #ifndef XCC_PTR_TYPE_SIZE
00633 #define XCC_PTR_TYPE_SIZE 4
00634 #endif
00635 
00636 #ifndef xcc_atomic_read_char
00637 #define xcc_atomic_read_char(loc) (*(volatile char *)(loc))
00638 #endif
00639 #ifndef xcc_atomic_read_short
00640 #define xcc_atomic_read_short(loc) (*(volatile short *)(loc))
00641 #endif
00642 #ifndef xcc_atomic_read_int
00643 #define xcc_atomic_read_int(loc) (*(volatile int *)(loc))
00644 #endif
00645 #ifndef xcc_atomic_read_long
00646 #define xcc_atomic_read_long(loc) (*(volatile long *)(loc))
00647 #endif
00648 /* long long: except for i386, PPC32, MIPS1/2  */
00649 #ifndef xcc_atomic_read_long_long
00650 #define xcc_atomic_read_long_long(loc) (*(volatile long long *)(loc))
00651 #endif
00652 #ifndef xcc_atomic_read_float
00653 #define xcc_atomic_read_float(loc) (*(volatile float *)(loc))
00654 #endif
00655 #ifndef xcc_atomic_read_double
00656 #define xcc_atomic_read_double(loc) (*(volatile double *)(loc))
00657 #endif
00658 #ifndef xcc_atomic_read_ptr
00659 #define xcc_atomic_read_ptr(loc) (*(void * volatile *)(loc))
00660 #endif
00661 
00662 /* char: except for Alhpa  */
00663 #ifndef xcc_atomic_write_char
00664 #define xcc_atomic_write_char(loc,v) do{*(volatile char *)(loc)=(v);}while(0)
00665 #endif
00666 #ifndef xcc_atomic_write_short
00667 #define xcc_atomic_write_short(loc,v) do{*(volatile short *)(loc)=(v);}while(0)
00668 #endif
00669 #ifndef xcc_atomic_write_int
00670 #define xcc_atomic_write_int(loc,v) do{*(volatile int *)(loc)=(v);}while(0)
00671 #endif
00672 #ifndef xcc_atomic_write_long
00673 #define xcc_atomic_write_long(loc,v) do{*(volatile long *)(loc)=(v);}while(0)
00674 #endif
00675 /* long long: except for i386, PPC32, MIPS1/2  */
00676 #ifndef xcc_atomic_write_long_long
00677 #define xcc_atomic_write_long_long(loc,v)\
00678 do{*(volatile long long *)(loc)=(v);}while(0)
00679 #endif
00680 #ifndef xcc_atomic_write_float
00681 #define xcc_atomic_write_float(loc,v)\
00682 do{*(volatile float *)(loc)=(v);}while(0)
00683 #endif
00684 #ifndef xcc_atomic_write_double
00685 #define xcc_atomic_write_double(loc,v)\
00686 do{*(volatile double *)(loc)=(v);}while(0)
00687 #endif
00688 #ifndef xcc_atomic_write_ptr
00689 #define xcc_atomic_write_ptr(loc,v) do{*(void * volatile *)(loc)=(v);}while(0)
00690 #endif
00691 
00692 #ifndef xcc_atomic_swap_char
00693 #define xcc_atomic_swap_char(loc,v)\
00694 (sizeof(*(loc))==1 ? xcc_atomic_swap_QI((xcc_QItype *)(loc),(v)) :\
00695  XCC_ASSERT((sizeof(*(loc))==1), atomic_swap_char))
00696 #endif
00697 
00698 #ifndef xcc_atomic_swap_short
00699 #define xcc_atomic_swap_short(loc,v)\
00700 (sizeof(*(loc))==2 ? xcc_atomic_swap_HI((xcc_HItype *)(loc),(v)) :\
00701  XCC_ASSERT((sizeof(*(loc))==2), atomic_swap_short))
00702 #endif
00703 
00704 #if XCC_INT_TYPE_SIZE == 4
00705 #ifndef xcc_atomic_swap_int
00706 #define xcc_atomic_swap_int(loc,v)\
00707 (sizeof(*(loc))==4 ? xcc_atomic_swap_SI((xcc_SItype *)(loc),(v)) :\
00708  XCC_ASSERT((sizeof(*(loc))==4), atomic_swap_int))
00709 #endif
00710 #elif XCC_INT_TYPE_SIZE == 8
00711 #ifndef xcc_atomic_swap_int
00712 #define xcc_atomic_swap_int(loc,v)\
00713 (sizeof(*(loc))==8 ? xcc_atomic_swap_DI((xcc_DItype *)(loc),(v)) :\
00714  XCC_ASSERT((sizeof(*(loc))==8), atomic_swap_int))
00715 #endif
00716 #endif /* XCC_INT_TYPE_SIZE == 8 */
00717 
00718 #if XCC_LONG_TYPE_SIZE == 4
00719 #ifndef xcc_atomic_swap_long
00720 #define xcc_atomic_swap_long(loc,v)\
00721 (sizeof(*(loc))==4 ? xcc_atomic_swap_SI((xcc_SItype *)(loc),(v)) :\
00722  XCC_ASSERT((sizeof(*(loc))==4), atomic_swap_long))
00723 #endif
00724 #elif XCC_LONG_TYPE_SIZE == 8
00725 #ifndef xcc_atomic_swap_long
00726 #define xcc_atomic_swap_long(loc,v)\
00727 (sizeof(*(loc))==8 ? xcc_atomic_swap_DI((xcc_DItype *)(loc),(v)) :\
00728  XCC_ASSERT((sizeof(*(loc))==8), atomic_swap_long))
00729 #endif
00730 #endif /* XCC_LONG_TYPE_SIZE == 8 */
00731 
00732 #ifndef xcc_atomic_swap_long_long
00733 #define xcc_atomic_swap_long_long(loc,v)\
00734 (sizeof(*(loc))==8 ? xcc_atomic_swap_DI((xcc_DItype *)(loc),(v)) :\
00735  XCC_ASSERT((sizeof(*(loc))==8), atomic_swap_long_long))
00736 #endif
00737 
00738 #ifndef xcc_atomic_swap
00739 #define xcc_atomic_swap(loc,v)\
00740 (sizeof(*(loc))==1 ? xcc_atomic_swap_QI((xcc_QItype *)(loc),(v)) :\
00741  sizeof(*(loc))==2 ? xcc_atomic_swap_HI((xcc_HItype *)(loc),(v)) :\
00742  sizeof(*(loc))==4 ? xcc_atomic_swap_SI((xcc_SItype *)(loc),(v)) :\
00743  sizeof(*(loc))==8 ? xcc_atomic_swap_DI((xcc_DItype *)(loc),(v)) :\
00744  XCC_ASSERT(((sizeof(*(loc))==1) && (__alignof__(*(loc))==1) ||\
00745              (sizeof(*(loc))==2) && (__alignof__(*(loc))==2) ||\
00746              (sizeof(*(loc))==4) && (__alignof__(*(loc))==4) ||\
00747              (sizeof(*(loc))==8) && (__alignof__(*(loc))==8)),\
00748            atomic_swap))
00749 #endif
00750 
00751 #ifndef xcc_atomic_swap_float
00752 #define xcc_atomic_swap_float(loc,v)\
00753 (sizeof(*(loc))==4 ? xcc_atomic_swap_SF((xcc_SFtype *)(loc),(v)) :\
00754  XCC_ASSERT((sizeof(*(loc))==4), atomic_swap_float))
00755 #endif
00756 
00757 #ifndef xcc_atomic_swap_double
00758 #define xcc_atomic_swap_double(loc,v)\
00759 (sizeof(*(loc))==8 ? xcc_atomic_swap_DF((xcc_DFtype *)(loc),(v)) :\
00760  XCC_ASSERT((sizeof(*(loc))==8), atomic_swap_double))
00761 #endif
00762 
00763 #if XCC_PTR_TYPE_SIZE == 4
00764 #ifndef xcc_atomic_swap_ptr
00765 #define xcc_atomic_swap_ptr(loc,v)\
00766 (sizeof(*(loc))==4 ? \
00767  xcc_atomic_swap_SI((xcc_SItype *)(loc),(xcc_SItype)(v)) :\
00768  XCC_ASSERT((sizeof(*(loc))==4), atomic_swap_ptr))
00769 #endif
00770 #elif XCC_PTR_TYPE_SIZE == 8
00771 #ifndef xcc_atomic_swap_ptr
00772 #define xcc_atomic_swap_ptr(loc,v)\
00773 (sizeof(*(loc))==8 ? \
00774  xcc_atomic_swap_DI((xcc_DItype *)(loc),(xcc_DItype)(v)) :\
00775  XCC_ASSERT((sizeof(*(loc))==8), atomic_swap_ptr))
00776 #endif
00777 #endif /* XCC_PTR_TYPE_SIZE == 8 */
00778 
00779 #ifndef xcc_cas_char
00780 #define xcc_cas_char(loc,ov,nv)\
00781 (sizeof(*(loc))==1 ? xcc_cas_QI((xcc_QItype *)(loc),(ov),(nv)) :\
00782  XCC_ASSERT((sizeof(*(loc))==1), cas_char))
00783 #endif
00784 
00785 #ifndef xcc_cas_short
00786 #define xcc_cas_short(loc,ov,nv)\
00787 (sizeof(*(loc))==2 ? xcc_cas_HI((xcc_HItype *)(loc),(ov),(nv)) :\
00788  XCC_ASSERT((sizeof(*(loc))==2), cas_short))
00789 #endif
00790 
00791 #if XCC_INT_TYPE_SIZE == 4
00792 #ifndef xcc_cas_int
00793 #define xcc_cas_int(loc,ov,nv)\
00794 (sizeof(*(loc))==4 ? xcc_cas_SI((xcc_SItype *)(loc),(ov),(nv)) :\
00795  XCC_ASSERT((sizeof(*(loc))==4), cas_int))
00796 #endif
00797 #elif XCC_INT_TYPE_SIZE == 8
00798 #ifndef xcc_cas_int
00799 #define xcc_cas_int(loc,ov,nv)\
00800 (sizeof(*(loc))==8 ? xcc_cas_DI((xcc_DItype *)(loc),(ov),(nv)) :\
00801  XCC_ASSERT((sizeof(*(loc))==8), cas_int))
00802 #endif
00803 #endif /* XCC_INT_TYPE_SIZE == 8 */
00804 
00805 /* raw cas */
00806 #if XCC_INT_TYPE_SIZE == 4
00807 #ifndef xcc_rawcas_int
00808 #define xcc_rawcas_int(loc,ov,nv)\
00809 (sizeof(*(loc))==4 ? xcc_rawcas_SI((xcc_SItype *)(loc),(ov),(nv)) :\
00810  XCC_ASSERT((sizeof(*(loc))==4), rawcas_int))
00811 #endif
00812 #elif XCC_INT_TYPE_SIZE == 8
00813 #ifndef xcc_rawcas_int
00814 #define xcc_rawcas_int(loc,ov,nv)\
00815 (sizeof(*(loc))==8 ? xcc_rawcas_DI((xcc_DItype *)(loc),(ov),(nv)) :\
00816  XCC_ASSERT((sizeof(*(loc))==8), rawcas_int))
00817 #endif
00818 #endif /* XCC_INT_TYPE_SIZE == 8 */
00819 
00820 #if XCC_LONG_TYPE_SIZE == 4
00821 #ifndef xcc_cas_long
00822 #define xcc_cas_long(loc,ov,nv)\
00823 (sizeof(*(loc))==4 ? xcc_cas_SI((xcc_SItype *)(loc),(ov),(nv)) :\
00824  XCC_ASSERT((sizeof(*(loc))==4), cas_long))
00825 #endif
00826 #elif XCC_LONG_TYPE_SIZE == 8
00827 #ifndef xcc_cas_long
00828 #define xcc_cas_long(loc,ov,nv)\
00829 (sizeof(*(loc))==8 ? xcc_cas_DI((xcc_DItype *)(loc),(ov),(nv)) :\
00830  XCC_ASSERT((sizeof(*(loc))==8), cas_long))
00831 #endif
00832 #endif /* XCC_LONG_TYPE_SIZE == 8 */
00833 
00834 #ifndef xcc_cas_long_long
00835 #define xcc_cas_long_long(loc,ov,nv)\
00836 (sizeof(*(loc))==8 ? xcc_cas_DI((xcc_DItype *)(loc),(ov),(nv)) :\
00837  XCC_ASSERT((sizeof(*(loc))==8), cas_long_long))
00838 #endif
00839 
00840 #ifndef xcc_cas_float
00841 #define xcc_cas_float(loc,ov,nv)\
00842 (sizeof(*(loc))==4 ? xcc_cas_SF((xcc_SFtype *)(loc),(ov),(nv)) :\
00843  XCC_ASSERT((sizeof(*(loc))==4), cas_float))
00844 #endif
00845 
00846 #ifndef xcc_cas_double
00847 #define xcc_cas_double(loc,ov,nv)\
00848 (sizeof(*(loc))==8 ? xcc_cas_DF((xcc_DFtype *)(loc),(ov),(nv)) :\
00849  XCC_ASSERT((sizeof(*(loc))==8), cas_double))
00850 #endif
00851 
00852 #if XCC_PTR_TYPE_SIZE == 4
00853 #ifndef xcc_cas_ptr
00854 #define xcc_cas_ptr(loc,ov,nv)\
00855 (sizeof(*(loc))==4 ? \
00856  xcc_cas_SI((xcc_SItype *)(loc),(xcc_SItype)(ov),(xcc_SItype)(nv)) :\
00857  XCC_ASSERT((sizeof(*(loc))==4), cas_ptr))
00858 #endif
00859 #elif XCC_PTR_TYPE_SIZE == 8
00860 #ifndef xcc_cas_ptr
00861 #define xcc_cas_ptr(loc,ov,nv)\
00862 (sizeof(*(loc))==8 ? \
00863  xcc_cas_DI((xcc_DItype *)(loc),(xcc_DItype)(ov),(xcc_DItype)(nv)) :\
00864  XCC_ASSERT((sizeof(*(loc))==8), cas_ptr))
00865 #endif
00866 #endif /* XCC_PTR_TYPE_SIZE == 8 */
00867 
00868 #ifndef xcc_defaultbar_VOID
00869 #define xcc_defaultbar_VOID() xcc_nnbar_VOID()
00870 #endif
00871 
00872 #ifndef xcc_ssbar
00873 #define xcc_ssbar() xcc_defaultbar_VOID()
00874 #endif
00875 #ifndef xcc_slbar
00876 #define xcc_slbar() xcc_defaultbar_VOID()
00877 #endif
00878 #ifndef xcc_sabar
00879 #define xcc_sabar() xcc_defaultbar_VOID()
00880 #endif
00881 #ifndef xcc_lsbar
00882 #define xcc_lsbar() xcc_defaultbar_VOID()
00883 #endif
00884 #ifndef xcc_llbar
00885 #define xcc_llbar() xcc_defaultbar_VOID()
00886 #endif
00887 #ifndef xcc_labar
00888 #define xcc_labar() xcc_defaultbar_VOID()
00889 #endif
00890 #ifndef xcc_asbar
00891 #define xcc_asbar() xcc_defaultbar_VOID()
00892 #endif
00893 #ifndef xcc_albar
00894 #define xcc_albar() xcc_defaultbar_VOID()
00895 #endif
00896 #ifndef xcc_aabar
00897 #define xcc_aabar() xcc_defaultbar_VOID()
00898 #endif
00899 
00900 /* Pentium's spinlock means aabar() Alpha's spinlock does not */
00901 #ifndef xcc_start_access_after_lock
00902 #define xcc_start_access_after_lock() xcc_aabar()
00903 #endif
00904 #ifndef xcc_start_access_after_read
00905 #define xcc_start_access_after_read() xcc_labar()
00906 #endif
00907 #ifndef xcc_start_access_after_write
00908 #define xcc_start_access_after_write() xcc_sabar()
00909 #endif
00910 #ifndef xcc_start_read_after_lock
00911 #define xcc_start_read_after_lock() xcc_albar()
00912 #endif
00913 #ifndef xcc_start_read_after_read
00914 #define xcc_start_read_after_read() xcc_llbar()
00915 #endif
00916 #ifndef xcc_start_read_after_write
00917 #define xcc_start_read_after_write() xcc_slbar()
00918 #endif
00919 #ifndef xcc_start_write_after_lock
00920 #define xcc_start_write_after_lock() xcc_asbar()
00921 #endif
00922 #ifndef xcc_start_write_after_read
00923 #define xcc_start_write_after_read() xcc_lsbar()
00924 #endif
00925 #ifndef xcc_start_write_after_write
00926 #define xcc_start_write_after_write() xcc_ssbar()
00927 #endif
00928 
00929 #ifndef xcc_finish_access_before_unlock
00930 #define xcc_finish_access_before_unlock() xcc_asbar()
00931 #endif
00932 #ifndef xcc_finish_access_before_read
00933 #define xcc_finish_access_before_read() xcc_albar()
00934 #endif
00935 #ifndef xcc_finish_access_before_write
00936 #define xcc_finish_access_before_write() xcc_asbar()
00937 #endif
00938 #ifndef xcc_finish_read_before_unlock
00939 #define xcc_finish_read_before_unlock() xcc_lsbar()
00940 #endif
00941 #ifndef xcc_finish_read_before_read
00942 #define xcc_finish_read_before_read() xcc_llbar()
00943 #endif
00944 #ifndef xcc_finish_read_before_write
00945 #define xcc_finish_read_before_write()  xcc_lsbar()
00946 #endif
00947 #ifndef xcc_finish_write_before_unlock
00948 #define xcc_finish_write_before_unlock() xcc_ssbar()
00949 #endif
00950 #ifndef xcc_finish_write_before_read
00951 #define xcc_finish_write_before_read() xcc_slbar()
00952 #endif
00953 #ifndef xcc_finish_write_before_write
00954 #define xcc_finish_write_before_write() xcc_ssbar()
00955 #endif
00956 
00957 #ifndef xcc_LOCK_INITIALIZER
00958 #define xcc_LOCK_INITIALIZER 0
00959 #endif
00960 #ifndef xcc_lock_t
00961 #define xcc_lock_t int
00962 #endif
00963 #ifndef xcc_try_lock
00964 #define xcc_try_lock(loc) xcc_cas_int((loc),0,1)
00965 #endif
00966 #ifndef xcc_spin_lock
00967 #define xcc_spin_lock(loc) __xcc_spin_lock(loc)
00968 extern __inline__ void
00969 __xcc_spin_lock(int *loc){ while(xcc_try_lock(loc)) xcc_llbar(); }
00970 #endif
00971 #ifndef xcc_release_lock
00972 #define xcc_release_lock(loc) xcc_atomic_write_int((loc),0)
00973 #endif
00974 
00975 #ifndef xcc_RWLOCK_INITIALIZER
00976 #define xcc_RWLOCK_INITIALIZER 0
00977 #endif
00978 #ifndef xcc_rwlock_t
00979 #define xcc_rwlock_t int
00980 #endif
00981 #ifndef xcc_try_rlock
00982 #define xcc_try_rlock(loc) __xcc_try_rlock(loc)
00983 extern __inline__ int
00984 __xcc_try_rlock(int *loc){
00985   int c=xcc_atomic_read_int(loc);
00986   return ((c<0) || xcc_rawcas_int(loc,c,c+1));
00987 }
00988 #endif
00989 #ifndef xcc_spin_rlock
00990 #define xcc_spin_rlock(loc) __xcc_spin_rlock(loc)
00991 extern __inline__ void
00992 __xcc_spin_rlock(int *loc){ while(xcc_try_rlock(loc)) xcc_llbar(); }
00993 #endif
00994 #ifndef xcc_release_rlock
00995 #define xcc_release_rlock(loc) __xcc_release_rlock(loc)
00996 extern __inline__ void
00997 __xcc_release_rlock(int *loc){
00998   int c; do{c = *loc;}while(xcc_rawcas_int(loc,c,c-1));
00999 }
01000 #endif
01001 #ifndef xcc_try_wlock
01002 #define xcc_try_wlock(loc) xcc_cas_int((loc),0,-1)
01003 #endif
01004 #ifndef xcc_spin_wlock
01005 #define xcc_spin_wlock(loc) __xcc_spin_wlock(loc)
01006 extern __inline__ void
01007 __xcc_spin_wlock(int *loc){ while(xcc_try_wlock(loc)) xcc_llbar(); }
01008 #endif
01009 #ifndef xcc_release_wlock
01010 #define xcc_release_wlock(loc) xcc_atomic_write_int((loc),0)
01011 #endif
01012 
01013 /* *//* *//* *//* *//* */
01014 
01015 /*
01016  * xccmem API primitives
01017  */
01018 
01019 #define atomic_read_char(loc) xcc_atomic_read_char(&(loc))
01020 #define atomic_read_short(loc) xcc_atomic_read_short(&(loc))
01021 #define atomic_read_int(loc) xcc_atomic_read_int(&(loc))
01022 #define atomic_read_long(loc) xcc_atomic_read_long(&(loc))
01023 #define atomic_read_long_long(loc) xcc_atomic_read_long_long(&(loc))
01024 #define atomic_read_float(loc) xcc_atomic_read_float(&(loc))
01025 #define atomic_read_double(loc) xcc_atomic_read_double(&(loc))
01026 #define atomic_read_ptr(loc) xcc_atomic_read_ptr(&(loc))
01027 
01028 #define atomic_read_volatile_char(loc) atomic_read_char(loc)
01029 #define atomic_read_volatile_short(loc) atomic_read_short(loc)
01030 #define atomic_read_volatile_int(loc) atomic_read_int(loc)
01031 #define atomic_read_volatile_long(loc) atomic_read_long(loc)
01032 #define atomic_read_volatile_long_long(loc) atomic_read_long_long(loc)
01033 #define atomic_read_volatile_float(loc) atomic_read_float(loc)
01034 #define atomic_read_volatile_double(loc) atomic_read_double(loc)
01035 #define atomic_read_volatile_ptr(loc) atomic_read_ptr(loc)
01036 
01037 #define read_volatile_char(loc) atomic_read_char(loc)
01038 #define read_volatile_short(loc) atomic_read_short(loc)
01039 #define read_volatile_int(loc) atomic_read_int(loc)
01040 #define read_volatile_long(loc) atomic_read_long(loc)
01041 #define read_volatile_long_long(loc) atomic_read_long_long(loc)
01042 #define read_volatile_float(loc) atomic_read_float(loc)
01043 #define read_volatile_double(loc) atomic_read_double(loc)
01044 #define read_volatile_ptr(loc) atomic_read_ptr(loc)
01045 
01046 #define atomic_write_char(loc,v) xcc_atomic_write_char(&(loc),(v))
01047 #define atomic_write_short(loc,v) xcc_atomic_write_short(&(loc),(v))
01048 #define atomic_write_int(loc,v) xcc_atomic_write_int(&(loc),(v))
01049 #define atomic_write_long(loc,v) xcc_atomic_write_long(&(loc),(v))
01050 #define atomic_write_long_long(loc,v) xcc_atomic_write_long_long(&(loc),(v))
01051 #define atomic_write_float(loc,v) xcc_atomic_write_float(&(loc),(v))
01052 #define atomic_write_double(loc,v) xcc_atomic_write_double(&(loc),(v))
01053 #define atomic_write_ptr(loc,v) xcc_atomic_write_ptr(&(loc),(v))
01054 
01055 #define atomic_write_volatile_char(loc, v) atomic_write_char((loc), (v))
01056 #define atomic_write_volatile_short(loc, v) atomic_write_short((loc), (v))
01057 #define atomic_write_volatile_int(loc, v) atomic_write_int((loc), (v))
01058 #define atomic_write_volatile_long(loc, v) atomic_write_long((loc), (v))
01059 #define atomic_write_volatile_long_long(loc, v) \
01060 atomic_write_long_long((loc), (v))
01061 #define atomic_write_volatile_float(loc, v) atomic_write_float((loc), (v))
01062 #define atomic_write_volatile_double(loc, v) atomic_write_double((loc), (v))
01063 #define atomic_write_volatile_ptr(loc, v) atomic_write_ptr((loc), (v))
01064 
01065 #define write_volatile_char(loc, v) atomic_write_char((loc), (v))
01066 #define write_volatile_short(loc, v) atomic_write_short((loc), (v))
01067 #define write_volatile_int(loc, v) atomic_write_int((loc), (v))
01068 #define write_volatile_long(loc, v) atomic_write_long((loc), (v))
01069 #define write_volatile_long_long(loc, v) atomic_write_long_long((loc), (v))
01070 #define write_volatile_float(loc, v) atomic_write_float((loc), (v))
01071 #define write_volatile_double(loc, v) atomic_write_double((loc), (v))
01072 #define write_volatile_ptr(loc, v) atomic_write_ptr((loc), (v))
01073 
01074 #define atomic_swap_char(loc,v) xcc_atomic_swap_char(&(loc),(v))
01075 #define atomic_swap_short(loc,v) xcc_atomic_swap_short(&(loc),(v))
01076 #define atomic_swap_int(loc,v) xcc_atomic_swap_int(&(loc),(v))
01077 #define atomic_swap_long(loc,v) xcc_atomic_swap_long(&(loc),(v))
01078 #define atomic_swap_long_long(loc,v) xcc_atomic_swap_long_long(&(loc),(v))
01079 #define atomic_swap_float(loc,v) xcc_atomic_swap_float(&(loc),(v))
01080 #define atomic_swap_double(loc,v) xcc_atomic_swap_double(&(loc),(v))
01081 #define atomic_swap_ptr(loc,v) xcc_atomic_swap_ptr(&(loc),(v))
01082 
01083 #define atomic_swap(loc,v) xcc_atomic_swap(&(loc),(v))
01084 
01085 #define cas_char(loc,ov,nv) xcc_cas_char(&(loc),(ov),(nv))
01086 #define cas_short(loc,ov,nv) xcc_cas_short(&(loc),(ov),(nv))
01087 #define cas_int(loc,ov,nv) xcc_cas_int(&(loc),(ov),(nv))
01088 #define cas_long(loc,ov,nv) xcc_cas_long(&(loc),(ov),(nv))
01089 #define cas_long_long(loc,ov,nv) xcc_cas_long_long(&(loc),(ov),(nv))
01090 #define cas_float(loc,ov,nv) xcc_cas_float(&(loc),(ov),(nv))
01091 #define cas_double(loc,ov,nv) xcc_cas_double(&(loc),(ov),(nv))
01092 #define cas_ptr(loc,ov,nv) xcc_cas_ptr(&(loc),(ov),(nv))
01093 
01094 #define ssbar() xcc_ssbar()
01095 #define slbar() xcc_slbar()
01096 #define sabar() xcc_sabar()
01097 #define lsbar() xcc_lsbar()
01098 #define llbar() xcc_llbar()
01099 #define labar() xcc_labar()
01100 #define asbar() xcc_asbar()
01101 #define albar() xcc_albar()
01102 #define aabar() xcc_aabar()
01103 
01104 #define start_access_after_lock() xcc_start_access_after_lock()
01105 #define start_access_after_read() xcc_start_access_after_read()
01106 #define start_access_after_write() xcc_start_access_after_write()
01107 #define start_read_after_lock() xcc_start_read_after_lock()
01108 #define start_read_after_read() xcc_start_read_after_read()
01109 #define start_read_after_write() xcc_start_read_after_write()
01110 #define start_write_after_lock() xcc_start_write_after_lock()
01111 #define start_write_after_read() xcc_start_write_after_read()
01112 #define start_write_after_write() xcc_start_write_after_write()
01113 
01114 #define finish_access_before_unlock() xcc_finish_access_before_unlock()
01115 #define finish_access_before_read() xcc_finish_access_before_read()
01116 #define finish_access_before_write() xcc_finish_access_before_write()
01117 #define finish_read_before_unlock() xcc_finish_read_before_unlock()
01118 #define finish_read_before_read() xcc_finish_read_before_read()
01119 #define finish_read_before_write() xcc_finish_read_before_write()
01120 #define finish_write_before_unlock() xcc_finish_write_before_unlock()
01121 #define finish_write_before_read() xcc_finish_write_before_read()
01122 #define finish_write_before_write() xcc_finish_write_before_write()
01123 
01124 #define LOCK_INITIALIZER xcc_LOCK_INITIALIZER
01125 #define lock_t xcc_lock_t
01126 #define try_lock(loc) xcc_try_lock(&(loc))
01127 #define spin_lock(loc) xcc_spin_lock(&(loc))
01128 #define release_lock(loc) xcc_release_lock(&(loc))
01129 
01130 #define RWLOCK_INITIALIZER xcc_RWLOCK_INITIALIZER
01131 // #define rwlock_t xcc_rwlock_t /* R.Hanai */
01132 #define try_rlock(loc) xcc_try_rlock(&(loc))
01133 #define spin_rlock(loc) xcc_spin_rlock(&(loc))
01134 #define release_rlock(loc) xcc_release_rlock(&(loc))
01135 #define try_wlock(loc) xcc_try_wlock(&(loc))
01136 #define spin_wlock(loc) xcc_spin_wlock(&(loc))
01137 #define release_wlock(loc) xcc_release_wlock(&(loc))
01138 
01139 /* end of xccmem API primitives */
01140 
01141 /* *//* *//* *//* *//* */
01142 
01143 #endif /* not XCCMEM_H */


euslisp
Author(s): Toshihiro Matsui
autogenerated on Thu Jun 6 2019 18:05:54