rfbuffer.h
Go to the documentation of this file.
00001 /*------------------------------------------------------------------------------
00002  *-------------------------        ATH5K Driver          -----------------------
00003  *------------------------------------------------------------------------------
00004  *                                                           V1.0  08/02/2010
00005  *
00006  *
00007  *  Feb 2010 - Samuel Cabrero <samuelcabrero@gmail.com>
00008  *              Initial release
00009  *
00010  *  ----------------------------------------------------------------------------
00011  *  Copyright (C) 2000-2010, Universidad de Zaragoza, SPAIN
00012  *
00013  *  Autors:
00014  *              Samuel Cabrero        <samuelcabrero@gmail.com>
00015  *              Danilo Tardioli       <dantard@unizar.es>
00016  *              Jose Luis Villarroel  <jlvilla@unizar.es>
00017  *
00018  *  This is a simplified version of the original ath5k driver. It should work 
00019  *  with all Atheros 5xxx WLAN cards. The 802.11 layer have been removed so it
00020  *  just send and receive frames over the air, as if it were an Ethernet bus
00021  *  interface.
00022  *
00023  *  Please read ath5k_interface.h for instructions.
00024  *
00025  *  This program is distributed under the terms of GPL version 2 and in the 
00026  *  hope that it will be useful, but WITHOUT ANY WARRANTY; without even the 
00027  *  implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
00028  *  See the GNU General Public License for more details.
00029  *
00030  *----------------------------------------------------------------------------*/
00031 
00032 /*
00033  * RF Buffer handling functions
00034  *
00035  * Copyright (c) 2009 Nick Kossifidis <mickflemm@gmail.com>
00036  *
00037  * Permission to use, copy, modify, and distribute this software for any
00038  * purpose with or without fee is hereby granted, provided that the above
00039  * copyright notice and this permission notice appear in all copies.
00040  *
00041  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
00042  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
00043  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
00044  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
00045  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
00046  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
00047  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
00048  *
00049  */
00050 
00051 
00052 /*
00053  * There are some special registers on the RF chip
00054  * that control various operation settings related mostly to
00055  * the analog parts (channel, gain adjustment etc).
00056  *
00057  * We don't write on those registers directly but
00058  * we send a data packet on the chip, using a special register,
00059  * that holds all the settings we need. After we 've sent the
00060  * data packet, we write on another special register to notify hw
00061  * to apply the settings. This is done so that control registers
00062  * can be dynamicaly programmed during operation and the settings
00063  * are applied faster on the hw.
00064  *
00065  * We call each data packet an "RF Bank" and all the data we write
00066  * (all RF Banks) "RF Buffer". This file holds initial RF Buffer
00067  * data for the different RF chips, and various info to match RF
00068  * Buffer offsets with specific RF registers so that we can access
00069  * them. We tweak these settings on rfregs_init function.
00070  *
00071  * Also check out reg.h and U.S. Patent 6677779 B1 (about buffer
00072  * registers and control registers):
00073  *
00074  * http://www.google.com/patents?id=qNURAAAAEBAJ
00075  */
00076 
00077 
00078 /*
00079  * Struct to hold default mode specific RF
00080  * register values (RF Banks)
00081  */
00082 struct ath5k_ini_rfbuffer {
00083         u8      rfb_bank;               /* RF Bank number */
00084         u16     rfb_ctrl_register;      /* RF Buffer control register */
00085         u32     rfb_mode_data[5];       /* RF Buffer data for each mode */
00086 };
00087 
00088 /*
00089  * Struct to hold RF Buffer field
00090  * infos used to access certain RF
00091  * analog registers
00092  */
00093 struct ath5k_rfb_field {
00094         u8      len;    /* Field length */
00095         u16     pos;    /* Offset on the raw packet */
00096         u8      col;    /* Column -used for shifting */
00097 };
00098 
00099 /*
00100  * RF analog register definition
00101  */
00102 struct ath5k_rf_reg {
00103         u8                      bank;   /* RF Buffer Bank number */
00104         u8                      index;  /* Register's index on rf_regs_idx */
00105         struct ath5k_rfb_field  field;  /* RF Buffer field for this register */
00106 };
00107 
00108 /* Map RF registers to indexes
00109  * We do this to handle common bits and make our
00110  * life easier by using an index for each register
00111  * instead of a full rfb_field */
00112 enum ath5k_rf_regs_idx {
00113         /* BANK 6 */
00114         AR5K_RF_OB_2GHZ = 0,
00115         AR5K_RF_OB_5GHZ,
00116         AR5K_RF_DB_2GHZ,
00117         AR5K_RF_DB_5GHZ,
00118         AR5K_RF_FIXED_BIAS_A,
00119         AR5K_RF_FIXED_BIAS_B,
00120         AR5K_RF_PWD_XPD,
00121         AR5K_RF_XPD_SEL,
00122         AR5K_RF_XPD_GAIN,
00123         AR5K_RF_PD_GAIN_LO,
00124         AR5K_RF_PD_GAIN_HI,
00125         AR5K_RF_HIGH_VC_CP,
00126         AR5K_RF_MID_VC_CP,
00127         AR5K_RF_LOW_VC_CP,
00128         AR5K_RF_PUSH_UP,
00129         AR5K_RF_PAD2GND,
00130         AR5K_RF_XB2_LVL,
00131         AR5K_RF_XB5_LVL,
00132         AR5K_RF_PWD_ICLOBUF_2G,
00133         AR5K_RF_PWD_84,
00134         AR5K_RF_PWD_90,
00135         AR5K_RF_PWD_130,
00136         AR5K_RF_PWD_131,
00137         AR5K_RF_PWD_132,
00138         AR5K_RF_PWD_136,
00139         AR5K_RF_PWD_137,
00140         AR5K_RF_PWD_138,
00141         AR5K_RF_PWD_166,
00142         AR5K_RF_PWD_167,
00143         AR5K_RF_DERBY_CHAN_SEL_MODE,
00144         /* BANK 7 */
00145         AR5K_RF_GAIN_I,
00146         AR5K_RF_PLO_SEL,
00147         AR5K_RF_RFGAIN_SEL,
00148         AR5K_RF_RFGAIN_STEP,
00149         AR5K_RF_WAIT_S,
00150         AR5K_RF_WAIT_I,
00151         AR5K_RF_MAX_TIME,
00152         AR5K_RF_MIXVGA_OVR,
00153         AR5K_RF_MIXGAIN_OVR,
00154         AR5K_RF_MIXGAIN_STEP,
00155         AR5K_RF_PD_DELAY_A,
00156         AR5K_RF_PD_DELAY_B,
00157         AR5K_RF_PD_DELAY_XR,
00158         AR5K_RF_PD_PERIOD_A,
00159         AR5K_RF_PD_PERIOD_B,
00160         AR5K_RF_PD_PERIOD_XR,
00161 };
00162 
00163 
00164 /*******************\
00165 * RF5111 (Sombrero) *
00166 \*******************/
00167 
00168 /* BANK 6                               len  pos col */
00169 #define AR5K_RF5111_OB_2GHZ             { 3, 119, 0 }
00170 #define AR5K_RF5111_DB_2GHZ             { 3, 122, 0 }
00171 
00172 #define AR5K_RF5111_OB_5GHZ             { 3, 104, 0 }
00173 #define AR5K_RF5111_DB_5GHZ             { 3, 107, 0 }
00174 
00175 #define AR5K_RF5111_PWD_XPD             { 1, 95,  0 }
00176 #define AR5K_RF5111_XPD_GAIN            { 4, 96,  0 }
00177 
00178 /* Access to PWD registers */
00179 #define AR5K_RF5111_PWD(_n)             { 1, (135 - _n), 3 }
00180 
00181 /* BANK 7                               len  pos col */
00182 #define AR5K_RF5111_GAIN_I              { 6, 29,  0 }
00183 #define AR5K_RF5111_PLO_SEL             { 1, 4,   0 }
00184 #define AR5K_RF5111_RFGAIN_SEL          { 1, 36,  0 }
00185 #define AR5K_RF5111_RFGAIN_STEP         { 6, 37,  0 }
00186 /* Only on AR5212 BaseBand and up */
00187 #define AR5K_RF5111_WAIT_S              { 5, 19,  0 }
00188 #define AR5K_RF5111_WAIT_I              { 5, 24,  0 }
00189 #define AR5K_RF5111_MAX_TIME            { 2, 49,  0 }
00190 
00191 static const struct ath5k_rf_reg rf_regs_5111[] = {
00192         {6, AR5K_RF_OB_2GHZ,            AR5K_RF5111_OB_2GHZ},
00193         {6, AR5K_RF_DB_2GHZ,            AR5K_RF5111_DB_2GHZ},
00194         {6, AR5K_RF_OB_5GHZ,            AR5K_RF5111_OB_5GHZ},
00195         {6, AR5K_RF_DB_5GHZ,            AR5K_RF5111_DB_5GHZ},
00196         {6, AR5K_RF_PWD_XPD,            AR5K_RF5111_PWD_XPD},
00197         {6, AR5K_RF_XPD_GAIN,           AR5K_RF5111_XPD_GAIN},
00198         {6, AR5K_RF_PWD_84,             AR5K_RF5111_PWD(84)},
00199         {6, AR5K_RF_PWD_90,             AR5K_RF5111_PWD(90)},
00200         {7, AR5K_RF_GAIN_I,             AR5K_RF5111_GAIN_I},
00201         {7, AR5K_RF_PLO_SEL,            AR5K_RF5111_PLO_SEL},
00202         {7, AR5K_RF_RFGAIN_SEL,         AR5K_RF5111_RFGAIN_SEL},
00203         {7, AR5K_RF_RFGAIN_STEP,        AR5K_RF5111_RFGAIN_STEP},
00204         {7, AR5K_RF_WAIT_S,             AR5K_RF5111_WAIT_S},
00205         {7, AR5K_RF_WAIT_I,             AR5K_RF5111_WAIT_I},
00206         {7, AR5K_RF_MAX_TIME,           AR5K_RF5111_MAX_TIME}
00207 };
00208 
00209 /* Default mode specific settings */
00210 static const struct ath5k_ini_rfbuffer rfb_5111[] = {
00211         { 0, 0x989c,
00212         /*     mode a/XR  mode aTurbo    mode b     mode g    mode gTurbo */
00213             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00214         { 0, 0x989c,
00215             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00216         { 0, 0x989c,
00217             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00218         { 0, 0x989c,
00219             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00220         { 0, 0x989c,
00221             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00222         { 0, 0x989c,
00223             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00224         { 0, 0x989c,
00225             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00226         { 0, 0x989c,
00227             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00228         { 0, 0x989c,
00229             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00230         { 0, 0x989c,
00231             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00232         { 0, 0x989c,
00233             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00234         { 0, 0x989c,
00235             { 0x00380000, 0x00380000, 0x00380000, 0x00380000, 0x00380000 } },
00236         { 0, 0x989c,
00237             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00238         { 0, 0x989c,
00239             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00240         { 0, 0x989c,
00241             { 0x00000000, 0x00000000, 0x000000c0, 0x00000080, 0x00000080 } },
00242         { 0, 0x989c,
00243             { 0x000400f9, 0x000400f9, 0x000400ff, 0x000400fd, 0x000400fd } },
00244         { 0, 0x98d4,
00245             { 0x00000000, 0x00000000, 0x00000004, 0x00000004, 0x00000004 } },
00246         { 1, 0x98d4,
00247             { 0x00000020, 0x00000020, 0x00000020, 0x00000020, 0x00000020 } },
00248         { 2, 0x98d4,
00249             { 0x00000010, 0x00000014, 0x00000010, 0x00000010, 0x00000014 } },
00250         { 3, 0x98d8,
00251             { 0x00601068, 0x00601068, 0x00601068, 0x00601068, 0x00601068 } },
00252         { 6, 0x989c,
00253             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00254         { 6, 0x989c,
00255             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00256         { 6, 0x989c,
00257             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00258         { 6, 0x989c,
00259             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00260         { 6, 0x989c,
00261             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00262         { 6, 0x989c,
00263             { 0x10000000, 0x10000000, 0x10000000, 0x10000000, 0x10000000 } },
00264         { 6, 0x989c,
00265             { 0x04000000, 0x04000000, 0x04000000, 0x04000000, 0x04000000 } },
00266         { 6, 0x989c,
00267             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00268         { 6, 0x989c,
00269             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00270         { 6, 0x989c,
00271             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00272         { 6, 0x989c,
00273             { 0x00000000, 0x00000000, 0x0a000000, 0x00000000, 0x00000000 } },
00274         { 6, 0x989c,
00275             { 0x003800c0, 0x00380080, 0x023800c0, 0x003800c0, 0x003800c0 } },
00276         { 6, 0x989c,
00277             { 0x00020006, 0x00020006, 0x00000006, 0x00020006, 0x00020006 } },
00278         { 6, 0x989c,
00279             { 0x00000089, 0x00000089, 0x00000089, 0x00000089, 0x00000089 } },
00280         { 6, 0x989c,
00281             { 0x000000a0, 0x000000a0, 0x000000a0, 0x000000a0, 0x000000a0 } },
00282         { 6, 0x989c,
00283             { 0x00040007, 0x00040007, 0x00040007, 0x00040007, 0x00040007 } },
00284         { 6, 0x98d4,
00285             { 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a } },
00286         { 7, 0x989c,
00287             { 0x00000040, 0x00000048, 0x00000040, 0x00000040, 0x00000040 } },
00288         { 7, 0x989c,
00289             { 0x00000010, 0x00000010, 0x00000010, 0x00000010, 0x00000010 } },
00290         { 7, 0x989c,
00291             { 0x00000008, 0x00000008, 0x00000008, 0x00000008, 0x00000008 } },
00292         { 7, 0x989c,
00293             { 0x0000004f, 0x0000004f, 0x0000004f, 0x0000004f, 0x0000004f } },
00294         { 7, 0x989c,
00295             { 0x000000f1, 0x000000f1, 0x00000061, 0x000000f1, 0x000000f1 } },
00296         { 7, 0x989c,
00297             { 0x0000904f, 0x0000904f, 0x0000904c, 0x0000904f, 0x0000904f } },
00298         { 7, 0x989c,
00299             { 0x0000125a, 0x0000125a, 0x0000129a, 0x0000125a, 0x0000125a } },
00300         { 7, 0x98cc,
00301             { 0x0000000e, 0x0000000e, 0x0000000f, 0x0000000e, 0x0000000e } },
00302 };
00303 
00304 
00305 
00306 /***********************\
00307 * RF5112/RF2112 (Derby) *
00308 \***********************/
00309 
00310 /* BANK 7 (Common)                      len  pos col */
00311 #define AR5K_RF5112X_GAIN_I             { 6, 14,  0 }
00312 #define AR5K_RF5112X_MIXVGA_OVR         { 1, 36,  0 }
00313 #define AR5K_RF5112X_MIXGAIN_OVR        { 2, 37,  0 }
00314 #define AR5K_RF5112X_MIXGAIN_STEP       { 4, 32,  0 }
00315 #define AR5K_RF5112X_PD_DELAY_A         { 4, 58,  0 }
00316 #define AR5K_RF5112X_PD_DELAY_B         { 4, 62,  0 }
00317 #define AR5K_RF5112X_PD_DELAY_XR        { 4, 66,  0 }
00318 #define AR5K_RF5112X_PD_PERIOD_A        { 4, 70,  0 }
00319 #define AR5K_RF5112X_PD_PERIOD_B        { 4, 74,  0 }
00320 #define AR5K_RF5112X_PD_PERIOD_XR       { 4, 78,  0 }
00321 
00322 /* RFX112 (Derby 1) */
00323 
00324 /* BANK 6                               len  pos col */
00325 #define AR5K_RF5112_OB_2GHZ             { 3, 269, 0 }
00326 #define AR5K_RF5112_DB_2GHZ             { 3, 272, 0 }
00327 
00328 #define AR5K_RF5112_OB_5GHZ             { 3, 261, 0 }
00329 #define AR5K_RF5112_DB_5GHZ             { 3, 264, 0 }
00330 
00331 #define AR5K_RF5112_FIXED_BIAS_A        { 1, 260, 0 }
00332 #define AR5K_RF5112_FIXED_BIAS_B        { 1, 259, 0 }
00333 
00334 #define AR5K_RF5112_XPD_SEL             { 1, 284, 0 }
00335 #define AR5K_RF5112_XPD_GAIN            { 2, 252, 0 }
00336 
00337 /* Access to PWD registers */
00338 #define AR5K_RF5112_PWD(_n)             { 1, (302 - _n), 3 }
00339 
00340 static const struct ath5k_rf_reg rf_regs_5112[] = {
00341         {6, AR5K_RF_OB_2GHZ,            AR5K_RF5112_OB_2GHZ},
00342         {6, AR5K_RF_DB_2GHZ,            AR5K_RF5112_DB_2GHZ},
00343         {6, AR5K_RF_OB_5GHZ,            AR5K_RF5112_OB_5GHZ},
00344         {6, AR5K_RF_DB_5GHZ,            AR5K_RF5112_DB_5GHZ},
00345         {6, AR5K_RF_FIXED_BIAS_A,       AR5K_RF5112_FIXED_BIAS_A},
00346         {6, AR5K_RF_FIXED_BIAS_B,       AR5K_RF5112_FIXED_BIAS_B},
00347         {6, AR5K_RF_XPD_SEL,            AR5K_RF5112_XPD_SEL},
00348         {6, AR5K_RF_XPD_GAIN,           AR5K_RF5112_XPD_GAIN},
00349         {6, AR5K_RF_PWD_130,            AR5K_RF5112_PWD(130)},
00350         {6, AR5K_RF_PWD_131,            AR5K_RF5112_PWD(131)},
00351         {6, AR5K_RF_PWD_132,            AR5K_RF5112_PWD(132)},
00352         {6, AR5K_RF_PWD_136,            AR5K_RF5112_PWD(136)},
00353         {6, AR5K_RF_PWD_137,            AR5K_RF5112_PWD(137)},
00354         {6, AR5K_RF_PWD_138,            AR5K_RF5112_PWD(138)},
00355         {7, AR5K_RF_GAIN_I,             AR5K_RF5112X_GAIN_I},
00356         {7, AR5K_RF_MIXVGA_OVR,         AR5K_RF5112X_MIXVGA_OVR},
00357         {7, AR5K_RF_MIXGAIN_OVR,        AR5K_RF5112X_MIXGAIN_OVR},
00358         {7, AR5K_RF_MIXGAIN_STEP,       AR5K_RF5112X_MIXGAIN_STEP},
00359         {7, AR5K_RF_PD_DELAY_A,         AR5K_RF5112X_PD_DELAY_A},
00360         {7, AR5K_RF_PD_DELAY_B,         AR5K_RF5112X_PD_DELAY_B},
00361         {7, AR5K_RF_PD_DELAY_XR,        AR5K_RF5112X_PD_DELAY_XR},
00362         {7, AR5K_RF_PD_PERIOD_A,        AR5K_RF5112X_PD_PERIOD_A},
00363         {7, AR5K_RF_PD_PERIOD_B,        AR5K_RF5112X_PD_PERIOD_B},
00364         {7, AR5K_RF_PD_PERIOD_XR,       AR5K_RF5112X_PD_PERIOD_XR},
00365 };
00366 
00367 /* Default mode specific settings */
00368 static const struct ath5k_ini_rfbuffer rfb_5112[] = {
00369         { 1, 0x98d4,
00370         /*     mode a/XR  mode aTurbo    mode b     mode g    mode gTurbo */
00371             { 0x00000020, 0x00000020, 0x00000020, 0x00000020, 0x00000020 } },
00372         { 2, 0x98d0,
00373             { 0x03060408, 0x03070408, 0x03060408, 0x03060408, 0x03070408 } },
00374         { 3, 0x98dc,
00375             { 0x00a0c0c0, 0x00a0c0c0, 0x00e0c0c0, 0x00e0c0c0, 0x00e0c0c0 } },
00376         { 6, 0x989c,
00377             { 0x00a00000, 0x00a00000, 0x00a00000, 0x00a00000, 0x00a00000 } },
00378         { 6, 0x989c,
00379             { 0x000a0000, 0x000a0000, 0x000a0000, 0x000a0000, 0x000a0000 } },
00380         { 6, 0x989c,
00381             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00382         { 6, 0x989c,
00383             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00384         { 6, 0x989c,
00385             { 0x00660000, 0x00660000, 0x00660000, 0x00660000, 0x00660000 } },
00386         { 6, 0x989c,
00387             { 0x00db0000, 0x00db0000, 0x00db0000, 0x00db0000, 0x00db0000 } },
00388         { 6, 0x989c,
00389             { 0x00f10000, 0x00f10000, 0x00f10000, 0x00f10000, 0x00f10000 } },
00390         { 6, 0x989c,
00391             { 0x00120000, 0x00120000, 0x00120000, 0x00120000, 0x00120000 } },
00392         { 6, 0x989c,
00393             { 0x00120000, 0x00120000, 0x00120000, 0x00120000, 0x00120000 } },
00394         { 6, 0x989c,
00395             { 0x00730000, 0x00730000, 0x00730000, 0x00730000, 0x00730000 } },
00396         { 6, 0x989c,
00397             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00398         { 6, 0x989c,
00399             { 0x000c0000, 0x000c0000, 0x000c0000, 0x000c0000, 0x000c0000 } },
00400         { 6, 0x989c,
00401             { 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000 } },
00402         { 6, 0x989c,
00403             { 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000 } },
00404         { 6, 0x989c,
00405             { 0x008b0000, 0x008b0000, 0x008b0000, 0x008b0000, 0x008b0000 } },
00406         { 6, 0x989c,
00407             { 0x00600000, 0x00600000, 0x00600000, 0x00600000, 0x00600000 } },
00408         { 6, 0x989c,
00409             { 0x000c0000, 0x000c0000, 0x000c0000, 0x000c0000, 0x000c0000 } },
00410         { 6, 0x989c,
00411             { 0x00840000, 0x00840000, 0x00840000, 0x00840000, 0x00840000 } },
00412         { 6, 0x989c,
00413             { 0x00640000, 0x00640000, 0x00640000, 0x00640000, 0x00640000 } },
00414         { 6, 0x989c,
00415             { 0x00200000, 0x00200000, 0x00200000, 0x00200000, 0x00200000 } },
00416         { 6, 0x989c,
00417             { 0x00240000, 0x00240000, 0x00240000, 0x00240000, 0x00240000 } },
00418         { 6, 0x989c,
00419             { 0x00250000, 0x00250000, 0x00250000, 0x00250000, 0x00250000 } },
00420         { 6, 0x989c,
00421             { 0x00110000, 0x00110000, 0x00110000, 0x00110000, 0x00110000 } },
00422         { 6, 0x989c,
00423             { 0x00110000, 0x00110000, 0x00110000, 0x00110000, 0x00110000 } },
00424         { 6, 0x989c,
00425             { 0x00510000, 0x00510000, 0x00510000, 0x00510000, 0x00510000 } },
00426         { 6, 0x989c,
00427             { 0x1c040000, 0x1c040000, 0x1c040000, 0x1c040000, 0x1c040000 } },
00428         { 6, 0x989c,
00429             { 0x000a0000, 0x000a0000, 0x000a0000, 0x000a0000, 0x000a0000 } },
00430         { 6, 0x989c,
00431             { 0x00a10000, 0x00a10000, 0x00a10000, 0x00a10000, 0x00a10000 } },
00432         { 6, 0x989c,
00433             { 0x00400000, 0x00400000, 0x00400000, 0x00400000, 0x00400000 } },
00434         { 6, 0x989c,
00435             { 0x03090000, 0x03090000, 0x03090000, 0x03090000, 0x03090000 } },
00436         { 6, 0x989c,
00437             { 0x06000000, 0x06000000, 0x06000000, 0x06000000, 0x06000000 } },
00438         { 6, 0x989c,
00439             { 0x000000b0, 0x000000b0, 0x000000a8, 0x000000a8, 0x000000a8 } },
00440         { 6, 0x989c,
00441             { 0x0000002e, 0x0000002e, 0x0000002e, 0x0000002e, 0x0000002e } },
00442         { 6, 0x989c,
00443             { 0x006c4a41, 0x006c4a41, 0x006c4af1, 0x006c4a61, 0x006c4a61 } },
00444         { 6, 0x989c,
00445             { 0x0050892a, 0x0050892a, 0x0050892b, 0x0050892b, 0x0050892b } },
00446         { 6, 0x989c,
00447             { 0x00842400, 0x00842400, 0x00842400, 0x00842400, 0x00842400 } },
00448         { 6, 0x989c,
00449             { 0x00c69200, 0x00c69200, 0x00c69200, 0x00c69200, 0x00c69200 } },
00450         { 6, 0x98d0,
00451             { 0x0002000c, 0x0002000c, 0x0002000c, 0x0002000c, 0x0002000c } },
00452         { 7, 0x989c,
00453             { 0x00000094, 0x00000094, 0x00000094, 0x00000094, 0x00000094 } },
00454         { 7, 0x989c,
00455             { 0x00000091, 0x00000091, 0x00000091, 0x00000091, 0x00000091 } },
00456         { 7, 0x989c,
00457             { 0x0000000a, 0x0000000a, 0x00000012, 0x00000012, 0x00000012 } },
00458         { 7, 0x989c,
00459             { 0x00000080, 0x00000080, 0x00000080, 0x00000080, 0x00000080 } },
00460         { 7, 0x989c,
00461             { 0x000000c1, 0x000000c1, 0x000000c1, 0x000000c1, 0x000000c1 } },
00462         { 7, 0x989c,
00463             { 0x00000060, 0x00000060, 0x00000060, 0x00000060, 0x00000060 } },
00464         { 7, 0x989c,
00465             { 0x000000f0, 0x000000f0, 0x000000f0, 0x000000f0, 0x000000f0 } },
00466         { 7, 0x989c,
00467             { 0x00000022, 0x00000022, 0x00000022, 0x00000022, 0x00000022 } },
00468         { 7, 0x989c,
00469             { 0x00000092, 0x00000092, 0x00000092, 0x00000092, 0x00000092 } },
00470         { 7, 0x989c,
00471             { 0x000000d4, 0x000000d4, 0x000000d4, 0x000000d4, 0x000000d4 } },
00472         { 7, 0x989c,
00473             { 0x000014cc, 0x000014cc, 0x000014cc, 0x000014cc, 0x000014cc } },
00474         { 7, 0x989c,
00475             { 0x0000048c, 0x0000048c, 0x0000048c, 0x0000048c, 0x0000048c } },
00476         { 7, 0x98c4,
00477             { 0x00000003, 0x00000003, 0x00000003, 0x00000003, 0x00000003 } },
00478 };
00479 
00480 /* RFX112A (Derby 2) */
00481 
00482 /* BANK 6                               len  pos col */
00483 #define AR5K_RF5112A_OB_2GHZ            { 3, 287, 0 }
00484 #define AR5K_RF5112A_DB_2GHZ            { 3, 290, 0 }
00485 
00486 #define AR5K_RF5112A_OB_5GHZ            { 3, 279, 0 }
00487 #define AR5K_RF5112A_DB_5GHZ            { 3, 282, 0 }
00488 
00489 #define AR5K_RF5112A_FIXED_BIAS_A       { 1, 278, 0 }
00490 #define AR5K_RF5112A_FIXED_BIAS_B       { 1, 277, 0 }
00491 
00492 #define AR5K_RF5112A_XPD_SEL            { 1, 302, 0 }
00493 #define AR5K_RF5112A_PDGAINLO           { 2, 270, 0 }
00494 #define AR5K_RF5112A_PDGAINHI           { 2, 257, 0 }
00495 
00496 /* Access to PWD registers */
00497 #define AR5K_RF5112A_PWD(_n)            { 1, (306 - _n), 3 }
00498 
00499 /* Voltage regulators */
00500 #define AR5K_RF5112A_HIGH_VC_CP         { 2, 90,  2 }
00501 #define AR5K_RF5112A_MID_VC_CP          { 2, 92,  2 }
00502 #define AR5K_RF5112A_LOW_VC_CP          { 2, 94,  2 }
00503 #define AR5K_RF5112A_PUSH_UP            { 1, 254,  2 }
00504 
00505 /* Power consumption */
00506 #define AR5K_RF5112A_PAD2GND            { 1, 281, 1 }
00507 #define AR5K_RF5112A_XB2_LVL            { 2, 1,   3 }
00508 #define AR5K_RF5112A_XB5_LVL            { 2, 3,   3 }
00509 
00510 static const struct ath5k_rf_reg rf_regs_5112a[] = {
00511         {6, AR5K_RF_OB_2GHZ,            AR5K_RF5112A_OB_2GHZ},
00512         {6, AR5K_RF_DB_2GHZ,            AR5K_RF5112A_DB_2GHZ},
00513         {6, AR5K_RF_OB_5GHZ,            AR5K_RF5112A_OB_5GHZ},
00514         {6, AR5K_RF_DB_5GHZ,            AR5K_RF5112A_DB_5GHZ},
00515         {6, AR5K_RF_FIXED_BIAS_A,       AR5K_RF5112A_FIXED_BIAS_A},
00516         {6, AR5K_RF_FIXED_BIAS_B,       AR5K_RF5112A_FIXED_BIAS_B},
00517         {6, AR5K_RF_XPD_SEL,            AR5K_RF5112A_XPD_SEL},
00518         {6, AR5K_RF_PD_GAIN_LO,         AR5K_RF5112A_PDGAINLO},
00519         {6, AR5K_RF_PD_GAIN_HI,         AR5K_RF5112A_PDGAINHI},
00520         {6, AR5K_RF_PWD_130,            AR5K_RF5112A_PWD(130)},
00521         {6, AR5K_RF_PWD_131,            AR5K_RF5112A_PWD(131)},
00522         {6, AR5K_RF_PWD_132,            AR5K_RF5112A_PWD(132)},
00523         {6, AR5K_RF_PWD_136,            AR5K_RF5112A_PWD(136)},
00524         {6, AR5K_RF_PWD_137,            AR5K_RF5112A_PWD(137)},
00525         {6, AR5K_RF_PWD_138,            AR5K_RF5112A_PWD(138)},
00526         {6, AR5K_RF_PWD_166,            AR5K_RF5112A_PWD(166)},
00527         {6, AR5K_RF_PWD_167,            AR5K_RF5112A_PWD(167)},
00528         {6, AR5K_RF_HIGH_VC_CP,         AR5K_RF5112A_HIGH_VC_CP},
00529         {6, AR5K_RF_MID_VC_CP,          AR5K_RF5112A_MID_VC_CP},
00530         {6, AR5K_RF_LOW_VC_CP,          AR5K_RF5112A_LOW_VC_CP},
00531         {6, AR5K_RF_PUSH_UP,            AR5K_RF5112A_PUSH_UP},
00532         {6, AR5K_RF_PAD2GND,            AR5K_RF5112A_PAD2GND},
00533         {6, AR5K_RF_XB2_LVL,            AR5K_RF5112A_XB2_LVL},
00534         {6, AR5K_RF_XB5_LVL,            AR5K_RF5112A_XB5_LVL},
00535         {7, AR5K_RF_GAIN_I,             AR5K_RF5112X_GAIN_I},
00536         {7, AR5K_RF_MIXVGA_OVR,         AR5K_RF5112X_MIXVGA_OVR},
00537         {7, AR5K_RF_MIXGAIN_OVR,        AR5K_RF5112X_MIXGAIN_OVR},
00538         {7, AR5K_RF_MIXGAIN_STEP,       AR5K_RF5112X_MIXGAIN_STEP},
00539         {7, AR5K_RF_PD_DELAY_A,         AR5K_RF5112X_PD_DELAY_A},
00540         {7, AR5K_RF_PD_DELAY_B,         AR5K_RF5112X_PD_DELAY_B},
00541         {7, AR5K_RF_PD_DELAY_XR,        AR5K_RF5112X_PD_DELAY_XR},
00542         {7, AR5K_RF_PD_PERIOD_A,        AR5K_RF5112X_PD_PERIOD_A},
00543         {7, AR5K_RF_PD_PERIOD_B,        AR5K_RF5112X_PD_PERIOD_B},
00544         {7, AR5K_RF_PD_PERIOD_XR,       AR5K_RF5112X_PD_PERIOD_XR},
00545 };
00546 
00547 /* Default mode specific settings */
00548 static const struct ath5k_ini_rfbuffer rfb_5112a[] = {
00549         { 1, 0x98d4,
00550         /*     mode a/XR  mode aTurbo    mode b     mode g    mode gTurbo */
00551             { 0x00000020, 0x00000020, 0x00000020, 0x00000020, 0x00000020 } },
00552         { 2, 0x98d0,
00553             { 0x03060408, 0x03070408, 0x03060408, 0x03060408, 0x03070408 } },
00554         { 3, 0x98dc,
00555             { 0x00a020c0, 0x00a020c0, 0x00e020c0, 0x00e020c0, 0x00e020c0 } },
00556         { 6, 0x989c,
00557             { 0x0f000000, 0x0f000000, 0x0f000000, 0x0f000000, 0x0f000000 } },
00558         { 6, 0x989c,
00559             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00560         { 6, 0x989c,
00561             { 0x00800000, 0x00800000, 0x00800000, 0x00800000, 0x00800000 } },
00562         { 6, 0x989c,
00563             { 0x002a0000, 0x002a0000, 0x002a0000, 0x002a0000, 0x002a0000 } },
00564         { 6, 0x989c,
00565             { 0x00010000, 0x00010000, 0x00010000, 0x00010000, 0x00010000 } },
00566         { 6, 0x989c,
00567             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00568         { 6, 0x989c,
00569             { 0x00180000, 0x00180000, 0x00180000, 0x00180000, 0x00180000 } },
00570         { 6, 0x989c,
00571             { 0x00600000, 0x00600000, 0x006e0000, 0x006e0000, 0x006e0000 } },
00572         { 6, 0x989c,
00573             { 0x00c70000, 0x00c70000, 0x00c70000, 0x00c70000, 0x00c70000 } },
00574         { 6, 0x989c,
00575             { 0x004b0000, 0x004b0000, 0x004b0000, 0x004b0000, 0x004b0000 } },
00576         { 6, 0x989c,
00577             { 0x04480000, 0x04480000, 0x04480000, 0x04480000, 0x04480000 } },
00578         { 6, 0x989c,
00579             { 0x004c0000, 0x004c0000, 0x004c0000, 0x004c0000, 0x004c0000 } },
00580         { 6, 0x989c,
00581             { 0x00e40000, 0x00e40000, 0x00e40000, 0x00e40000, 0x00e40000 } },
00582         { 6, 0x989c,
00583             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00584         { 6, 0x989c,
00585             { 0x00fc0000, 0x00fc0000, 0x00fc0000, 0x00fc0000, 0x00fc0000 } },
00586         { 6, 0x989c,
00587             { 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000 } },
00588         { 6, 0x989c,
00589             { 0x043f0000, 0x043f0000, 0x043f0000, 0x043f0000, 0x043f0000 } },
00590         { 6, 0x989c,
00591             { 0x000c0000, 0x000c0000, 0x000c0000, 0x000c0000, 0x000c0000 } },
00592         { 6, 0x989c,
00593             { 0x02190000, 0x02190000, 0x02190000, 0x02190000, 0x02190000 } },
00594         { 6, 0x989c,
00595             { 0x00240000, 0x00240000, 0x00240000, 0x00240000, 0x00240000 } },
00596         { 6, 0x989c,
00597             { 0x00b40000, 0x00b40000, 0x00b40000, 0x00b40000, 0x00b40000 } },
00598         { 6, 0x989c,
00599             { 0x00990000, 0x00990000, 0x00990000, 0x00990000, 0x00990000 } },
00600         { 6, 0x989c,
00601             { 0x00500000, 0x00500000, 0x00500000, 0x00500000, 0x00500000 } },
00602         { 6, 0x989c,
00603             { 0x002a0000, 0x002a0000, 0x002a0000, 0x002a0000, 0x002a0000 } },
00604         { 6, 0x989c,
00605             { 0x00120000, 0x00120000, 0x00120000, 0x00120000, 0x00120000 } },
00606         { 6, 0x989c,
00607             { 0xc0320000, 0xc0320000, 0xc0320000, 0xc0320000, 0xc0320000 } },
00608         { 6, 0x989c,
00609             { 0x01740000, 0x01740000, 0x01740000, 0x01740000, 0x01740000 } },
00610         { 6, 0x989c,
00611             { 0x00110000, 0x00110000, 0x00110000, 0x00110000, 0x00110000 } },
00612         { 6, 0x989c,
00613             { 0x86280000, 0x86280000, 0x86280000, 0x86280000, 0x86280000 } },
00614         { 6, 0x989c,
00615             { 0x31840000, 0x31840000, 0x31840000, 0x31840000, 0x31840000 } },
00616         { 6, 0x989c,
00617             { 0x00f20080, 0x00f20080, 0x00f20080, 0x00f20080, 0x00f20080 } },
00618         { 6, 0x989c,
00619             { 0x00270019, 0x00270019, 0x00270019, 0x00270019, 0x00270019 } },
00620         { 6, 0x989c,
00621             { 0x00000003, 0x00000003, 0x00000003, 0x00000003, 0x00000003 } },
00622         { 6, 0x989c,
00623             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00624         { 6, 0x989c,
00625             { 0x000000b2, 0x000000b2, 0x000000b2, 0x000000b2, 0x000000b2 } },
00626         { 6, 0x989c,
00627             { 0x00b02084, 0x00b02084, 0x00b02084, 0x00b02084, 0x00b02084 } },
00628         { 6, 0x989c,
00629             { 0x004125a4, 0x004125a4, 0x004125a4, 0x004125a4, 0x004125a4 } },
00630         { 6, 0x989c,
00631             { 0x00119220, 0x00119220, 0x00119220, 0x00119220, 0x00119220 } },
00632         { 6, 0x989c,
00633             { 0x001a4800, 0x001a4800, 0x001a4800, 0x001a4800, 0x001a4800 } },
00634         { 6, 0x98d8,
00635             { 0x000b0230, 0x000b0230, 0x000b0230, 0x000b0230, 0x000b0230 } },
00636         { 7, 0x989c,
00637             { 0x00000094, 0x00000094, 0x00000094, 0x00000094, 0x00000094 } },
00638         { 7, 0x989c,
00639             { 0x00000091, 0x00000091, 0x00000091, 0x00000091, 0x00000091 } },
00640         { 7, 0x989c,
00641             { 0x00000012, 0x00000012, 0x00000012, 0x00000012, 0x00000012 } },
00642         { 7, 0x989c,
00643             { 0x00000080, 0x00000080, 0x00000080, 0x00000080, 0x00000080 } },
00644         { 7, 0x989c,
00645             { 0x000000d9, 0x000000d9, 0x000000d9, 0x000000d9, 0x000000d9 } },
00646         { 7, 0x989c,
00647             { 0x00000060, 0x00000060, 0x00000060, 0x00000060, 0x00000060 } },
00648         { 7, 0x989c,
00649             { 0x000000f0, 0x000000f0, 0x000000f0, 0x000000f0, 0x000000f0 } },
00650         { 7, 0x989c,
00651             { 0x000000a2, 0x000000a2, 0x000000a2, 0x000000a2, 0x000000a2 } },
00652         { 7, 0x989c,
00653             { 0x00000052, 0x00000052, 0x00000052, 0x00000052, 0x00000052 } },
00654         { 7, 0x989c,
00655             { 0x000000d4, 0x000000d4, 0x000000d4, 0x000000d4, 0x000000d4 } },
00656         { 7, 0x989c,
00657             { 0x000014cc, 0x000014cc, 0x000014cc, 0x000014cc, 0x000014cc } },
00658         { 7, 0x989c,
00659             { 0x0000048c, 0x0000048c, 0x0000048c, 0x0000048c, 0x0000048c } },
00660         { 7, 0x98c4,
00661             { 0x00000003, 0x00000003, 0x00000003, 0x00000003, 0x00000003 } },
00662 };
00663 
00664 
00665 
00666 /******************\
00667 * RF2413 (Griffin) *
00668 \******************/
00669 
00670 /* BANK 6                               len  pos col */
00671 #define AR5K_RF2413_OB_2GHZ             { 3, 168, 0 }
00672 #define AR5K_RF2413_DB_2GHZ             { 3, 165, 0 }
00673 
00674 static const struct ath5k_rf_reg rf_regs_2413[] = {
00675         {6, AR5K_RF_OB_2GHZ,            AR5K_RF2413_OB_2GHZ},
00676         {6, AR5K_RF_DB_2GHZ,            AR5K_RF2413_DB_2GHZ},
00677 };
00678 
00679 /* Default mode specific settings
00680  * XXX: a/aTurbo ???
00681  */
00682 static const struct ath5k_ini_rfbuffer rfb_2413[] = {
00683         { 1, 0x98d4,
00684         /*     mode a/XR  mode aTurbo    mode b     mode g    mode gTurbo */
00685             { 0x00000020, 0x00000020, 0x00000020, 0x00000020, 0x00000020 } },
00686         { 2, 0x98d0,
00687             { 0x02001408, 0x02011408, 0x02001408, 0x02001408, 0x02011408 } },
00688         { 3, 0x98dc,
00689             { 0x00a020c0, 0x00a020c0, 0x00e020c0, 0x00e020c0, 0x00e020c0 } },
00690         { 6, 0x989c,
00691             { 0xf0000000, 0xf0000000, 0xf0000000, 0xf0000000, 0xf0000000 } },
00692         { 6, 0x989c,
00693             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00694         { 6, 0x989c,
00695             { 0x03000000, 0x03000000, 0x03000000, 0x03000000, 0x03000000 } },
00696         { 6, 0x989c,
00697             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00698         { 6, 0x989c,
00699             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00700         { 6, 0x989c,
00701             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00702         { 6, 0x989c,
00703             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00704         { 6, 0x989c,
00705             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00706         { 6, 0x989c,
00707             { 0x40400000, 0x40400000, 0x40400000, 0x40400000, 0x40400000 } },
00708         { 6, 0x989c,
00709             { 0x65050000, 0x65050000, 0x65050000, 0x65050000, 0x65050000 } },
00710         { 6, 0x989c,
00711             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00712         { 6, 0x989c,
00713             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00714         { 6, 0x989c,
00715             { 0x00420000, 0x00420000, 0x00420000, 0x00420000, 0x00420000 } },
00716         { 6, 0x989c,
00717             { 0x00b50000, 0x00b50000, 0x00b50000, 0x00b50000, 0x00b50000 } },
00718         { 6, 0x989c,
00719             { 0x00030000, 0x00030000, 0x00030000, 0x00030000, 0x00030000 } },
00720         { 6, 0x989c,
00721             { 0x00f70000, 0x00f70000, 0x00f70000, 0x00f70000, 0x00f70000 } },
00722         { 6, 0x989c,
00723             { 0x009d0000, 0x009d0000, 0x009d0000, 0x009d0000, 0x009d0000 } },
00724         { 6, 0x989c,
00725             { 0x00220000, 0x00220000, 0x00220000, 0x00220000, 0x00220000 } },
00726         { 6, 0x989c,
00727             { 0x04220000, 0x04220000, 0x04220000, 0x04220000, 0x04220000 } },
00728         { 6, 0x989c,
00729             { 0x00230018, 0x00230018, 0x00230018, 0x00230018, 0x00230018 } },
00730         { 6, 0x989c,
00731             { 0x00280000, 0x00280000, 0x00280060, 0x00280060, 0x00280060 } },
00732         { 6, 0x989c,
00733             { 0x005000c0, 0x005000c0, 0x005000c3, 0x005000c3, 0x005000c3 } },
00734         { 6, 0x989c,
00735             { 0x0004007f, 0x0004007f, 0x0004007f, 0x0004007f, 0x0004007f } },
00736         { 6, 0x989c,
00737             { 0x00000458, 0x00000458, 0x00000458, 0x00000458, 0x00000458 } },
00738         { 6, 0x989c,
00739             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00740         { 6, 0x989c,
00741             { 0x0000c000, 0x0000c000, 0x0000c000, 0x0000c000, 0x0000c000 } },
00742         { 6, 0x98d8,
00743             { 0x00400230, 0x00400230, 0x00400230, 0x00400230, 0x00400230 } },
00744         { 7, 0x989c,
00745             { 0x00006400, 0x00006400, 0x00006400, 0x00006400, 0x00006400 } },
00746         { 7, 0x989c,
00747             { 0x00000800, 0x00000800, 0x00000800, 0x00000800, 0x00000800 } },
00748         { 7, 0x98cc,
00749             { 0x0000000e, 0x0000000e, 0x0000000e, 0x0000000e, 0x0000000e } },
00750 };
00751 
00752 
00753 
00754 /***************************\
00755 * RF2315/RF2316 (Cobra SoC) *
00756 \***************************/
00757 
00758 /* BANK 6                               len  pos col */
00759 #define AR5K_RF2316_OB_2GHZ             { 3, 178, 0 }
00760 #define AR5K_RF2316_DB_2GHZ             { 3, 175, 0 }
00761 
00762 static const struct ath5k_rf_reg rf_regs_2316[] = {
00763         {6, AR5K_RF_OB_2GHZ,            AR5K_RF2316_OB_2GHZ},
00764         {6, AR5K_RF_DB_2GHZ,            AR5K_RF2316_DB_2GHZ},
00765 };
00766 
00767 /* Default mode specific settings */
00768 static const struct ath5k_ini_rfbuffer rfb_2316[] = {
00769         { 1, 0x98d4,
00770         /*     mode a/XR  mode aTurbo    mode b     mode g    mode gTurbo */
00771             { 0x00000020, 0x00000020, 0x00000020, 0x00000020, 0x00000020 } },
00772         { 2, 0x98d0,
00773             { 0x02001408, 0x02011408, 0x02001408, 0x02001408, 0x02011408 } },
00774         { 3, 0x98dc,
00775             { 0x00a020c0, 0x00a020c0, 0x00e020c0, 0x00e020c0, 0x00e020c0 } },
00776         { 6, 0x989c,
00777             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00778         { 6, 0x989c,
00779             { 0xc0000000, 0xc0000000, 0xc0000000, 0xc0000000, 0xc0000000 } },
00780         { 6, 0x989c,
00781             { 0x0f000000, 0x0f000000, 0x0f000000, 0x0f000000, 0x0f000000 } },
00782         { 6, 0x989c,
00783             { 0x02000000, 0x02000000, 0x02000000, 0x02000000, 0x02000000 } },
00784         { 6, 0x989c,
00785             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00786         { 6, 0x989c,
00787             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00788         { 6, 0x989c,
00789             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00790         { 6, 0x989c,
00791             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00792         { 6, 0x989c,
00793             { 0xf8000000, 0xf8000000, 0xf8000000, 0xf8000000, 0xf8000000 } },
00794         { 6, 0x989c,
00795             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00796         { 6, 0x989c,
00797             { 0x95150000, 0x95150000, 0x95150000, 0x95150000, 0x95150000 } },
00798         { 6, 0x989c,
00799             { 0xc1000000, 0xc1000000, 0xc1000000, 0xc1000000, 0xc1000000 } },
00800         { 6, 0x989c,
00801             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00802         { 6, 0x989c,
00803             { 0x00080000, 0x00080000, 0x00080000, 0x00080000, 0x00080000 } },
00804         { 6, 0x989c,
00805             { 0x00d50000, 0x00d50000, 0x00d50000, 0x00d50000, 0x00d50000 } },
00806         { 6, 0x989c,
00807             { 0x000e0000, 0x000e0000, 0x000e0000, 0x000e0000, 0x000e0000 } },
00808         { 6, 0x989c,
00809             { 0x00dc0000, 0x00dc0000, 0x00dc0000, 0x00dc0000, 0x00dc0000 } },
00810         { 6, 0x989c,
00811             { 0x00770000, 0x00770000, 0x00770000, 0x00770000, 0x00770000 } },
00812         { 6, 0x989c,
00813             { 0x008a0000, 0x008a0000, 0x008a0000, 0x008a0000, 0x008a0000 } },
00814         { 6, 0x989c,
00815             { 0x10880000, 0x10880000, 0x10880000, 0x10880000, 0x10880000 } },
00816         { 6, 0x989c,
00817             { 0x008c0060, 0x008c0060, 0x008c0060, 0x008c0060, 0x008c0060 } },
00818         { 6, 0x989c,
00819             { 0x00a00000, 0x00a00000, 0x00a00080, 0x00a00080, 0x00a00080 } },
00820         { 6, 0x989c,
00821             { 0x00400000, 0x00400000, 0x0040000d, 0x0040000d, 0x0040000d } },
00822         { 6, 0x989c,
00823             { 0x00110400, 0x00110400, 0x00110400, 0x00110400, 0x00110400 } },
00824         { 6, 0x989c,
00825             { 0x00000060, 0x00000060, 0x00000060, 0x00000060, 0x00000060 } },
00826         { 6, 0x989c,
00827             { 0x00000001, 0x00000001, 0x00000001, 0x00000001, 0x00000001 } },
00828         { 6, 0x989c,
00829             { 0x00000b00, 0x00000b00, 0x00000b00, 0x00000b00, 0x00000b00 } },
00830         { 6, 0x989c,
00831             { 0x00000be8, 0x00000be8, 0x00000be8, 0x00000be8, 0x00000be8 } },
00832         { 6, 0x98c0,
00833             { 0x00010000, 0x00010000, 0x00010000, 0x00010000, 0x00010000 } },
00834         { 7, 0x989c,
00835             { 0x00006400, 0x00006400, 0x00006400, 0x00006400, 0x00006400 } },
00836         { 7, 0x989c,
00837             { 0x00000800, 0x00000800, 0x00000800, 0x00000800, 0x00000800 } },
00838         { 7, 0x98cc,
00839             { 0x0000000e, 0x0000000e, 0x0000000e, 0x0000000e, 0x0000000e } },
00840 };
00841 
00842 
00843 
00844 /******************************\
00845 * RF5413/RF5424 (Eagle/Condor) *
00846 \******************************/
00847 
00848 /* BANK 6                               len  pos col */
00849 #define AR5K_RF5413_OB_2GHZ             { 3, 241, 0 }
00850 #define AR5K_RF5413_DB_2GHZ             { 3, 238, 0 }
00851 
00852 #define AR5K_RF5413_OB_5GHZ             { 3, 247, 0 }
00853 #define AR5K_RF5413_DB_5GHZ             { 3, 244, 0 }
00854 
00855 #define AR5K_RF5413_PWD_ICLOBUF2G       { 3, 131, 3 }
00856 #define AR5K_RF5413_DERBY_CHAN_SEL_MODE { 1, 291, 2 }
00857 
00858 static const struct ath5k_rf_reg rf_regs_5413[] = {
00859         {6, AR5K_RF_OB_2GHZ,             AR5K_RF5413_OB_2GHZ},
00860         {6, AR5K_RF_DB_2GHZ,             AR5K_RF5413_DB_2GHZ},
00861         {6, AR5K_RF_OB_5GHZ,             AR5K_RF5413_OB_5GHZ},
00862         {6, AR5K_RF_DB_5GHZ,             AR5K_RF5413_DB_5GHZ},
00863         {6, AR5K_RF_PWD_ICLOBUF_2G,      AR5K_RF5413_PWD_ICLOBUF2G},
00864         {6, AR5K_RF_DERBY_CHAN_SEL_MODE, AR5K_RF5413_DERBY_CHAN_SEL_MODE},
00865 };
00866 
00867 /* Default mode specific settings */
00868 static const struct ath5k_ini_rfbuffer rfb_5413[] = {
00869         { 1, 0x98d4,
00870         /*     mode a/XR  mode aTurbo    mode b     mode g    mode gTurbo */
00871             { 0x00000020, 0x00000020, 0x00000020, 0x00000020, 0x00000020 } },
00872         { 2, 0x98d0,
00873             { 0x00000008, 0x00000008, 0x00000008, 0x00000008, 0x00000008 } },
00874         { 3, 0x98dc,
00875             { 0x00a000c0, 0x00a000c0, 0x00e000c0, 0x00e000c0, 0x00e000c0 } },
00876         { 6, 0x989c,
00877             { 0x33000000, 0x33000000, 0x33000000, 0x33000000, 0x33000000 } },
00878         { 6, 0x989c,
00879             { 0x01000000, 0x01000000, 0x01000000, 0x01000000, 0x01000000 } },
00880         { 6, 0x989c,
00881             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00882         { 6, 0x989c,
00883             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00884         { 6, 0x989c,
00885             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00886         { 6, 0x989c,
00887             { 0x1f000000, 0x1f000000, 0x1f000000, 0x1f000000, 0x1f000000 } },
00888         { 6, 0x989c,
00889             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00890         { 6, 0x989c,
00891             { 0x00b80000, 0x00b80000, 0x00b80000, 0x00b80000, 0x00b80000 } },
00892         { 6, 0x989c,
00893             { 0x00b70000, 0x00b70000, 0x00b70000, 0x00b70000, 0x00b70000 } },
00894         { 6, 0x989c,
00895             { 0x00840000, 0x00840000, 0x00840000, 0x00840000, 0x00840000 } },
00896         { 6, 0x989c,
00897             { 0x00980000, 0x00980000, 0x00980000, 0x00980000, 0x00980000 } },
00898         { 6, 0x989c,
00899             { 0x00c00000, 0x00c00000, 0x00c00000, 0x00c00000, 0x00c00000 } },
00900         { 6, 0x989c,
00901             { 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000 } },
00902         { 6, 0x989c,
00903             { 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000 } },
00904         { 6, 0x989c,
00905             { 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000 } },
00906         { 6, 0x989c,
00907             { 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000 } },
00908         { 6, 0x989c,
00909             { 0x00d70000, 0x00d70000, 0x00d70000, 0x00d70000, 0x00d70000 } },
00910         { 6, 0x989c,
00911             { 0x00610000, 0x00610000, 0x00610000, 0x00610000, 0x00610000 } },
00912         { 6, 0x989c,
00913             { 0x00fe0000, 0x00fe0000, 0x00fe0000, 0x00fe0000, 0x00fe0000 } },
00914         { 6, 0x989c,
00915             { 0x00de0000, 0x00de0000, 0x00de0000, 0x00de0000, 0x00de0000 } },
00916         { 6, 0x989c,
00917             { 0x007f0000, 0x007f0000, 0x007f0000, 0x007f0000, 0x007f0000 } },
00918         { 6, 0x989c,
00919             { 0x043d0000, 0x043d0000, 0x043d0000, 0x043d0000, 0x043d0000 } },
00920         { 6, 0x989c,
00921             { 0x00770000, 0x00770000, 0x00770000, 0x00770000, 0x00770000 } },
00922         { 6, 0x989c,
00923             { 0x00440000, 0x00440000, 0x00440000, 0x00440000, 0x00440000 } },
00924         { 6, 0x989c,
00925             { 0x00980000, 0x00980000, 0x00980000, 0x00980000, 0x00980000 } },
00926         { 6, 0x989c,
00927             { 0x00100080, 0x00100080, 0x00100080, 0x00100080, 0x00100080 } },
00928         { 6, 0x989c,
00929             { 0x0005c034, 0x0005c034, 0x0005c034, 0x0005c034, 0x0005c034 } },
00930         { 6, 0x989c,
00931             { 0x003100f0, 0x003100f0, 0x003100f0, 0x003100f0, 0x003100f0 } },
00932         { 6, 0x989c,
00933             { 0x000c011f, 0x000c011f, 0x000c011f, 0x000c011f, 0x000c011f } },
00934         { 6, 0x989c,
00935             { 0x00510040, 0x00510040, 0x00510040, 0x00510040, 0x00510040 } },
00936         { 6, 0x989c,
00937             { 0x005000da, 0x005000da, 0x005000da, 0x005000da, 0x005000da } },
00938         { 6, 0x989c,
00939             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00940         { 6, 0x989c,
00941             { 0x00004044, 0x00004044, 0x00004044, 0x00004044, 0x00004044 } },
00942         { 6, 0x989c,
00943             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00944         { 6, 0x989c,
00945             { 0x000060c0, 0x000060c0, 0x000060c0, 0x000060c0, 0x000060c0 } },
00946         { 6, 0x989c,
00947             { 0x00002c00, 0x00002c00, 0x00003600, 0x00003600, 0x00002c00 } },
00948         { 6, 0x98c8,
00949             { 0x00000403, 0x00000403, 0x00040403, 0x00040403, 0x00040403 } },
00950         { 7, 0x989c,
00951             { 0x00006400, 0x00006400, 0x00006400, 0x00006400, 0x00006400 } },
00952         { 7, 0x989c,
00953             { 0x00000800, 0x00000800, 0x00000800, 0x00000800, 0x00000800 } },
00954         { 7, 0x98cc,
00955             { 0x0000000e, 0x0000000e, 0x0000000e, 0x0000000e, 0x0000000e } },
00956 };
00957 
00958 
00959 
00960 /***************************\
00961 * RF2425/RF2417 (Swan/Nala) *
00962 * AR2317 (Spider SoC)       *
00963 \***************************/
00964 
00965 /* BANK 6                               len  pos col */
00966 #define AR5K_RF2425_OB_2GHZ             { 3, 193, 0 }
00967 #define AR5K_RF2425_DB_2GHZ             { 3, 190, 0 }
00968 
00969 static const struct ath5k_rf_reg rf_regs_2425[] = {
00970         {6, AR5K_RF_OB_2GHZ,            AR5K_RF2425_OB_2GHZ},
00971         {6, AR5K_RF_DB_2GHZ,            AR5K_RF2425_DB_2GHZ},
00972 };
00973 
00974 /* Default mode specific settings
00975  * XXX: a/aTurbo ?
00976  */
00977 static const struct ath5k_ini_rfbuffer rfb_2425[] = {
00978         { 1, 0x98d4,
00979         /*     mode a/XR  mode aTurbo    mode b     mode g    mode gTurbo */
00980             { 0x00000020, 0x00000020, 0x00000020, 0x00000020, 0x00000020 } },
00981         { 2, 0x98d0,
00982             { 0x02001408, 0x02001408, 0x02001408, 0x02001408, 0x02001408 } },
00983         { 3, 0x98dc,
00984             { 0x00a020c0, 0x00a020c0, 0x00e020c0, 0x00e020c0, 0x00e020c0 } },
00985         { 6, 0x989c,
00986             { 0x10000000, 0x10000000, 0x10000000, 0x10000000, 0x10000000 } },
00987         { 6, 0x989c,
00988             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00989         { 6, 0x989c,
00990             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00991         { 6, 0x989c,
00992             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00993         { 6, 0x989c,
00994             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00995         { 6, 0x989c,
00996             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00997         { 6, 0x989c,
00998             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
00999         { 6, 0x989c,
01000             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
01001         { 6, 0x989c,
01002             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
01003         { 6, 0x989c,
01004             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
01005         { 6, 0x989c,
01006             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
01007         { 6, 0x989c,
01008             { 0x002a0000, 0x002a0000, 0x002a0000, 0x002a0000, 0x002a0000 } },
01009         { 6, 0x989c,
01010             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
01011         { 6, 0x989c,
01012             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
01013         { 6, 0x989c,
01014             { 0x00100000, 0x00100000, 0x00100000, 0x00100000, 0x00100000 } },
01015         { 6, 0x989c,
01016             { 0x00020000, 0x00020000, 0x00020000, 0x00020000, 0x00020000 } },
01017         { 6, 0x989c,
01018             { 0x00730000, 0x00730000, 0x00730000, 0x00730000, 0x00730000 } },
01019         { 6, 0x989c,
01020             { 0x00f80000, 0x00f80000, 0x00f80000, 0x00f80000, 0x00f80000 } },
01021         { 6, 0x989c,
01022             { 0x00e70000, 0x00e70000, 0x00e70000, 0x00e70000, 0x00e70000 } },
01023         { 6, 0x989c,
01024             { 0x00140000, 0x00140000, 0x00140000, 0x00140000, 0x00140000 } },
01025         { 6, 0x989c,
01026             { 0x00910040, 0x00910040, 0x00910040, 0x00910040, 0x00910040 } },
01027         { 6, 0x989c,
01028             { 0x0007001a, 0x0007001a, 0x0007001a, 0x0007001a, 0x0007001a } },
01029         { 6, 0x989c,
01030             { 0x00410000, 0x00410000, 0x00410000, 0x00410000, 0x00410000 } },
01031         { 6, 0x989c,
01032             { 0x00810000, 0x00810000, 0x00810060, 0x00810060, 0x00810060 } },
01033         { 6, 0x989c,
01034             { 0x00020800, 0x00020800, 0x00020803, 0x00020803, 0x00020803 } },
01035         { 6, 0x989c,
01036             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
01037         { 6, 0x989c,
01038             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
01039         { 6, 0x989c,
01040             { 0x00001660, 0x00001660, 0x00001660, 0x00001660, 0x00001660 } },
01041         { 6, 0x989c,
01042             { 0x00001688, 0x00001688, 0x00001688, 0x00001688, 0x00001688 } },
01043         { 6, 0x98c4,
01044             { 0x00000001, 0x00000001, 0x00000001, 0x00000001, 0x00000001 } },
01045         { 7, 0x989c,
01046             { 0x00006400, 0x00006400, 0x00006400, 0x00006400, 0x00006400 } },
01047         { 7, 0x989c,
01048             { 0x00000800, 0x00000800, 0x00000800, 0x00000800, 0x00000800 } },
01049         { 7, 0x98cc,
01050             { 0x0000000e, 0x0000000e, 0x0000000e, 0x0000000e, 0x0000000e } },
01051 };
01052 
01053 /*
01054  * TODO: Handle the few differences with swan during
01055  * bank modification and get rid of this
01056  */
01057 static const struct ath5k_ini_rfbuffer rfb_2317[] = {
01058         { 1, 0x98d4,
01059         /*     mode a/XR  mode aTurbo    mode b     mode g    mode gTurbo */
01060             { 0x00000020, 0x00000020, 0x00000020, 0x00000020, 0x00000020 } },
01061         { 2, 0x98d0,
01062             { 0x02001408, 0x02011408, 0x02001408, 0x02001408, 0x02011408 } },
01063         { 3, 0x98dc,
01064             { 0x00a020c0, 0x00a020c0, 0x00e020c0, 0x00e020c0, 0x00e020c0 } },
01065         { 6, 0x989c,
01066             { 0x10000000, 0x10000000, 0x10000000, 0x10000000, 0x10000000 } },
01067         { 6, 0x989c,
01068             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
01069         { 6, 0x989c,
01070             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
01071         { 6, 0x989c,
01072             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
01073         { 6, 0x989c,
01074             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
01075         { 6, 0x989c,
01076             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
01077         { 6, 0x989c,
01078             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
01079         { 6, 0x989c,
01080             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
01081         { 6, 0x989c,
01082             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
01083         { 6, 0x989c,
01084             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
01085         { 6, 0x989c,
01086             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
01087         { 6, 0x989c,
01088             { 0x002a0000, 0x002a0000, 0x002a0000, 0x002a0000, 0x002a0000 } },
01089         { 6, 0x989c,
01090             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
01091         { 6, 0x989c,
01092             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
01093         { 6, 0x989c,
01094             { 0x00100000, 0x00100000, 0x00100000, 0x00100000, 0x00100000 } },
01095         { 6, 0x989c,
01096             { 0x00020000, 0x00020000, 0x00020000, 0x00020000, 0x00020000 } },
01097         { 6, 0x989c,
01098             { 0x00730000, 0x00730000, 0x00730000, 0x00730000, 0x00730000 } },
01099         { 6, 0x989c,
01100             { 0x00f80000, 0x00f80000, 0x00f80000, 0x00f80000, 0x00f80000 } },
01101         { 6, 0x989c,
01102             { 0x00e70000, 0x00e70000, 0x00e70000, 0x00e70000, 0x00e70000 } },
01103         { 6, 0x989c,
01104             { 0x00140100, 0x00140100, 0x00140100, 0x00140100, 0x00140100 } },
01105         { 6, 0x989c,
01106             { 0x00910040, 0x00910040, 0x00910040, 0x00910040, 0x00910040 } },
01107         { 6, 0x989c,
01108             { 0x0007001a, 0x0007001a, 0x0007001a, 0x0007001a, 0x0007001a } },
01109         { 6, 0x989c,
01110             { 0x00410000, 0x00410000, 0x00410000, 0x00410000, 0x00410000 } },
01111         { 6, 0x989c,
01112             { 0x00810000, 0x00810000, 0x00810060, 0x00810060, 0x00810060 } },
01113         { 6, 0x989c,
01114             { 0x00020800, 0x00020800, 0x00020803, 0x00020803, 0x00020803 } },
01115         { 6, 0x989c,
01116             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
01117         { 6, 0x989c,
01118             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
01119         { 6, 0x989c,
01120             { 0x00001660, 0x00001660, 0x00001660, 0x00001660, 0x00001660 } },
01121         { 6, 0x989c,
01122             { 0x00009688, 0x00009688, 0x00009688, 0x00009688, 0x00009688 } },
01123         { 6, 0x98c4,
01124             { 0x00000001, 0x00000001, 0x00000001, 0x00000001, 0x00000001 } },
01125         { 7, 0x989c,
01126             { 0x00006400, 0x00006400, 0x00006400, 0x00006400, 0x00006400 } },
01127         { 7, 0x989c,
01128             { 0x00000800, 0x00000800, 0x00000800, 0x00000800, 0x00000800 } },
01129         { 7, 0x98cc,
01130             { 0x0000000e, 0x0000000e, 0x0000000e, 0x0000000e, 0x0000000e } },
01131 };
01132 
01133 /*
01134  * TODO: Handle the few differences with swan during
01135  * bank modification and get rid of this
01136  * XXX: a/aTurbo ?
01137  */
01138 static const struct ath5k_ini_rfbuffer rfb_2417[] = {
01139         { 1, 0x98d4,
01140         /*     mode a/XR  mode aTurbo    mode b     mode g    mode gTurbo */
01141             { 0x00000020, 0x00000020, 0x00000020, 0x00000020, 0x00000020 } },
01142         { 2, 0x98d0,
01143             { 0x02001408, 0x02001408, 0x02001408, 0x02001408, 0x02001408 } },
01144         { 3, 0x98dc,
01145             { 0x00a020c0, 0x00a020c0, 0x00e020c0, 0x00e020c0, 0x00e020c0 } },
01146         { 6, 0x989c,
01147             { 0x10000000, 0x10000000, 0x10000000, 0x10000000, 0x10000000 } },
01148         { 6, 0x989c,
01149             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
01150         { 6, 0x989c,
01151             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
01152         { 6, 0x989c,
01153             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
01154         { 6, 0x989c,
01155             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
01156         { 6, 0x989c,
01157             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
01158         { 6, 0x989c,
01159             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
01160         { 6, 0x989c,
01161             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
01162         { 6, 0x989c,
01163             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
01164         { 6, 0x989c,
01165             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
01166         { 6, 0x989c,
01167             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
01168         { 6, 0x989c,
01169             { 0x002a0000, 0x002a0000, 0x002a0000, 0x002a0000, 0x002a0000 } },
01170         { 6, 0x989c,
01171             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
01172         { 6, 0x989c,
01173             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
01174         { 6, 0x989c,
01175             { 0x00100000, 0x00100000, 0x00100000, 0x00100000, 0x00100000 } },
01176         { 6, 0x989c,
01177             { 0x00020000, 0x00020000, 0x00020000, 0x00020000, 0x00020000 } },
01178         { 6, 0x989c,
01179             { 0x00730000, 0x00730000, 0x00730000, 0x00730000, 0x00730000 } },
01180         { 6, 0x989c,
01181             { 0x00f80000, 0x00f80000, 0x00f80000, 0x00f80000, 0x00f80000 } },
01182         { 6, 0x989c,
01183             { 0x00e70000, 0x00e70000, 0x80e70000, 0x80e70000, 0x00e70000 } },
01184         { 6, 0x989c,
01185             { 0x00140000, 0x00140000, 0x00140000, 0x00140000, 0x00140000 } },
01186         { 6, 0x989c,
01187             { 0x00910040, 0x00910040, 0x00910040, 0x00910040, 0x00910040 } },
01188         { 6, 0x989c,
01189             { 0x0007001a, 0x0007001a, 0x0207001a, 0x0207001a, 0x0007001a } },
01190         { 6, 0x989c,
01191             { 0x00410000, 0x00410000, 0x00410000, 0x00410000, 0x00410000 } },
01192         { 6, 0x989c,
01193             { 0x00810000, 0x00810000, 0x00810060, 0x00810060, 0x00810060 } },
01194         { 6, 0x989c,
01195             { 0x00020800, 0x00020800, 0x00020803, 0x00020803, 0x00020803 } },
01196         { 6, 0x989c,
01197             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
01198         { 6, 0x989c,
01199             { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
01200         { 6, 0x989c,
01201             { 0x00001660, 0x00001660, 0x00001660, 0x00001660, 0x00001660 } },
01202         { 6, 0x989c,
01203             { 0x00001688, 0x00001688, 0x00001688, 0x00001688, 0x00001688 } },
01204         { 6, 0x98c4,
01205             { 0x00000001, 0x00000001, 0x00000001, 0x00000001, 0x00000001 } },
01206         { 7, 0x989c,
01207             { 0x00006400, 0x00006400, 0x00006400, 0x00006400, 0x00006400 } },
01208         { 7, 0x989c,
01209             { 0x00000800, 0x00000800, 0x00000800, 0x00000800, 0x00000800 } },
01210         { 7, 0x98cc,
01211             { 0x0000000e, 0x0000000e, 0x0000000e, 0x0000000e, 0x0000000e } },
01212 };

ros_rt_wmp
Author(s): Danilo Tardioli, dantard@unizar.es
autogenerated on Mon Oct 6 2014 08:27:11