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00002
00003
00004 #if !defined(CORE_NUM_INTERRUPT)
00005
00006
00007 #if defined(WIRING)
00008 #define CORE_NUM_INTERRUPT NUM_EXTERNAL_INTERRUPTS
00009 #if NUM_EXTERNAL_INTERRUPTS > 0
00010 #define CORE_INT0_PIN EI0
00011 #endif
00012 #if NUM_EXTERNAL_INTERRUPTS > 1
00013 #define CORE_INT1_PIN EI1
00014 #endif
00015 #if NUM_EXTERNAL_INTERRUPTS > 2
00016 #define CORE_INT2_PIN EI2
00017 #endif
00018 #if NUM_EXTERNAL_INTERRUPTS > 3
00019 #define CORE_INT3_PIN EI3
00020 #endif
00021 #if NUM_EXTERNAL_INTERRUPTS > 4
00022 #define CORE_INT4_PIN EI4
00023 #endif
00024 #if NUM_EXTERNAL_INTERRUPTS > 5
00025 #define CORE_INT5_PIN EI5
00026 #endif
00027 #if NUM_EXTERNAL_INTERRUPTS > 6
00028 #define CORE_INT6_PIN EI6
00029 #endif
00030 #if NUM_EXTERNAL_INTERRUPTS > 7
00031 #define CORE_INT7_PIN EI7
00032 #endif
00033
00034
00035 #elif defined(__AVR_ATmega328P__) || defined(__AVR_ATmega168__) || defined(__AVR_ATmega8__)
00036 #define CORE_NUM_INTERRUPT 2
00037 #define CORE_INT0_PIN 2
00038 #define CORE_INT1_PIN 3
00039
00040
00041 #elif defined(__AVR_ATmega1280__) || defined(__AVR_ATmega2560__)
00042 #define CORE_NUM_INTERRUPT 6
00043 #define CORE_INT0_PIN 2
00044 #define CORE_INT1_PIN 3
00045 #define CORE_INT2_PIN 21
00046 #define CORE_INT3_PIN 20
00047 #define CORE_INT4_PIN 19
00048 #define CORE_INT5_PIN 18
00049
00050
00051 #elif defined(__AVR_ATmega32U4__) && !defined(CORE_TEENSY)
00052 #define CORE_NUM_INTERRUPT 4
00053 #define CORE_INT0_PIN 3
00054 #define CORE_INT1_PIN 2
00055 #define CORE_INT2_PIN 0
00056 #define CORE_INT3_PIN 1
00057
00058
00059 #elif defined(__AVR_ATmega644P__) || defined(__AVR_ATmega644__)
00060 #define CORE_NUM_INTERRUPT 3
00061 #define CORE_INT0_PIN 10
00062 #define CORE_INT1_PIN 11
00063 #define CORE_INT2_PIN 2
00064
00065
00066 #elif defined(__PIC32MX__) && defined(_BOARD_UNO_)
00067 #define CORE_NUM_INTERRUPT 5
00068 #define CORE_INT0_PIN 38
00069 #define CORE_INT1_PIN 2
00070 #define CORE_INT2_PIN 7
00071 #define CORE_INT3_PIN 8
00072 #define CORE_INT4_PIN 35
00073
00074
00075 #elif defined(__PIC32MX__) && defined(_BOARD_MEGA_)
00076 #define CORE_NUM_INTERRUPT 5
00077 #define CORE_INT0_PIN 3
00078 #define CORE_INT1_PIN 2
00079 #define CORE_INT2_PIN 7
00080 #define CORE_INT3_PIN 21
00081 #define CORE_INT4_PIN 20
00082
00083
00084 #elif defined(__AVR_ATtiny45__) || defined(__AVR_ATtiny85__)
00085 #define CORE_NUM_INTERRUPT 1
00086 #define CORE_INT0_PIN 2
00087
00088
00089 #elif defined(__SAM3X8E__)
00090 #define CORE_NUM_INTERRUPT 54
00091 #define CORE_INT0_PIN 0
00092 #define CORE_INT1_PIN 1
00093 #define CORE_INT2_PIN 2
00094 #define CORE_INT3_PIN 3
00095 #define CORE_INT4_PIN 4
00096 #define CORE_INT5_PIN 5
00097 #define CORE_INT6_PIN 6
00098 #define CORE_INT7_PIN 7
00099 #define CORE_INT8_PIN 8
00100 #define CORE_INT9_PIN 9
00101 #define CORE_INT10_PIN 10
00102 #define CORE_INT11_PIN 11
00103 #define CORE_INT12_PIN 12
00104 #define CORE_INT13_PIN 13
00105 #define CORE_INT14_PIN 14
00106 #define CORE_INT15_PIN 15
00107 #define CORE_INT16_PIN 16
00108 #define CORE_INT17_PIN 17
00109 #define CORE_INT18_PIN 18
00110 #define CORE_INT19_PIN 19
00111 #define CORE_INT20_PIN 20
00112 #define CORE_INT21_PIN 21
00113 #define CORE_INT22_PIN 22
00114 #define CORE_INT23_PIN 23
00115 #define CORE_INT24_PIN 24
00116 #define CORE_INT25_PIN 25
00117 #define CORE_INT26_PIN 26
00118 #define CORE_INT27_PIN 27
00119 #define CORE_INT28_PIN 28
00120 #define CORE_INT29_PIN 29
00121 #define CORE_INT30_PIN 30
00122 #define CORE_INT31_PIN 31
00123 #define CORE_INT32_PIN 32
00124 #define CORE_INT33_PIN 33
00125 #define CORE_INT34_PIN 34
00126 #define CORE_INT35_PIN 35
00127 #define CORE_INT36_PIN 36
00128 #define CORE_INT37_PIN 37
00129 #define CORE_INT38_PIN 38
00130 #define CORE_INT39_PIN 39
00131 #define CORE_INT40_PIN 40
00132 #define CORE_INT41_PIN 41
00133 #define CORE_INT42_PIN 42
00134 #define CORE_INT43_PIN 43
00135 #define CORE_INT44_PIN 44
00136 #define CORE_INT45_PIN 45
00137 #define CORE_INT46_PIN 46
00138 #define CORE_INT47_PIN 47
00139 #define CORE_INT48_PIN 48
00140 #define CORE_INT49_PIN 49
00141 #define CORE_INT50_PIN 50
00142 #define CORE_INT51_PIN 51
00143 #define CORE_INT52_PIN 52
00144 #define CORE_INT53_PIN 53
00145
00146 #endif
00147 #endif
00148
00149 #if !defined(CORE_NUM_INTERRUPT)
00150 #error "Interrupts are unknown for this board, please add to this code"
00151 #endif
00152 #if CORE_NUM_INTERRUPT <= 0
00153 #error "Encoder requires interrupt pins, but this board does not have any :("
00154 #error "You could try defining ENCODER_DO_NOT_USE_INTERRUPTS as a kludge."
00155 #endif
00156