stm32f7xx_hal_dma_ex.c
Go to the documentation of this file.
1 
39 /* Includes ------------------------------------------------------------------*/
40 #include "stm32f7xx_hal.h"
41 
51 #ifdef HAL_DMA_MODULE_ENABLED
52 
53 /* Private types -------------------------------------------------------------*/
54 /* Private variables ---------------------------------------------------------*/
55 /* Private Constants ---------------------------------------------------------*/
56 /* Private macros ------------------------------------------------------------*/
57 /* Private functions ---------------------------------------------------------*/
62 static void DMA_MultiBufferSetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
63 
68 /* Exported functions ---------------------------------------------------------*/
69 
103 HAL_StatusTypeDef HAL_DMAEx_MultiBufferStart(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t SecondMemAddress, uint32_t DataLength)
104 {
105  HAL_StatusTypeDef status = HAL_OK;
106 
107  /* Check the parameters */
108  assert_param(IS_DMA_BUFFER_SIZE(DataLength));
109 
110  /* Memory-to-memory transfer not supported in double buffering mode */
111  if (hdma->Init.Direction == DMA_MEMORY_TO_MEMORY)
112  {
114  status = HAL_ERROR;
115  }
116  else
117  {
118  /* Process Locked */
119  __HAL_LOCK(hdma);
120 
121  if(HAL_DMA_STATE_READY == hdma->State)
122  {
123  /* Change DMA peripheral state */
124  hdma->State = HAL_DMA_STATE_BUSY;
125 
126  /* Enable the double buffer mode */
127  hdma->Instance->CR |= (uint32_t)DMA_SxCR_DBM;
128 
129  /* Configure DMA Stream destination address */
130  hdma->Instance->M1AR = SecondMemAddress;
131 
132  /* Configure the source, destination address and the data length */
133  DMA_MultiBufferSetConfig(hdma, SrcAddress, DstAddress, DataLength);
134 
135  /* Enable the peripheral */
136  __HAL_DMA_ENABLE(hdma);
137  }
138  else
139  {
140  /* Return error status */
141  status = HAL_BUSY;
142  }
143  }
144  return status;
145 }
146 
157 HAL_StatusTypeDef HAL_DMAEx_MultiBufferStart_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t SecondMemAddress, uint32_t DataLength)
158 {
159  HAL_StatusTypeDef status = HAL_OK;
160 
161  /* Check the parameters */
162  assert_param(IS_DMA_BUFFER_SIZE(DataLength));
163 
164  /* Memory-to-memory transfer not supported in double buffering mode */
165  if (hdma->Init.Direction == DMA_MEMORY_TO_MEMORY)
166  {
168  return HAL_ERROR;
169  }
170 
171  /* Process locked */
172  __HAL_LOCK(hdma);
173 
174  if(HAL_DMA_STATE_READY == hdma->State)
175  {
176  /* Change DMA peripheral state */
177  hdma->State = HAL_DMA_STATE_BUSY;
178 
179  /* Initialize the error code */
181 
182  /* Enable the Double buffer mode */
183  hdma->Instance->CR |= (uint32_t)DMA_SxCR_DBM;
184 
185  /* Configure DMA Stream destination address */
186  hdma->Instance->M1AR = SecondMemAddress;
187 
188  /* Configure the source, destination address and the data length */
189  DMA_MultiBufferSetConfig(hdma, SrcAddress, DstAddress, DataLength);
190 
191  /* Clear all flags */
197 
198  /* Enable Common interrupts*/
199  hdma->Instance->CR |= DMA_IT_TC | DMA_IT_TE | DMA_IT_DME;
200  hdma->Instance->FCR |= DMA_IT_FE;
201 
202  if((hdma->XferHalfCpltCallback != NULL) || (hdma->XferM1HalfCpltCallback != NULL))
203  {
204  hdma->Instance->CR |= DMA_IT_HT;
205  }
206 
207  /* Enable the peripheral */
208  __HAL_DMA_ENABLE(hdma);
209  }
210  else
211  {
212  /* Process unlocked */
213  __HAL_UNLOCK(hdma);
214 
215  /* Return error status */
216  status = HAL_BUSY;
217  }
218  return status;
219 }
220 
236 {
237  if(memory == MEMORY0)
238  {
239  /* change the memory0 address */
240  hdma->Instance->M0AR = Address;
241  }
242  else
243  {
244  /* change the memory1 address */
245  hdma->Instance->M1AR = Address;
246  }
247 
248  return HAL_OK;
249 }
250 
272 static void DMA_MultiBufferSetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
273 {
274  /* Configure DMA Stream data length */
275  hdma->Instance->NDTR = DataLength;
276 
277  /* Peripheral to Memory */
278  if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH)
279  {
280  /* Configure DMA Stream destination address */
281  hdma->Instance->PAR = DstAddress;
282 
283  /* Configure DMA Stream source address */
284  hdma->Instance->M0AR = SrcAddress;
285  }
286  /* Memory to Peripheral */
287  else
288  {
289  /* Configure DMA Stream source address */
290  hdma->Instance->PAR = SrcAddress;
291 
292  /* Configure DMA Stream destination address */
293  hdma->Instance->M0AR = DstAddress;
294  }
295 }
296 
301 #endif /* HAL_DMA_MODULE_ENABLED */
302 
310 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
assert_param
#define assert_param(expr)
Include module's header file.
Definition: stm32f407/stm32f407g-disc1/Inc/stm32f4xx_hal_conf.h:353
DMA_IT_HT
#define DMA_IT_HT
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:351
HAL_DMA_STATE_BUSY
@ HAL_DMA_STATE_BUSY
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:107
HAL_StatusTypeDef
HAL_StatusTypeDef
HAL Status structures definition
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:40
__DMA_HandleTypeDef::XferHalfCpltCallback
void(* XferHalfCpltCallback)(struct __DMA_HandleTypeDef *hdma)
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:153
__DMA_HandleTypeDef
DMA handle Structure definition.
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:139
NULL
#define NULL
Definition: porcupine/demo/c/dr_libs/tests/external/miniaudio/extras/speex_resampler/thirdparty/resample.c:92
__HAL_DMA_GET_TC_FLAG_INDEX
#define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__)
Return the current DMA Stream transfer complete flag.
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:434
__DMA_HandleTypeDef::ErrorCode
__IO uint32_t ErrorCode
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:163
DMA_MEMORY_TO_MEMORY
#define DMA_MEMORY_TO_MEMORY
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:230
DMA_IT_TC
#define DMA_IT_TC
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:350
__HAL_DMA_ENABLE
#define __HAL_DMA_ENABLE(__HANDLE__)
Enable the specified DMA Stream.
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:418
__HAL_DMA_CLEAR_FLAG
#define __HAL_DMA_CLEAR_FLAG(__HANDLE__, __FLAG__)
Clear the DMA Stream pending flags.
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:560
__DMA_HandleTypeDef::Init
DMA_InitTypeDef Init
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:143
__HAL_DMA_GET_TE_FLAG_INDEX
#define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__)
Return the current DMA Stream transfer error flag.
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:474
HAL_ERROR
@ HAL_ERROR
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:43
__DMA_HandleTypeDef::State
__IO HAL_DMA_StateTypeDef State
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:147
DMA_Stream_TypeDef::CR
__IO uint32_t CR
Definition: stm32f407xx.h:348
__HAL_DMA_GET_FE_FLAG_INDEX
#define __HAL_DMA_GET_FE_FLAG_INDEX(__HANDLE__)
Return the current DMA Stream FIFO error flag.
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:494
DMA_Stream_TypeDef::M1AR
__IO uint32_t M1AR
Definition: stm32f407xx.h:352
HAL_OK
@ HAL_OK
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:42
HAL_DMAEx_MultiBufferStart
HAL_StatusTypeDef HAL_DMAEx_MultiBufferStart(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t SecondMemAddress, uint32_t DataLength)
DMA_IT_DME
#define DMA_IT_DME
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:353
__HAL_LOCK
#define __HAL_LOCK(__HANDLE__)
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:93
__DMA_HandleTypeDef::Instance
DMA_Stream_TypeDef * Instance
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:141
HAL_BUSY
@ HAL_BUSY
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:44
HAL_DMAEx_ChangeMemory
HAL_StatusTypeDef HAL_DMAEx_ChangeMemory(DMA_HandleTypeDef *hdma, uint32_t Address, HAL_DMA_MemoryTypeDef memory)
DMA_Stream_TypeDef::FCR
__IO uint32_t FCR
Definition: stm32f407xx.h:353
DMA_IT_FE
#define DMA_IT_FE
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:354
HAL_DMA_MemoryTypeDef
HAL_DMA_MemoryTypeDef
HAL DMA Memory definition
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:48
DMA_SxCR_DBM
#define DMA_SxCR_DBM
Definition: stm32f407xx.h:5825
DMA_Stream_TypeDef::PAR
__IO uint32_t PAR
Definition: stm32f407xx.h:350
IS_DMA_BUFFER_SIZE
#define IS_DMA_BUFFER_SIZE(SIZE)
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:735
__HAL_UNLOCK
#define __HAL_UNLOCK(__HANDLE__)
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:105
__HAL_DMA_GET_HT_FLAG_INDEX
#define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__)
Return the current DMA Stream half transfer complete flag.
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:454
HAL_DMAEx_MultiBufferStart_IT
HAL_StatusTypeDef HAL_DMAEx_MultiBufferStart_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t SecondMemAddress, uint32_t DataLength)
HAL_DMA_ERROR_NOT_SUPPORTED
#define HAL_DMA_ERROR_NOT_SUPPORTED
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:193
DMA_Stream_TypeDef::NDTR
__IO uint32_t NDTR
Definition: stm32f407xx.h:349
DMA_MEMORY_TO_PERIPH
#define DMA_MEMORY_TO_PERIPH
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:229
__HAL_DMA_GET_DME_FLAG_INDEX
#define __HAL_DMA_GET_DME_FLAG_INDEX(__HANDLE__)
Return the current DMA Stream direct mode error flag.
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:514
DMA_InitTypeDef::Direction
uint32_t Direction
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:54
__DMA_HandleTypeDef::XferM1HalfCpltCallback
void(* XferM1HalfCpltCallback)(struct __DMA_HandleTypeDef *hdma)
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:157
DMA_Stream_TypeDef::M0AR
__IO uint32_t M0AR
Definition: stm32f407xx.h:351
MEMORY0
@ MEMORY0
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:50
HAL_DMA_ERROR_NONE
#define HAL_DMA_ERROR_NONE
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:186
DMA_IT_TE
#define DMA_IT_TE
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:352
stm32f7xx_hal.h
This file contains all the functions prototypes for the HAL module driver.
HAL_DMA_STATE_READY
@ HAL_DMA_STATE_READY
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:106


picovoice_driver
Author(s):
autogenerated on Fri Apr 1 2022 02:14:53