stm32f7xx_hal_cortex.h
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1 
20 /* Define to prevent recursive inclusion -------------------------------------*/
21 #ifndef __STM32F7xx_HAL_CORTEX_H
22 #define __STM32F7xx_HAL_CORTEX_H
23 
24 #ifdef __cplusplus
25  extern "C" {
26 #endif
27 
28 /* Includes ------------------------------------------------------------------*/
29 #include "stm32f7xx_hal_def.h"
30 
38 /* Exported types ------------------------------------------------------------*/
43 #if (__MPU_PRESENT == 1)
44 
48 typedef struct
49 {
50  uint8_t Enable;
52  uint8_t Number;
54  uint32_t BaseAddress;
55  uint8_t Size;
57  uint8_t SubRegionDisable;
59  uint8_t TypeExtField;
61  uint8_t AccessPermission;
63  uint8_t DisableExec;
65  uint8_t IsShareable;
67  uint8_t IsCacheable;
69  uint8_t IsBufferable;
71 }MPU_Region_InitTypeDef;
75 #endif /* __MPU_PRESENT */
76 
81 /* Exported constants --------------------------------------------------------*/
82 
90 #define NVIC_PRIORITYGROUP_0 ((uint32_t)0x00000007U)
92 #define NVIC_PRIORITYGROUP_1 ((uint32_t)0x00000006U)
94 #define NVIC_PRIORITYGROUP_2 ((uint32_t)0x00000005U)
96 #define NVIC_PRIORITYGROUP_3 ((uint32_t)0x00000004U)
98 #define NVIC_PRIORITYGROUP_4 ((uint32_t)0x00000003U)
107 #define SYSTICK_CLKSOURCE_HCLK_DIV8 ((uint32_t)0x00000000U)
108 #define SYSTICK_CLKSOURCE_HCLK ((uint32_t)0x00000004U)
109 
114 #if (__MPU_PRESENT == 1)
115 
118 #define MPU_HFNMI_PRIVDEF_NONE ((uint32_t)0x00000000U)
119 #define MPU_HARDFAULT_NMI ((uint32_t)0x00000002U)
120 #define MPU_PRIVILEGED_DEFAULT ((uint32_t)0x00000004U)
121 #define MPU_HFNMI_PRIVDEF ((uint32_t)0x00000006U)
122 
129 #define MPU_REGION_ENABLE ((uint8_t)0x01U)
130 #define MPU_REGION_DISABLE ((uint8_t)0x00U)
131 
138 #define MPU_INSTRUCTION_ACCESS_ENABLE ((uint8_t)0x00U)
139 #define MPU_INSTRUCTION_ACCESS_DISABLE ((uint8_t)0x01U)
140 
147 #define MPU_ACCESS_SHAREABLE ((uint8_t)0x01U)
148 #define MPU_ACCESS_NOT_SHAREABLE ((uint8_t)0x00U)
149 
156 #define MPU_ACCESS_CACHEABLE ((uint8_t)0x01U)
157 #define MPU_ACCESS_NOT_CACHEABLE ((uint8_t)0x00U)
158 
165 #define MPU_ACCESS_BUFFERABLE ((uint8_t)0x01U)
166 #define MPU_ACCESS_NOT_BUFFERABLE ((uint8_t)0x00U)
167 
174 #define MPU_TEX_LEVEL0 ((uint8_t)0x00U)
175 #define MPU_TEX_LEVEL1 ((uint8_t)0x01U)
176 #define MPU_TEX_LEVEL2 ((uint8_t)0x02U)
177 
184 #define MPU_REGION_SIZE_32B ((uint8_t)0x04U)
185 #define MPU_REGION_SIZE_64B ((uint8_t)0x05U)
186 #define MPU_REGION_SIZE_128B ((uint8_t)0x06U)
187 #define MPU_REGION_SIZE_256B ((uint8_t)0x07U)
188 #define MPU_REGION_SIZE_512B ((uint8_t)0x08U)
189 #define MPU_REGION_SIZE_1KB ((uint8_t)0x09U)
190 #define MPU_REGION_SIZE_2KB ((uint8_t)0x0AU)
191 #define MPU_REGION_SIZE_4KB ((uint8_t)0x0BU)
192 #define MPU_REGION_SIZE_8KB ((uint8_t)0x0CU)
193 #define MPU_REGION_SIZE_16KB ((uint8_t)0x0DU)
194 #define MPU_REGION_SIZE_32KB ((uint8_t)0x0EU)
195 #define MPU_REGION_SIZE_64KB ((uint8_t)0x0FU)
196 #define MPU_REGION_SIZE_128KB ((uint8_t)0x10U)
197 #define MPU_REGION_SIZE_256KB ((uint8_t)0x11U)
198 #define MPU_REGION_SIZE_512KB ((uint8_t)0x12U)
199 #define MPU_REGION_SIZE_1MB ((uint8_t)0x13U)
200 #define MPU_REGION_SIZE_2MB ((uint8_t)0x14U)
201 #define MPU_REGION_SIZE_4MB ((uint8_t)0x15U)
202 #define MPU_REGION_SIZE_8MB ((uint8_t)0x16U)
203 #define MPU_REGION_SIZE_16MB ((uint8_t)0x17U)
204 #define MPU_REGION_SIZE_32MB ((uint8_t)0x18U)
205 #define MPU_REGION_SIZE_64MB ((uint8_t)0x19U)
206 #define MPU_REGION_SIZE_128MB ((uint8_t)0x1AU)
207 #define MPU_REGION_SIZE_256MB ((uint8_t)0x1BU)
208 #define MPU_REGION_SIZE_512MB ((uint8_t)0x1CU)
209 #define MPU_REGION_SIZE_1GB ((uint8_t)0x1DU)
210 #define MPU_REGION_SIZE_2GB ((uint8_t)0x1EU)
211 #define MPU_REGION_SIZE_4GB ((uint8_t)0x1FU)
212 
219 #define MPU_REGION_NO_ACCESS ((uint8_t)0x00U)
220 #define MPU_REGION_PRIV_RW ((uint8_t)0x01U)
221 #define MPU_REGION_PRIV_RW_URO ((uint8_t)0x02U)
222 #define MPU_REGION_FULL_ACCESS ((uint8_t)0x03U)
223 #define MPU_REGION_PRIV_RO ((uint8_t)0x05U)
224 #define MPU_REGION_PRIV_RO_URO ((uint8_t)0x06U)
225 
232 #define MPU_REGION_NUMBER0 ((uint8_t)0x00U)
233 #define MPU_REGION_NUMBER1 ((uint8_t)0x01U)
234 #define MPU_REGION_NUMBER2 ((uint8_t)0x02U)
235 #define MPU_REGION_NUMBER3 ((uint8_t)0x03U)
236 #define MPU_REGION_NUMBER4 ((uint8_t)0x04U)
237 #define MPU_REGION_NUMBER5 ((uint8_t)0x05U)
238 #define MPU_REGION_NUMBER6 ((uint8_t)0x06U)
239 #define MPU_REGION_NUMBER7 ((uint8_t)0x07U)
240 
243 #endif /* __MPU_PRESENT */
244 
250 /* Exported Macros -----------------------------------------------------------*/
251 
252 /* Exported functions --------------------------------------------------------*/
260 /* Initialization and de-initialization functions *****************************/
261 void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup);
262 void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority);
263 void HAL_NVIC_EnableIRQ(IRQn_Type IRQn);
264 void HAL_NVIC_DisableIRQ(IRQn_Type IRQn);
265 void HAL_NVIC_SystemReset(void);
266 uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb);
274 /* Peripheral Control functions ***********************************************/
275 #if (__MPU_PRESENT == 1)
276 void HAL_MPU_Enable(uint32_t MPU_Control);
277 void HAL_MPU_Disable(void);
278 void HAL_MPU_ConfigRegion(MPU_Region_InitTypeDef *MPU_Init);
279 #endif /* __MPU_PRESENT */
280 uint32_t HAL_NVIC_GetPriorityGrouping(void);
281 void HAL_NVIC_GetPriority(IRQn_Type IRQn, uint32_t PriorityGroup, uint32_t* pPreemptPriority, uint32_t* pSubPriority);
282 uint32_t HAL_NVIC_GetPendingIRQ(IRQn_Type IRQn);
283 void HAL_NVIC_SetPendingIRQ(IRQn_Type IRQn);
284 void HAL_NVIC_ClearPendingIRQ(IRQn_Type IRQn);
285 uint32_t HAL_NVIC_GetActive(IRQn_Type IRQn);
286 void HAL_SYSTICK_CLKSourceConfig(uint32_t CLKSource);
287 void HAL_SYSTICK_IRQHandler(void);
288 void HAL_SYSTICK_Callback(void);
297 /* Private types -------------------------------------------------------------*/
298 /* Private variables ---------------------------------------------------------*/
299 /* Private constants ---------------------------------------------------------*/
300 /* Private macros ------------------------------------------------------------*/
304 #define IS_NVIC_PRIORITY_GROUP(GROUP) (((GROUP) == NVIC_PRIORITYGROUP_0) || \
305  ((GROUP) == NVIC_PRIORITYGROUP_1) || \
306  ((GROUP) == NVIC_PRIORITYGROUP_2) || \
307  ((GROUP) == NVIC_PRIORITYGROUP_3) || \
308  ((GROUP) == NVIC_PRIORITYGROUP_4))
309 
310 #define IS_NVIC_PREEMPTION_PRIORITY(PRIORITY) ((PRIORITY) < 0x10U)
311 
312 #define IS_NVIC_SUB_PRIORITY(PRIORITY) ((PRIORITY) < 0x10U)
313 
314 #define IS_NVIC_DEVICE_IRQ(IRQ) ((IRQ) >= 0x00)
315 
316 #define IS_SYSTICK_CLK_SOURCE(SOURCE) (((SOURCE) == SYSTICK_CLKSOURCE_HCLK) || \
317  ((SOURCE) == SYSTICK_CLKSOURCE_HCLK_DIV8))
318 
319 #if (__MPU_PRESENT == 1)
320 #define IS_MPU_REGION_ENABLE(STATE) (((STATE) == MPU_REGION_ENABLE) || \
321  ((STATE) == MPU_REGION_DISABLE))
322 
323 #define IS_MPU_INSTRUCTION_ACCESS(STATE) (((STATE) == MPU_INSTRUCTION_ACCESS_ENABLE) || \
324  ((STATE) == MPU_INSTRUCTION_ACCESS_DISABLE))
325 
326 #define IS_MPU_ACCESS_SHAREABLE(STATE) (((STATE) == MPU_ACCESS_SHAREABLE) || \
327  ((STATE) == MPU_ACCESS_NOT_SHAREABLE))
328 
329 #define IS_MPU_ACCESS_CACHEABLE(STATE) (((STATE) == MPU_ACCESS_CACHEABLE) || \
330  ((STATE) == MPU_ACCESS_NOT_CACHEABLE))
331 
332 #define IS_MPU_ACCESS_BUFFERABLE(STATE) (((STATE) == MPU_ACCESS_BUFFERABLE) || \
333  ((STATE) == MPU_ACCESS_NOT_BUFFERABLE))
334 
335 #define IS_MPU_TEX_LEVEL(TYPE) (((TYPE) == MPU_TEX_LEVEL0) || \
336  ((TYPE) == MPU_TEX_LEVEL1) || \
337  ((TYPE) == MPU_TEX_LEVEL2))
338 
339 #define IS_MPU_REGION_PERMISSION_ATTRIBUTE(TYPE) (((TYPE) == MPU_REGION_NO_ACCESS) || \
340  ((TYPE) == MPU_REGION_PRIV_RW) || \
341  ((TYPE) == MPU_REGION_PRIV_RW_URO) || \
342  ((TYPE) == MPU_REGION_FULL_ACCESS) || \
343  ((TYPE) == MPU_REGION_PRIV_RO) || \
344  ((TYPE) == MPU_REGION_PRIV_RO_URO))
345 
346 #define IS_MPU_REGION_NUMBER(NUMBER) (((NUMBER) == MPU_REGION_NUMBER0) || \
347  ((NUMBER) == MPU_REGION_NUMBER1) || \
348  ((NUMBER) == MPU_REGION_NUMBER2) || \
349  ((NUMBER) == MPU_REGION_NUMBER3) || \
350  ((NUMBER) == MPU_REGION_NUMBER4) || \
351  ((NUMBER) == MPU_REGION_NUMBER5) || \
352  ((NUMBER) == MPU_REGION_NUMBER6) || \
353  ((NUMBER) == MPU_REGION_NUMBER7))
354 
355 #define IS_MPU_REGION_SIZE(SIZE) (((SIZE) == MPU_REGION_SIZE_32B) || \
356  ((SIZE) == MPU_REGION_SIZE_64B) || \
357  ((SIZE) == MPU_REGION_SIZE_128B) || \
358  ((SIZE) == MPU_REGION_SIZE_256B) || \
359  ((SIZE) == MPU_REGION_SIZE_512B) || \
360  ((SIZE) == MPU_REGION_SIZE_1KB) || \
361  ((SIZE) == MPU_REGION_SIZE_2KB) || \
362  ((SIZE) == MPU_REGION_SIZE_4KB) || \
363  ((SIZE) == MPU_REGION_SIZE_8KB) || \
364  ((SIZE) == MPU_REGION_SIZE_16KB) || \
365  ((SIZE) == MPU_REGION_SIZE_32KB) || \
366  ((SIZE) == MPU_REGION_SIZE_64KB) || \
367  ((SIZE) == MPU_REGION_SIZE_128KB) || \
368  ((SIZE) == MPU_REGION_SIZE_256KB) || \
369  ((SIZE) == MPU_REGION_SIZE_512KB) || \
370  ((SIZE) == MPU_REGION_SIZE_1MB) || \
371  ((SIZE) == MPU_REGION_SIZE_2MB) || \
372  ((SIZE) == MPU_REGION_SIZE_4MB) || \
373  ((SIZE) == MPU_REGION_SIZE_8MB) || \
374  ((SIZE) == MPU_REGION_SIZE_16MB) || \
375  ((SIZE) == MPU_REGION_SIZE_32MB) || \
376  ((SIZE) == MPU_REGION_SIZE_64MB) || \
377  ((SIZE) == MPU_REGION_SIZE_128MB) || \
378  ((SIZE) == MPU_REGION_SIZE_256MB) || \
379  ((SIZE) == MPU_REGION_SIZE_512MB) || \
380  ((SIZE) == MPU_REGION_SIZE_1GB) || \
381  ((SIZE) == MPU_REGION_SIZE_2GB) || \
382  ((SIZE) == MPU_REGION_SIZE_4GB))
383 
384 #define IS_MPU_SUB_REGION_DISABLE(SUBREGION) ((SUBREGION) < (uint16_t)0x00FFU)
385 #endif /* __MPU_PRESENT */
386 
399 #ifdef __cplusplus
400 }
401 #endif
402 
403 #endif /* __STM32F7xx_HAL_CORTEX_H */
404 
405 
406 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
HAL_NVIC_EnableIRQ
void HAL_NVIC_EnableIRQ(IRQn_Type IRQn)
IRQn
IRQn
Definition: MIMXRT1052.h:78
HAL_NVIC_SystemReset
void HAL_NVIC_SystemReset(void)
HAL_NVIC_DisableIRQ
void HAL_NVIC_DisableIRQ(IRQn_Type IRQn)
HAL_NVIC_GetActive
uint32_t HAL_NVIC_GetActive(IRQn_Type IRQn)
HAL_NVIC_SetPriorityGrouping
void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
HAL_SYSTICK_IRQHandler
void HAL_SYSTICK_IRQHandler(void)
HAL_SYSTICK_Config
uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
HAL_NVIC_ClearPendingIRQ
void HAL_NVIC_ClearPendingIRQ(IRQn_Type IRQn)
IRQn_Type
IRQn_Type
STM32F4XX Interrupt Number Definition, according to the selected device in Library_configuration_sect...
Definition: stm32f407xx.h:66
HAL_SYSTICK_CLKSourceConfig
void HAL_SYSTICK_CLKSourceConfig(uint32_t CLKSource)
HAL_NVIC_GetPendingIRQ
uint32_t HAL_NVIC_GetPendingIRQ(IRQn_Type IRQn)
HAL_NVIC_SetPendingIRQ
void HAL_NVIC_SetPendingIRQ(IRQn_Type IRQn)
HAL_NVIC_GetPriority
void HAL_NVIC_GetPriority(IRQn_Type IRQn, uint32_t PriorityGroup, uint32_t *pPreemptPriority, uint32_t *pSubPriority)
stm32f7xx_hal_def.h
This file contains HAL common defines, enumeration, macros and structures definitions.
HAL_NVIC_SetPriority
void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
HAL_NVIC_GetPriorityGrouping
uint32_t HAL_NVIC_GetPriorityGrouping(void)
HAL_SYSTICK_Callback
void HAL_SYSTICK_Callback(void)

picovoice_driver
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autogenerated on Fri Apr 1 2022 02:14:53