stm32f4xx_hal_sdram.h
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1 
20 /* Define to prevent recursive inclusion -------------------------------------*/
21 #ifndef __STM32F4xx_HAL_SDRAM_H
22 #define __STM32F4xx_HAL_SDRAM_H
23 
24 #ifdef __cplusplus
25  extern "C" {
26 #endif
27 
28 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
29  defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
30 
31 /* Includes ------------------------------------------------------------------*/
32 #include "stm32f4xx_ll_fmc.h"
33 
42 /* Exported typedef ----------------------------------------------------------*/
50 typedef enum
51 {
52  HAL_SDRAM_STATE_RESET = 0x00U,
53  HAL_SDRAM_STATE_READY = 0x01U,
54  HAL_SDRAM_STATE_BUSY = 0x02U,
55  HAL_SDRAM_STATE_ERROR = 0x03U,
60 
64 #if (USE_HAL_SDRAM_REGISTER_CALLBACKS == 1)
65 typedef struct __SDRAM_HandleTypeDef
66 #else
67 typedef struct
68 #endif /* USE_HAL_SDRAM_REGISTER_CALLBACKS */
69 {
70  FMC_SDRAM_TypeDef *Instance;
76  HAL_LockTypeDef Lock;
78  DMA_HandleTypeDef *hdma;
80 #if (USE_HAL_SDRAM_REGISTER_CALLBACKS == 1)
81  void (* MspInitCallback) ( struct __SDRAM_HandleTypeDef * hsdram);
82  void (* MspDeInitCallback) ( struct __SDRAM_HandleTypeDef * hsdram);
83  void (* RefreshErrorCallback) ( struct __SDRAM_HandleTypeDef * hsdram);
84  void (* DmaXferCpltCallback) ( DMA_HandleTypeDef * hdma);
85  void (* DmaXferErrorCallback) ( DMA_HandleTypeDef * hdma);
86 #endif
88 
89 #if (USE_HAL_SDRAM_REGISTER_CALLBACKS == 1)
90 
93 typedef enum
94 {
95  HAL_SDRAM_MSP_INIT_CB_ID = 0x00U,
96  HAL_SDRAM_MSP_DEINIT_CB_ID = 0x01U,
97  HAL_SDRAM_REFRESH_ERR_CB_ID = 0x02U,
98  HAL_SDRAM_DMA_XFER_CPLT_CB_ID = 0x03U,
99  HAL_SDRAM_DMA_XFER_ERR_CB_ID = 0x04U
100 }HAL_SDRAM_CallbackIDTypeDef;
101 
105 typedef void (*pSDRAM_CallbackTypeDef)(SDRAM_HandleTypeDef *hsdram);
106 typedef void (*pSDRAM_DmaCallbackTypeDef)(DMA_HandleTypeDef *hdma);
107 #endif
108 
112 /* Exported constants --------------------------------------------------------*/
113 /* Exported macro ------------------------------------------------------------*/
122 #if (USE_HAL_SDRAM_REGISTER_CALLBACKS == 1)
123 #define __HAL_SDRAM_RESET_HANDLE_STATE(__HANDLE__) do { \
124  (__HANDLE__)->State = HAL_SDRAM_STATE_RESET; \
125  (__HANDLE__)->MspInitCallback = NULL; \
126  (__HANDLE__)->MspDeInitCallback = NULL; \
127  } while(0)
128 #else
129 #define __HAL_SDRAM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SDRAM_STATE_RESET)
130 #endif
131 
135 /* Exported functions --------------------------------------------------------*/
144 /* Initialization/de-initialization functions *********************************/
149 
161 /* I/O operation functions ****************************************************/
162 HAL_StatusTypeDef HAL_SDRAM_Read_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint8_t *pDstBuffer, uint32_t BufferSize);
163 HAL_StatusTypeDef HAL_SDRAM_Write_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint8_t *pSrcBuffer, uint32_t BufferSize);
164 HAL_StatusTypeDef HAL_SDRAM_Read_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint16_t *pDstBuffer, uint32_t BufferSize);
165 HAL_StatusTypeDef HAL_SDRAM_Write_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint16_t *pSrcBuffer, uint32_t BufferSize);
166 HAL_StatusTypeDef HAL_SDRAM_Read_32b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize);
167 HAL_StatusTypeDef HAL_SDRAM_Write_32b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
168 
169 HAL_StatusTypeDef HAL_SDRAM_Read_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t * pAddress, uint32_t *pDstBuffer, uint32_t BufferSize);
170 HAL_StatusTypeDef HAL_SDRAM_Write_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
171 
172 #if (USE_HAL_SDRAM_REGISTER_CALLBACKS == 1)
173 /* SDRAM callback registering/unregistering */
174 HAL_StatusTypeDef HAL_SDRAM_RegisterCallback(SDRAM_HandleTypeDef *hsdram, HAL_SDRAM_CallbackIDTypeDef CallbackId, pSDRAM_CallbackTypeDef pCallback);
175 HAL_StatusTypeDef HAL_SDRAM_UnRegisterCallback(SDRAM_HandleTypeDef *hsdram, HAL_SDRAM_CallbackIDTypeDef CallbackId);
176 HAL_StatusTypeDef HAL_SDRAM_RegisterDmaCallback(SDRAM_HandleTypeDef *hsdram, HAL_SDRAM_CallbackIDTypeDef CallbackId, pSDRAM_DmaCallbackTypeDef pCallback);
177 #endif
178 
186 /* SDRAM Control functions *****************************************************/
191 HAL_StatusTypeDef HAL_SDRAM_SetAutoRefreshNumber(SDRAM_HandleTypeDef *hsdram, uint32_t AutoRefreshNumber);
200 /* SDRAM State functions ********************************************************/
214 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
215 
220 #ifdef __cplusplus
221 }
222 #endif
223 
224 #endif /* __STM32F4xx_HAL_SDRAM_H */
225 
226 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
HAL_SDRAM_DMA_XferCpltCallback
void HAL_SDRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma)
FMC_SDRAM_InitTypeDef
FMC SDRAM Configuration Structure definition
Definition: stm32f7xx_ll_fmc.h:563
FMC_SDRAM_TimingTypeDef
FMC SDRAM Timing parameters structure definition.
Definition: stm32f7xx_ll_fmc.h:601
__IO
#define __IO
Definition: imxrt1050/imxrt1050-evkb/CMSIS/core_cm7.h:237
Init
napi_value Init(napi_env env, napi_value exports)
Definition: porcupine/demo/c/pvrecorder/node/pv_recorder_napi.c:197
HAL_StatusTypeDef
HAL_StatusTypeDef
HAL Status structures definition
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:40
Timing
static FMC_SDRAM_TimingTypeDef Timing
Definition: stm32f769i_discovery_sdram.c:124
HAL_SDRAM_MspDeInit
void HAL_SDRAM_MspDeInit(SDRAM_HandleTypeDef *hsdram)
__DMA_HandleTypeDef
DMA handle Structure definition.
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:139
HAL_SDRAM_GetState
HAL_SDRAM_StateTypeDef HAL_SDRAM_GetState(SDRAM_HandleTypeDef *hsdram)
HAL_SDRAM_RefreshErrorCallback
void HAL_SDRAM_RefreshErrorCallback(SDRAM_HandleTypeDef *hsdram)
HAL_SDRAM_Write_DMA
HAL_StatusTypeDef HAL_SDRAM_Write_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize)
HAL_SDRAM_MspInit
void HAL_SDRAM_MspInit(SDRAM_HandleTypeDef *hsdram)
HAL_LockTypeDef
HAL_LockTypeDef
HAL Lock structures definition
Definition: stm32f407/stm32f407g-disc1/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:51
HAL_SDRAM_Init
HAL_StatusTypeDef HAL_SDRAM_Init(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_TimingTypeDef *Timing)
HAL_SDRAM_DMA_XferErrorCallback
void HAL_SDRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma)
HAL_SDRAM_Read_DMA
HAL_StatusTypeDef HAL_SDRAM_Read_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize)
HAL_SDRAM_STATE_WRITE_PROTECTED
@ HAL_SDRAM_STATE_WRITE_PROTECTED
Definition: stm32f7xx_hal_sdram.h:54
HAL_SDRAM_Write_8b
HAL_StatusTypeDef HAL_SDRAM_Write_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint8_t *pSrcBuffer, uint32_t BufferSize)
HAL_SDRAM_STATE_READY
@ HAL_SDRAM_STATE_READY
Definition: stm32f7xx_hal_sdram.h:51
HAL_SDRAM_Write_32b
HAL_StatusTypeDef HAL_SDRAM_Write_32b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize)
HAL_SDRAM_WriteProtection_Enable
HAL_StatusTypeDef HAL_SDRAM_WriteProtection_Enable(SDRAM_HandleTypeDef *hsdram)
HAL_SDRAM_Read_32b
HAL_StatusTypeDef HAL_SDRAM_Read_32b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize)
HAL_SDRAM_STATE_BUSY
@ HAL_SDRAM_STATE_BUSY
Definition: stm32f7xx_hal_sdram.h:52
FMC_SDRAM_TypeDef
#define FMC_SDRAM_TypeDef
Definition: stm32f7xx_ll_fmc.h:386
HAL_SDRAM_DeInit
HAL_StatusTypeDef HAL_SDRAM_DeInit(SDRAM_HandleTypeDef *hsdram)
HAL_SDRAM_WriteProtection_Disable
HAL_StatusTypeDef HAL_SDRAM_WriteProtection_Disable(SDRAM_HandleTypeDef *hsdram)
HAL_SDRAM_SendCommand
HAL_StatusTypeDef HAL_SDRAM_SendCommand(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_CommandTypeDef *Command, uint32_t Timeout)
Command
static FMC_SDRAM_CommandTypeDef Command
Definition: stm32f769i_discovery_sdram.c:125
HAL_SDRAM_STATE_ERROR
@ HAL_SDRAM_STATE_ERROR
Definition: stm32f7xx_hal_sdram.h:53
HAL_SDRAM_GetModeStatus
uint32_t HAL_SDRAM_GetModeStatus(SDRAM_HandleTypeDef *hsdram)
HAL_SDRAM_STATE_PRECHARGED
@ HAL_SDRAM_STATE_PRECHARGED
Definition: stm32f7xx_hal_sdram.h:55
HAL_SDRAM_SetAutoRefreshNumber
HAL_StatusTypeDef HAL_SDRAM_SetAutoRefreshNumber(SDRAM_HandleTypeDef *hsdram, uint32_t AutoRefreshNumber)
HAL_SDRAM_Write_16b
HAL_StatusTypeDef HAL_SDRAM_Write_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint16_t *pSrcBuffer, uint32_t BufferSize)
HAL_SDRAM_Read_16b
HAL_StatusTypeDef HAL_SDRAM_Read_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint16_t *pDstBuffer, uint32_t BufferSize)
FMC_SDRAM_CommandTypeDef
SDRAM command parameters structure definition.
Definition: stm32f7xx_ll_fmc.h:635
HAL_SDRAM_StateTypeDef
HAL_SDRAM_StateTypeDef
HAL SDRAM State structure definition
Definition: stm32f7xx_hal_sdram.h:48
HAL_SDRAM_ProgramRefreshRate
HAL_StatusTypeDef HAL_SDRAM_ProgramRefreshRate(SDRAM_HandleTypeDef *hsdram, uint32_t RefreshRate)
HAL_SDRAM_STATE_RESET
@ HAL_SDRAM_STATE_RESET
Definition: stm32f7xx_hal_sdram.h:50
SDRAM_HandleTypeDef
SDRAM handle Structure definition.
Definition: stm32f7xx_hal_sdram.h:65
HAL_SDRAM_IRQHandler
void HAL_SDRAM_IRQHandler(SDRAM_HandleTypeDef *hsdram)
HAL_SDRAM_Read_8b
HAL_StatusTypeDef HAL_SDRAM_Read_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint8_t *pDstBuffer, uint32_t BufferSize)


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autogenerated on Fri Apr 1 2022 02:14:52